1// SPDX-License-Identifier: GPL-2.0
 2#include <asm/paravirt.h>
 3#include <asm/asm-offsets.h>
 4#include <linux/stringify.h>
 5
 6DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
 7DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
 8DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq");
 9DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax");
 
10DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
11DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
12DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
 
 
13DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
14
 
15DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
 
16DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
17
18DEF_NATIVE(, mov32, "mov %edi, %eax");
19DEF_NATIVE(, mov64, "mov %rdi, %rax");
20
21#if defined(CONFIG_PARAVIRT_SPINLOCKS)
22DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)");
23DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %rax, %rax");
24#endif
25
26unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
27{
28	return paravirt_patch_insns(insnbuf, len,
29				    start__mov32, end__mov32);
30}
31
32unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
33{
34	return paravirt_patch_insns(insnbuf, len,
35				    start__mov64, end__mov64);
36}
37
38extern bool pv_is_native_spin_unlock(void);
39extern bool pv_is_native_vcpu_is_preempted(void);
40
41unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
42		      unsigned long addr, unsigned len)
43{
44	const unsigned char *start, *end;
45	unsigned ret;
46
47#define PATCH_SITE(ops, x)					\
48		case PARAVIRT_PATCH(ops.x):			\
49			start = start_##ops##_##x;		\
50			end = end_##ops##_##x;			\
51			goto patch_site
52	switch(type) {
53		PATCH_SITE(pv_irq_ops, restore_fl);
54		PATCH_SITE(pv_irq_ops, save_fl);
55		PATCH_SITE(pv_irq_ops, irq_enable);
56		PATCH_SITE(pv_irq_ops, irq_disable);
 
 
 
57		PATCH_SITE(pv_cpu_ops, usergs_sysret64);
58		PATCH_SITE(pv_cpu_ops, swapgs);
59		PATCH_SITE(pv_mmu_ops, read_cr2);
60		PATCH_SITE(pv_mmu_ops, read_cr3);
61		PATCH_SITE(pv_mmu_ops, write_cr3);
 
 
62		PATCH_SITE(pv_cpu_ops, wbinvd);
63#if defined(CONFIG_PARAVIRT_SPINLOCKS)
64		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
65			if (pv_is_native_spin_unlock()) {
66				start = start_pv_lock_ops_queued_spin_unlock;
67				end   = end_pv_lock_ops_queued_spin_unlock;
68				goto patch_site;
69			}
70			goto patch_default;
71
72		case PARAVIRT_PATCH(pv_lock_ops.vcpu_is_preempted):
73			if (pv_is_native_vcpu_is_preempted()) {
74				start = start_pv_lock_ops_vcpu_is_preempted;
75				end   = end_pv_lock_ops_vcpu_is_preempted;
76				goto patch_site;
77			}
78			goto patch_default;
79#endif
80
81	default:
82patch_default: __maybe_unused
83		ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
84		break;
85
86patch_site:
87		ret = paravirt_patch_insns(ibuf, len, start, end);
88		break;
89	}
90#undef PATCH_SITE
91	return ret;
92}

 
 1#include <asm/paravirt.h>
 2#include <asm/asm-offsets.h>
 3#include <linux/stringify.h>
 4
 5DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
 6DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
 7DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq");
 8DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax");
 9DEF_NATIVE(pv_cpu_ops, iret, "iretq");
10DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
11DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
12DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
13DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)");
14DEF_NATIVE(pv_cpu_ops, clts, "clts");
15DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
16
17DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "swapgs; sti; sysexit");
18DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
19DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
20DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
21
22DEF_NATIVE(, mov32, "mov %edi, %eax");
23DEF_NATIVE(, mov64, "mov %rdi, %rax");
24
 
 
 
 
 
25unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
26{
27	return paravirt_patch_insns(insnbuf, len,
28				    start__mov32, end__mov32);
29}
30
31unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
32{
33	return paravirt_patch_insns(insnbuf, len,
34				    start__mov64, end__mov64);
35}
36
 
 
 
37unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
38		      unsigned long addr, unsigned len)
39{
40	const unsigned char *start, *end;
41	unsigned ret;
42
43#define PATCH_SITE(ops, x)					\
44		case PARAVIRT_PATCH(ops.x):			\
45			start = start_##ops##_##x;		\
46			end = end_##ops##_##x;			\
47			goto patch_site
48	switch(type) {
49		PATCH_SITE(pv_irq_ops, restore_fl);
50		PATCH_SITE(pv_irq_ops, save_fl);
51		PATCH_SITE(pv_irq_ops, irq_enable);
52		PATCH_SITE(pv_irq_ops, irq_disable);
53		PATCH_SITE(pv_cpu_ops, iret);
54		PATCH_SITE(pv_cpu_ops, irq_enable_sysexit);
55		PATCH_SITE(pv_cpu_ops, usergs_sysret32);
56		PATCH_SITE(pv_cpu_ops, usergs_sysret64);
57		PATCH_SITE(pv_cpu_ops, swapgs);
58		PATCH_SITE(pv_mmu_ops, read_cr2);
59		PATCH_SITE(pv_mmu_ops, read_cr3);
60		PATCH_SITE(pv_mmu_ops, write_cr3);
61		PATCH_SITE(pv_cpu_ops, clts);
62		PATCH_SITE(pv_mmu_ops, flush_tlb_single);
63		PATCH_SITE(pv_cpu_ops, wbinvd);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
64
65	patch_site:
66		ret = paravirt_patch_insns(ibuf, len, start, end);
 
67		break;
68
69	default:
70		ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
71		break;
72	}
73#undef PATCH_SITE
74	return ret;
75}