1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * NSC/Cyrix CPU indexed register access. Must be inlined instead of
 4 * macros to ensure correct access ordering
 5 * Access order is always 0x22 (=offset), 0x23 (=value)
 6 *
 7 * When using the old macros a line like
 8 *   setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
 9 * gets expanded to:
10 *  do {
11 *    outb((CX86_CCR2), 0x22);
12 *    outb((({
13 *        outb((CX86_CCR2), 0x22);
14 *        inb(0x23);
15 *    }) | 0x88), 0x23);
16 *  } while (0);
17 *
18 * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
19 */
20
21static inline u8 getCx86(u8 reg)
22{
23	outb(reg, 0x22);
24	return inb(0x23);
25}
26
27static inline void setCx86(u8 reg, u8 data)
28{
29	outb(reg, 0x22);
30	outb(data, 0x23);
31}
32
33#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
34
35#define setCx86_old(reg, data) do { \
36	outb((reg), 0x22); \
37	outb((data), 0x23); \
38} while (0)
39

 
 1/*
 2 * NSC/Cyrix CPU indexed register access. Must be inlined instead of
 3 * macros to ensure correct access ordering
 4 * Access order is always 0x22 (=offset), 0x23 (=value)
 5 *
 6 * When using the old macros a line like
 7 *   setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
 8 * gets expanded to:
 9 *  do {
10 *    outb((CX86_CCR2), 0x22);
11 *    outb((({
12 *        outb((CX86_CCR2), 0x22);
13 *        inb(0x23);
14 *    }) | 0x88), 0x23);
15 *  } while (0);
16 *
17 * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
18 */
19
20static inline u8 getCx86(u8 reg)
21{
22	outb(reg, 0x22);
23	return inb(0x23);
24}
25
26static inline void setCx86(u8 reg, u8 data)
27{
28	outb(reg, 0x22);
29	outb(data, 0x23);
30}
31
32#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
33
34#define setCx86_old(reg, data) do { \
35	outb((reg), 0x22); \
36	outb((data), 0x23); \
37} while (0)
38