1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ASM_X86_INTEL_FAMILY_H
 3#define _ASM_X86_INTEL_FAMILY_H
 4
 5/*
 6 * "Big Core" Processors (Branded as Core, Xeon, etc...)
 7 *
 8 * The "_X" parts are generally the EP and EX Xeons, or the
 9 * "Extreme" ones, like Broadwell-E.
10 *
11 * Things ending in "2" are usually because we have no better
12 * name for them.  There's no processor called "SILVERMONT2".
13 *
14 * While adding a new CPUID for a new microarchitecture, add a new
15 * group to keep logically sorted out in chronological order. Within
16 * that group keep the CPUID for the variants sorted by model number.
17 */
18
19#define INTEL_FAM6_CORE_YONAH		0x0E
20
21#define INTEL_FAM6_CORE2_MEROM		0x0F
22#define INTEL_FAM6_CORE2_MEROM_L	0x16
23#define INTEL_FAM6_CORE2_PENRYN		0x17
24#define INTEL_FAM6_CORE2_DUNNINGTON	0x1D
25
26#define INTEL_FAM6_NEHALEM		0x1E
27#define INTEL_FAM6_NEHALEM_G		0x1F /* Auburndale / Havendale */
28#define INTEL_FAM6_NEHALEM_EP		0x1A
29#define INTEL_FAM6_NEHALEM_EX		0x2E
30
31#define INTEL_FAM6_WESTMERE		0x25
32#define INTEL_FAM6_WESTMERE_EP		0x2C
33#define INTEL_FAM6_WESTMERE_EX		0x2F
34
35#define INTEL_FAM6_SANDYBRIDGE		0x2A
36#define INTEL_FAM6_SANDYBRIDGE_X	0x2D
37#define INTEL_FAM6_IVYBRIDGE		0x3A
38#define INTEL_FAM6_IVYBRIDGE_X		0x3E
39
40#define INTEL_FAM6_HASWELL_CORE		0x3C
41#define INTEL_FAM6_HASWELL_X		0x3F
42#define INTEL_FAM6_HASWELL_ULT		0x45
43#define INTEL_FAM6_HASWELL_GT3E		0x46
44
45#define INTEL_FAM6_BROADWELL_CORE	0x3D
46#define INTEL_FAM6_BROADWELL_GT3E	0x47
47#define INTEL_FAM6_BROADWELL_X		0x4F
48#define INTEL_FAM6_BROADWELL_XEON_D	0x56
49
50#define INTEL_FAM6_SKYLAKE_MOBILE	0x4E
51#define INTEL_FAM6_SKYLAKE_DESKTOP	0x5E
52#define INTEL_FAM6_SKYLAKE_X		0x55
53#define INTEL_FAM6_KABYLAKE_MOBILE	0x8E
54#define INTEL_FAM6_KABYLAKE_DESKTOP	0x9E
55
56#define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
57
58/* "Small Core" Processors (Atom) */
59
60#define INTEL_FAM6_ATOM_PINEVIEW	0x1C
61#define INTEL_FAM6_ATOM_LINCROFT	0x26
62#define INTEL_FAM6_ATOM_PENWELL		0x27
63#define INTEL_FAM6_ATOM_CLOVERVIEW	0x35
64#define INTEL_FAM6_ATOM_CEDARVIEW	0x36
65#define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
66#define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
67#define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
68#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
69#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Anniedale */
70#define INTEL_FAM6_ATOM_GOLDMONT	0x5C
71#define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
72#define INTEL_FAM6_ATOM_GEMINI_LAKE	0x7A
73
74/* Xeon Phi */
75
76#define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */
77#define INTEL_FAM6_XEON_PHI_KNM		0x85 /* Knights Mill */
78
79#endif /* _ASM_X86_INTEL_FAMILY_H */