1/*
  2 * PPA8548 Device Tree Source (36-bit address map)
  3 * Copyright 2013 Prodrive B.V.
  4 *
  5 * Based on:
  6 * MPC8548 CDS Device Tree Source (36-bit address map)
  7 * Copyright 2012 Freescale Semiconductor Inc.
  8 *
  9 * This program is free software; you can redistribute  it and/or modify it
 10 * under  the terms of  the GNU General  Public License as published by the
 11 * Free Software Foundation;  either version 2 of the  License, or (at your
 12 * option) any later version.
 13 */
 14
 15/include/ "fsl/mpc8548si-pre.dtsi"
 16
 17/ {
 18	model = "ppa8548";
 19	compatible = "ppa8548";
 20	#address-cells = <2>;
 21	#size-cells = <2>;
 22	interrupt-parent = <&mpic>;
 23
 24	memory {
 25		device_type = "memory";
 26		reg = <0 0 0x0 0x40000000>;
 27	};
 28
 29	lbc: localbus@fe0005000 {
 30		reg = <0xf 0xe0005000 0 0x1000>;
 31		ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
 32	};
 33
 34	soc: soc8548@fe0000000 {
 35		ranges = <0 0xf 0xe0000000 0x100000>;
 36	};
 37
 38	pci0: pci@fe0008000 {
 39		/* ppa8548 board doesn't support PCI */
 40		status = "disabled";
 41	};
 42
 43	pci1: pci@fe0009000 {
 44		/* ppa8548 board doesn't support PCI */
 45		status = "disabled";
 46	};
 47
 48	pci2: pcie@fe000a000 {
 49		/* ppa8548 board doesn't support PCI */
 50		status = "disabled";
 51	};
 52
 53	rio: rapidio@fe00c0000 {
 54		reg = <0xf 0xe00c0000 0x0 0x11000>;
 55		port1 {
 56			ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
 57		};
 58	};
 59};
 60
 61&lbc {
 62	nor@0 {
 63		#address-cells = <1>;
 64		#size-cells = <1>;
 65		compatible = "cfi-flash";
 66		reg = <0x0 0x0 0x00800000>;
 67		bank-width = <2>;
 68		device-width = <2>;
 69
 70		partition@0 {
 71			reg = <0x0 0x7A0000>;
 72			label = "user";
 73		};
 74
 75		partition@7A0000 {
 76			reg = <0x7A0000 0x20000>;
 77			label = "env";
 78			read-only;
 79		};
 80
 81		partition@7C0000 {
 82			reg = <0x7C0000 0x40000>;
 83			label = "u-boot";
 84			read-only;
 85		};
 86	};
 87};
 88
 89&soc {
 90	i2c@3000 {
 91		rtc@6f {
 92			compatible = "intersil,isl1208";
 93			reg = <0x6f>;
 94		};
 95	};
 96
 97	i2c@3100 {
 98	};
 99
100	/*
101	 * Only ethernet controller @25000 and @26000 are used.
102	 * Use alias enet2 and enet3 for the remainig controllers,
103	 * to stay compatible with mpc8548si-pre.dtsi.
104	 */
105	enet2: ethernet@24000 {
106		status = "disabled";
107	};
108
109	mdio@24520 {
110		phy0: ethernet-phy@0 {
111			interrupts = <7 1 0 0>;
112			reg = <0x0>;
113		};
114		phy1: ethernet-phy@1 {
115			interrupts = <8 1 0 0>;
116			reg = <0x1>;
117		};
118		tbi0: tbi-phy@11 {
119			reg = <0x11>;
120			device_type = "tbi-phy";
121		};
122	};
123
124	enet0: ethernet@25000 {
125		tbi-handle = <&tbi1>;
126		phy-handle = <&phy0>;
127	};
128
129	mdio@25520 {
130		tbi1: tbi-phy@11 {
131			reg = <0x11>;
132			device_type = "tbi-phy";
133		};
134	};
135
136	enet1: ethernet@26000 {
137		tbi-handle = <&tbi2>;
138		phy-handle = <&phy1>;
139	};
140
141	mdio@26520 {
142		tbi2: tbi-phy@11 {
143			reg = <0x11>;
144			device_type = "tbi-phy";
145		};
146	};
147
148	enet3: ethernet@27000 {
149		status = "disabled";
150	};
151
152	mdio@27520 {
153		tbi3: tbi-phy@11 {
154			reg = <0x11>;
155			device_type = "tbi-phy";
156		};
157	};
158
159	crypto@30000 {
160		status = "disabled";
161	};
162};
163
164/include/ "fsl/mpc8548si-post.dtsi"