1/*
  2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License as published by
  6 * the Free Software Foundation; either version 2 of the License, or
  7 * (at your option) any later version.
  8 *
  9 * This program is distributed in the hope that it will be useful,
 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12 * GNU General Public License for more details.
 13 */
 14
 15#include <linux/gpio.h>
 16#include <linux/init.h>
 17#include <linux/interrupt.h>
 18#include <linux/delay.h>
 19#include <linux/platform_device.h>
 20#include <linux/slab.h>
 21#include <linux/types.h>
 22
 23#include <linux/usb/otg.h>
 24
 25#include "board-mx31moboard.h"
 26#include "common.h"
 27#include "devices-imx31.h"
 28#include "ehci.h"
 29#include "hardware.h"
 30#include "iomux-mx3.h"
 31#include "ulpi.h"
 32
 33static unsigned int devboard_pins[] = {
 34	/* UART1 */
 35	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
 36	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
 37	/* SDHC2 */
 38	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
 39	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
 40	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
 41	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
 42	/* USB H1 */
 43	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
 44	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
 45	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
 46	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
 47	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
 48	/* SEL */
 49	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
 50	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 51};
 52
 53static const struct imxuart_platform_data uart_pdata __initconst = {
 54	.flags = IMXUART_HAVE_RTSCTS,
 55};
 56
 57#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
 58#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
 59
 60static int devboard_sdhc2_get_ro(struct device *dev)
 61{
 62	return !gpio_get_value(SDHC2_WP);
 63}
 64
 65static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 66		void *data)
 67{
 68	int ret;
 69
 70	ret = gpio_request(SDHC2_CD, "sdhc-detect");
 71	if (ret)
 72		return ret;
 73
 74	gpio_direction_input(SDHC2_CD);
 75
 76	ret = gpio_request(SDHC2_WP, "sdhc-wp");
 77	if (ret)
 78		goto err_gpio_free;
 79	gpio_direction_input(SDHC2_WP);
 80
 81	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
 82		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 83		"sdhc2-card-detect", data);
 84	if (ret)
 85		goto err_gpio_free_2;
 86
 87	return 0;
 88
 89err_gpio_free_2:
 90	gpio_free(SDHC2_WP);
 91err_gpio_free:
 92	gpio_free(SDHC2_CD);
 93
 94	return ret;
 95}
 96
 97static void devboard_sdhc2_exit(struct device *dev, void *data)
 98{
 99	free_irq(gpio_to_irq(SDHC2_CD), data);
100	gpio_free(SDHC2_WP);
101	gpio_free(SDHC2_CD);
102}
103
104static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
105	.get_ro	= devboard_sdhc2_get_ro,
106	.init	= devboard_sdhc2_init,
107	.exit	= devboard_sdhc2_exit,
108};
109
110#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
111#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
112#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
113#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
114
115static void devboard_init_sel_gpios(void)
116{
117	if (!gpio_request(SEL0, "sel0")) {
118		gpio_direction_input(SEL0);
119		gpio_export(SEL0, true);
120	}
121
122	if (!gpio_request(SEL1, "sel1")) {
123		gpio_direction_input(SEL1);
124		gpio_export(SEL1, true);
125	}
126
127	if (!gpio_request(SEL2, "sel2")) {
128		gpio_direction_input(SEL2);
129		gpio_export(SEL2, true);
130	}
131
132	if (!gpio_request(SEL3, "sel3")) {
133		gpio_direction_input(SEL3);
134		gpio_export(SEL3, true);
135	}
136}
137#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
138			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
139
140static int devboard_usbh1_hw_init(struct platform_device *pdev)
141{
142	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
143
144	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
145	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
146	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
147	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
149	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
150	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
151	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
152
153	mdelay(10);
154
155	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
156			MXC_EHCI_INTERFACE_SINGLE_UNI);
157}
158
159#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
160#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)
161
162static int devboard_isp1105_init(struct usb_phy *otg)
163{
164	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
165	if (ret)
166		return ret;
167	/* single ended */
168	gpio_direction_output(USBH1_MODE, 0);
169
170	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
171	if (ret) {
172		gpio_free(USBH1_MODE);
173		return ret;
174	}
175	gpio_direction_output(USBH1_VBUSEN_B, 1);
176
177	return 0;
178}
179
180
181static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
182{
183	if (on)
184		gpio_set_value(USBH1_VBUSEN_B, 0);
185	else
186		gpio_set_value(USBH1_VBUSEN_B, 1);
187
188	return 0;
189}
190
191static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
192	.init	= devboard_usbh1_hw_init,
193	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
194};
195
196static int __init devboard_usbh1_init(void)
197{
198	struct usb_phy *phy;
199	struct platform_device *pdev;
200
201	phy = kzalloc(sizeof(*phy), GFP_KERNEL);
202	if (!phy)
203		return -ENOMEM;
204
205	phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
206	if (!phy->otg) {
207		kfree(phy);
208		return -ENOMEM;
209	}
210
211	phy->label	= "ISP1105";
212	phy->init	= devboard_isp1105_init;
213	phy->otg->set_vbus	= devboard_isp1105_set_vbus;
214
215	usbh1_pdata.otg = phy;
216
217	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
 
 
218
219	return PTR_ERR_OR_ZERO(pdev);
220}
221
222
223static const struct fsl_usb2_platform_data usb_pdata __initconst = {
224	.operating_mode	= FSL_USB2_DR_DEVICE,
225	.phy_mode	= FSL_USB2_PHY_ULPI,
226};
227
228/*
229 * system init for baseboard usage. Will be called by mx31moboard init.
230 */
231void __init mx31moboard_devboard_init(void)
232{
233	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
234
235	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
236		"devboard");
237
238	imx31_add_imx_uart1(&uart_pdata);
239
240	imx31_add_mxc_mmc(1, &sdhc2_pdata);
241
242	devboard_init_sel_gpios();
243
244	imx31_add_fsl_usb2_udc(&usb_pdata);
245
246	devboard_usbh1_init();
247}

  1/*
  2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License as published by
  6 * the Free Software Foundation; either version 2 of the License, or
  7 * (at your option) any later version.
  8 *
  9 * This program is distributed in the hope that it will be useful,
 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12 * GNU General Public License for more details.
 13 */
 14
 15#include <linux/gpio.h>
 16#include <linux/init.h>
 17#include <linux/interrupt.h>
 18#include <linux/delay.h>
 19#include <linux/platform_device.h>
 20#include <linux/slab.h>
 21#include <linux/types.h>
 22
 23#include <linux/usb/otg.h>
 24
 
 25#include "common.h"
 26#include "devices-imx31.h"
 
 27#include "hardware.h"
 28#include "iomux-mx3.h"
 29#include "ulpi.h"
 30
 31static unsigned int devboard_pins[] = {
 32	/* UART1 */
 33	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
 34	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
 35	/* SDHC2 */
 36	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
 37	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
 38	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
 39	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
 40	/* USB H1 */
 41	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
 42	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
 43	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
 44	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
 45	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
 46	/* SEL */
 47	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
 48	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 49};
 50
 51static const struct imxuart_platform_data uart_pdata __initconst = {
 52	.flags = IMXUART_HAVE_RTSCTS,
 53};
 54
 55#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
 56#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
 57
 58static int devboard_sdhc2_get_ro(struct device *dev)
 59{
 60	return !gpio_get_value(SDHC2_WP);
 61}
 62
 63static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 64		void *data)
 65{
 66	int ret;
 67
 68	ret = gpio_request(SDHC2_CD, "sdhc-detect");
 69	if (ret)
 70		return ret;
 71
 72	gpio_direction_input(SDHC2_CD);
 73
 74	ret = gpio_request(SDHC2_WP, "sdhc-wp");
 75	if (ret)
 76		goto err_gpio_free;
 77	gpio_direction_input(SDHC2_WP);
 78
 79	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
 80		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 81		"sdhc2-card-detect", data);
 82	if (ret)
 83		goto err_gpio_free_2;
 84
 85	return 0;
 86
 87err_gpio_free_2:
 88	gpio_free(SDHC2_WP);
 89err_gpio_free:
 90	gpio_free(SDHC2_CD);
 91
 92	return ret;
 93}
 94
 95static void devboard_sdhc2_exit(struct device *dev, void *data)
 96{
 97	free_irq(gpio_to_irq(SDHC2_CD), data);
 98	gpio_free(SDHC2_WP);
 99	gpio_free(SDHC2_CD);
100}
101
102static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
103	.get_ro	= devboard_sdhc2_get_ro,
104	.init	= devboard_sdhc2_init,
105	.exit	= devboard_sdhc2_exit,
106};
107
108#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
109#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
110#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
111#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
112
113static void devboard_init_sel_gpios(void)
114{
115	if (!gpio_request(SEL0, "sel0")) {
116		gpio_direction_input(SEL0);
117		gpio_export(SEL0, true);
118	}
119
120	if (!gpio_request(SEL1, "sel1")) {
121		gpio_direction_input(SEL1);
122		gpio_export(SEL1, true);
123	}
124
125	if (!gpio_request(SEL2, "sel2")) {
126		gpio_direction_input(SEL2);
127		gpio_export(SEL2, true);
128	}
129
130	if (!gpio_request(SEL3, "sel3")) {
131		gpio_direction_input(SEL3);
132		gpio_export(SEL3, true);
133	}
134}
135#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
136			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
137
138static int devboard_usbh1_hw_init(struct platform_device *pdev)
139{
140	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
141
142	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
143	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
144	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
145	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
146	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
147	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
149	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
150
151	mdelay(10);
152
153	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
154			MXC_EHCI_INTERFACE_SINGLE_UNI);
155}
156
157#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
158#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)
159
160static int devboard_isp1105_init(struct usb_phy *otg)
161{
162	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
163	if (ret)
164		return ret;
165	/* single ended */
166	gpio_direction_output(USBH1_MODE, 0);
167
168	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
169	if (ret) {
170		gpio_free(USBH1_MODE);
171		return ret;
172	}
173	gpio_direction_output(USBH1_VBUSEN_B, 1);
174
175	return 0;
176}
177
178
179static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
180{
181	if (on)
182		gpio_set_value(USBH1_VBUSEN_B, 0);
183	else
184		gpio_set_value(USBH1_VBUSEN_B, 1);
185
186	return 0;
187}
188
189static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
190	.init	= devboard_usbh1_hw_init,
191	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
192};
193
194static int __init devboard_usbh1_init(void)
195{
196	struct usb_phy *phy;
197	struct platform_device *pdev;
198
199	phy = kzalloc(sizeof(*phy), GFP_KERNEL);
200	if (!phy)
201		return -ENOMEM;
202
203	phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
204	if (!phy->otg) {
205		kfree(phy);
206		return -ENOMEM;
207	}
208
209	phy->label	= "ISP1105";
210	phy->init	= devboard_isp1105_init;
211	phy->otg->set_vbus	= devboard_isp1105_set_vbus;
212
213	usbh1_pdata.otg = phy;
214
215	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
216	if (IS_ERR(pdev))
217		return PTR_ERR(pdev);
218
219	return 0;
220}
221
222
223static const struct fsl_usb2_platform_data usb_pdata __initconst = {
224	.operating_mode	= FSL_USB2_DR_DEVICE,
225	.phy_mode	= FSL_USB2_PHY_ULPI,
226};
227
228/*
229 * system init for baseboard usage. Will be called by mx31moboard init.
230 */
231void __init mx31moboard_devboard_init(void)
232{
233	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
234
235	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
236		"devboard");
237
238	imx31_add_imx_uart1(&uart_pdata);
239
240	imx31_add_mxc_mmc(1, &sdhc2_pdata);
241
242	devboard_init_sel_gpios();
243
244	imx31_add_fsl_usb2_udc(&usb_pdata);
245
246	devboard_usbh1_init();
247}