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1/*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 * Copyright (C) 2015-2016 Renesas Electronics Corporation
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13/*
14 * SSI-AK4643
15 *
16 * SW1: 1: AK4643
17 * 2: CN22
18 * 3: ADV7511
19 *
20 * This command is required when Playback/Capture
21 *
22 * amixer set "LINEOUT Mixer DACL" on
23 * amixer set "DVC Out" 100%
24 * amixer set "DVC In" 100%
25 *
26 * You can use Mute
27 *
28 * amixer set "DVC Out Mute" on
29 * amixer set "DVC In Mute" on
30 *
31 * You can use Volume Ramp
32 *
33 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
34 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
35 * amixer set "DVC Out Ramp" on
36 * aplay xxx.wav &
37 * amixer set "DVC Out" 80% // Volume Down
38 * amixer set "DVC Out" 100% // Volume Up
39 */
40
41/dts-v1/;
42#include "r8a7790.dtsi"
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/input/input.h>
45
46/ {
47 model = "Lager";
48 compatible = "renesas,lager", "renesas,r8a7790";
49
50 aliases {
51 serial0 = &scif0;
52 serial1 = &scifa1;
53 i2c8 = &gpioi2c1;
54 i2c9 = &gpioi2c2;
55 i2c10 = &i2cexio0;
56 i2c11 = &i2cexio1;
57 i2c12 = &i2chdmi;
58 i2c13 = &i2cpwr;
59 };
60
61 chosen {
62 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
63 stdout-path = "serial0:115200n8";
64 };
65
66 memory@40000000 {
67 device_type = "memory";
68 reg = <0 0x40000000 0 0x40000000>;
69 };
70
71 memory@140000000 {
72 device_type = "memory";
73 reg = <1 0x40000000 0 0xc0000000>;
74 };
75
76 lbsc {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 };
80
81 keyboard {
82 compatible = "gpio-keys";
83
84 one {
85 linux,code = <KEY_1>;
86 label = "SW2-1";
87 wakeup-source;
88 debounce-interval = <20>;
89 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
90 };
91 two {
92 linux,code = <KEY_2>;
93 label = "SW2-2";
94 wakeup-source;
95 debounce-interval = <20>;
96 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
97 };
98 three {
99 linux,code = <KEY_3>;
100 label = "SW2-3";
101 wakeup-source;
102 debounce-interval = <20>;
103 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
104 };
105 four {
106 linux,code = <KEY_4>;
107 label = "SW2-4";
108 wakeup-source;
109 debounce-interval = <20>;
110 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
111 };
112 };
113
114 leds {
115 compatible = "gpio-leds";
116 led6 {
117 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
118 };
119 led7 {
120 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
121 };
122 led8 {
123 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
124 };
125 };
126
127 fixedregulator3v3: regulator-3v3 {
128 compatible = "regulator-fixed";
129 regulator-name = "fixed-3.3V";
130 regulator-min-microvolt = <3300000>;
131 regulator-max-microvolt = <3300000>;
132 regulator-boot-on;
133 regulator-always-on;
134 };
135
136 vcc_sdhi0: regulator-vcc-sdhi0 {
137 compatible = "regulator-fixed";
138
139 regulator-name = "SDHI0 Vcc";
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142
143 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
144 enable-active-high;
145 };
146
147 vccq_sdhi0: regulator-vccq-sdhi0 {
148 compatible = "regulator-gpio";
149
150 regulator-name = "SDHI0 VccQ";
151 regulator-min-microvolt = <1800000>;
152 regulator-max-microvolt = <3300000>;
153
154 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
155 gpios-states = <1>;
156 states = <3300000 1
157 1800000 0>;
158 };
159
160 vcc_sdhi2: regulator-vcc-sdhi2 {
161 compatible = "regulator-fixed";
162
163 regulator-name = "SDHI2 Vcc";
164 regulator-min-microvolt = <3300000>;
165 regulator-max-microvolt = <3300000>;
166
167 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
168 enable-active-high;
169 };
170
171 vccq_sdhi2: regulator-vccq-sdhi2 {
172 compatible = "regulator-gpio";
173
174 regulator-name = "SDHI2 VccQ";
175 regulator-min-microvolt = <1800000>;
176 regulator-max-microvolt = <3300000>;
177
178 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
179 gpios-states = <1>;
180 states = <3300000 1
181 1800000 0>;
182 };
183
184 audio_clock: audio_clock {
185 compatible = "fixed-clock";
186 #clock-cells = <0>;
187 clock-frequency = <11289600>;
188 };
189
190 rsnd_ak4643: sound {
191 compatible = "simple-audio-card";
192
193 simple-audio-card,format = "left_j";
194 simple-audio-card,bitclock-master = <&sndcodec>;
195 simple-audio-card,frame-master = <&sndcodec>;
196
197 sndcpu: simple-audio-card,cpu {
198 sound-dai = <&rcar_sound>;
199 };
200
201 sndcodec: simple-audio-card,codec {
202 sound-dai = <&ak4643>;
203 clocks = <&audio_clock>;
204 };
205 };
206
207 vga-encoder {
208 compatible = "adi,adv7123";
209
210 ports {
211 #address-cells = <1>;
212 #size-cells = <0>;
213
214 port@0 {
215 reg = <0>;
216 adv7123_in: endpoint {
217 remote-endpoint = <&du_out_rgb>;
218 };
219 };
220 port@1 {
221 reg = <1>;
222 adv7123_out: endpoint {
223 remote-endpoint = <&vga_in>;
224 };
225 };
226 };
227 };
228
229 vga {
230 compatible = "vga-connector";
231
232 port {
233 vga_in: endpoint {
234 remote-endpoint = <&adv7123_out>;
235 };
236 };
237 };
238
239 hdmi-in {
240 compatible = "hdmi-connector";
241 type = "a";
242
243 port {
244 hdmi_con_in: endpoint {
245 remote-endpoint = <&adv7612_in>;
246 };
247 };
248 };
249
250 cec_clock: cec-clock {
251 compatible = "fixed-clock";
252 #clock-cells = <0>;
253 clock-frequency = <12000000>;
254 };
255
256 hdmi-out {
257 compatible = "hdmi-connector";
258 type = "a";
259
260 port {
261 hdmi_con_out: endpoint {
262 remote-endpoint = <&adv7511_out>;
263 };
264 };
265 };
266
267 x2_clk: x2-clock {
268 compatible = "fixed-clock";
269 #clock-cells = <0>;
270 clock-frequency = <148500000>;
271 };
272
273 x13_clk: x13-clock {
274 compatible = "fixed-clock";
275 #clock-cells = <0>;
276 clock-frequency = <148500000>;
277 };
278
279 gpioi2c1: i2c-8 {
280 #address-cells = <1>;
281 #size-cells = <0>;
282 compatible = "i2c-gpio";
283 status = "disabled";
284 scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
285 sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
286 i2c-gpio,delay-us = <5>;
287 };
288
289 gpioi2c2: i2c-9 {
290 #address-cells = <1>;
291 #size-cells = <0>;
292 compatible = "i2c-gpio";
293 status = "disabled";
294 scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
295 sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
296 i2c-gpio,delay-us = <5>;
297 };
298
299 /*
300 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
301 * We use the I2C demuxer, so the desired IP core can be selected at runtime
302 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
303 * Note: For testing the I2C slave feature, it is convenient to connect this
304 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
305 * instantiate the slave device at runtime according to the documentation.
306 * You can then communicate with the slave via IIC3.
307 *
308 * IIC0/I2C0 does not appear to support fallback to GPIO.
309 */
310 i2cexio0: i2c-10 {
311 compatible = "i2c-demux-pinctrl";
312 i2c-parent = <&iic0>, <&i2c0>;
313 i2c-bus-name = "i2c-exio0";
314 #address-cells = <1>;
315 #size-cells = <0>;
316 };
317
318 /*
319 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
320 * This is similar to the arangement described for i2cexio0 (above)
321 * with a fallback to GPIO also provided.
322 */
323 i2cexio1: i2c-11 {
324 compatible = "i2c-demux-pinctrl";
325 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
326 i2c-bus-name = "i2c-exio1";
327 #address-cells = <1>;
328 #size-cells = <0>;
329 };
330
331 /*
332 * IIC2 and I2C2 may be switched using pinmux.
333 * A fallback to GPIO is also provided.
334 */
335 i2chdmi: i2c-12 {
336 compatible = "i2c-demux-pinctrl";
337 i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
338 i2c-bus-name = "i2c-hdmi";
339 #address-cells = <1>;
340 #size-cells = <0>;
341
342 ak4643: codec@12 {
343 compatible = "asahi-kasei,ak4643";
344 #sound-dai-cells = <0>;
345 reg = <0x12>;
346 };
347
348 composite-in@20 {
349 compatible = "adi,adv7180";
350 reg = <0x20>;
351 remote = <&vin1>;
352
353 port {
354 adv7180: endpoint {
355 bus-width = <8>;
356 remote-endpoint = <&vin1ep0>;
357 };
358 };
359 };
360
361 hdmi@39 {
362 compatible = "adi,adv7511w";
363 reg = <0x39>;
364 interrupt-parent = <&gpio1>;
365 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
366 clocks = <&cec_clock>;
367 clock-names = "cec";
368
369 adi,input-depth = <8>;
370 adi,input-colorspace = "rgb";
371 adi,input-clock = "1x";
372 adi,input-style = <1>;
373 adi,input-justification = "evenly";
374
375 ports {
376 #address-cells = <1>;
377 #size-cells = <0>;
378
379 port@0 {
380 reg = <0>;
381 adv7511_in: endpoint {
382 remote-endpoint = <&lvds0_out>;
383 };
384 };
385
386 port@1 {
387 reg = <1>;
388 adv7511_out: endpoint {
389 remote-endpoint = <&hdmi_con_out>;
390 };
391 };
392 };
393 };
394
395 hdmi-in@4c {
396 compatible = "adi,adv7612";
397 reg = <0x4c>;
398 interrupt-parent = <&gpio1>;
399 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
400 default-input = <0>;
401
402 ports {
403 #address-cells = <1>;
404 #size-cells = <0>;
405
406 port@0 {
407 reg = <0>;
408 adv7612_in: endpoint {
409 remote-endpoint = <&hdmi_con_in>;
410 };
411 };
412
413 port@2 {
414 reg = <2>;
415 adv7612_out: endpoint {
416 remote-endpoint = <&vin0ep2>;
417 };
418 };
419 };
420 };
421 };
422
423 /*
424 * IIC3 and I2C3 may be switched using pinmux.
425 * IIC3/I2C3 does not appear to support fallback to GPIO.
426 */
427 i2cpwr: i2c-13 {
428 compatible = "i2c-demux-pinctrl";
429 i2c-parent = <&iic3>, <&i2c3>;
430 i2c-bus-name = "i2c-pwr";
431 #address-cells = <1>;
432 #size-cells = <0>;
433
434 pmic@58 {
435 compatible = "dlg,da9063";
436 reg = <0x58>;
437 interrupt-parent = <&irqc0>;
438 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
439 interrupt-controller;
440
441 rtc {
442 compatible = "dlg,da9063-rtc";
443 };
444
445 wdt {
446 compatible = "dlg,da9063-watchdog";
447 };
448 };
449
450 vdd_dvfs: regulator@68 {
451 compatible = "dlg,da9210";
452 reg = <0x68>;
453 interrupt-parent = <&irqc0>;
454 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
455
456 regulator-min-microvolt = <1000000>;
457 regulator-max-microvolt = <1000000>;
458 regulator-boot-on;
459 regulator-always-on;
460 };
461 };
462};
463
464&du {
465 pinctrl-0 = <&du_pins>;
466 pinctrl-names = "default";
467 status = "okay";
468
469 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
470 <&x13_clk>, <&x2_clk>;
471 clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
472
473 ports {
474 port@0 {
475 endpoint {
476 remote-endpoint = <&adv7123_in>;
477 };
478 };
479 };
480};
481
482&lvds0 {
483 status = "okay";
484
485 ports {
486 port@1 {
487 endpoint {
488 remote-endpoint = <&adv7511_in>;
489 };
490 };
491 };
492};
493
494&lvds1 {
495 status = "okay";
496
497 ports {
498 port@1 {
499 lvds_connector: endpoint {
500 };
501 };
502 };
503};
504
505&extal_clk {
506 clock-frequency = <20000000>;
507};
508
509&pfc {
510 pinctrl-0 = <&scif_clk_pins>;
511 pinctrl-names = "default";
512
513 du_pins: du {
514 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
515 function = "du";
516 };
517
518 scif0_pins: scif0 {
519 groups = "scif0_data";
520 function = "scif0";
521 };
522
523 scif_clk_pins: scif_clk {
524 groups = "scif_clk";
525 function = "scif_clk";
526 };
527
528 ether_pins: ether {
529 groups = "eth_link", "eth_mdio", "eth_rmii";
530 function = "eth";
531 };
532
533 phy1_pins: phy1 {
534 groups = "intc_irq0";
535 function = "intc";
536 };
537
538 scifa1_pins: scifa1 {
539 groups = "scifa1_data";
540 function = "scifa1";
541 };
542
543 sdhi0_pins: sd0 {
544 groups = "sdhi0_data4", "sdhi0_ctrl";
545 function = "sdhi0";
546 power-source = <3300>;
547 };
548
549 sdhi0_pins_uhs: sd0_uhs {
550 groups = "sdhi0_data4", "sdhi0_ctrl";
551 function = "sdhi0";
552 power-source = <1800>;
553 };
554
555 sdhi2_pins: sd2 {
556 groups = "sdhi2_data4", "sdhi2_ctrl";
557 function = "sdhi2";
558 power-source = <3300>;
559 };
560
561 sdhi2_pins_uhs: sd2_uhs {
562 groups = "sdhi2_data4", "sdhi2_ctrl";
563 function = "sdhi2";
564 power-source = <1800>;
565 };
566
567 mmc1_pins: mmc1 {
568 groups = "mmc1_data8", "mmc1_ctrl";
569 function = "mmc1";
570 };
571
572 qspi_pins: qspi {
573 groups = "qspi_ctrl", "qspi_data4";
574 function = "qspi";
575 };
576
577 msiof1_pins: msiof1 {
578 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
579 "msiof1_tx";
580 function = "msiof1";
581 };
582
583 i2c0_pins: i2c0 {
584 groups = "i2c0";
585 function = "i2c0";
586 };
587
588 iic0_pins: iic0 {
589 groups = "iic0";
590 function = "iic0";
591 };
592
593 i2c1_pins: i2c1 {
594 groups = "i2c1";
595 function = "i2c1";
596 };
597
598 iic1_pins: iic1 {
599 groups = "iic1";
600 function = "iic1";
601 };
602
603 i2c2_pins: i2c2 {
604 groups = "i2c2";
605 function = "i2c2";
606 };
607
608 iic2_pins: iic2 {
609 groups = "iic2";
610 function = "iic2";
611 };
612
613 i2c3_pins: i2c3 {
614 groups = "i2c3";
615 function = "i2c3";
616 };
617
618 iic3_pins: iic3 {
619 groups = "iic3";
620 function = "iic3";
621 };
622
623 hsusb_pins: hsusb {
624 groups = "usb0_ovc_vbus";
625 function = "usb0";
626 };
627
628 usb0_pins: usb0 {
629 groups = "usb0";
630 function = "usb0";
631 };
632
633 usb1_pins: usb1 {
634 groups = "usb1";
635 function = "usb1";
636 };
637
638 usb2_pins: usb2 {
639 groups = "usb2";
640 function = "usb2";
641 };
642
643 vin0_pins: vin0 {
644 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
645 function = "vin0";
646 };
647
648 vin1_pins: vin1 {
649 groups = "vin1_data8", "vin1_clk";
650 function = "vin1";
651 };
652
653 sound_pins: sound {
654 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
655 function = "ssi";
656 };
657
658 sound_clk_pins: sound_clk {
659 groups = "audio_clk_a";
660 function = "audio_clk";
661 };
662};
663
664ðer {
665 pinctrl-0 = <ðer_pins &phy1_pins>;
666 pinctrl-names = "default";
667
668 phy-handle = <&phy1>;
669 renesas,ether-link-active-low;
670 status = "okay";
671
672 phy1: ethernet-phy@1 {
673 reg = <1>;
674 interrupt-parent = <&irqc0>;
675 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
676 micrel,led-mode = <1>;
677 };
678};
679
680&cmt0 {
681 status = "okay";
682};
683
684&mmcif1 {
685 pinctrl-0 = <&mmc1_pins>;
686 pinctrl-names = "default";
687
688 vmmc-supply = <&fixedregulator3v3>;
689 bus-width = <8>;
690 non-removable;
691 status = "okay";
692};
693
694&sata1 {
695 status = "okay";
696};
697
698&qspi {
699 pinctrl-0 = <&qspi_pins>;
700 pinctrl-names = "default";
701
702 status = "okay";
703
704 flash: flash@0 {
705 compatible = "spansion,s25fl512s", "jedec,spi-nor";
706 reg = <0>;
707 spi-max-frequency = <30000000>;
708 spi-tx-bus-width = <4>;
709 spi-rx-bus-width = <4>;
710 spi-cpha;
711 spi-cpol;
712 m25p,fast-read;
713
714 partitions {
715 compatible = "fixed-partitions";
716 #address-cells = <1>;
717 #size-cells = <1>;
718
719 partition@0 {
720 label = "loader";
721 reg = <0x00000000 0x00040000>;
722 read-only;
723 };
724 partition@40000 {
725 label = "user";
726 reg = <0x00040000 0x00400000>;
727 read-only;
728 };
729 partition@440000 {
730 label = "flash";
731 reg = <0x00440000 0x03bc0000>;
732 };
733 };
734 };
735};
736
737&scif0 {
738 pinctrl-0 = <&scif0_pins>;
739 pinctrl-names = "default";
740
741 status = "okay";
742};
743
744&scifa1 {
745 pinctrl-0 = <&scifa1_pins>;
746 pinctrl-names = "default";
747
748 status = "okay";
749};
750
751&scif_clk {
752 clock-frequency = <14745600>;
753};
754
755&msiof1 {
756 pinctrl-0 = <&msiof1_pins>;
757 pinctrl-names = "default";
758
759 status = "okay";
760
761 pmic: pmic@0 {
762 compatible = "renesas,r2a11302ft";
763 reg = <0>;
764 spi-max-frequency = <6000000>;
765 spi-cpol;
766 spi-cpha;
767 };
768};
769
770&sdhi0 {
771 pinctrl-0 = <&sdhi0_pins>;
772 pinctrl-1 = <&sdhi0_pins_uhs>;
773 pinctrl-names = "default", "state_uhs";
774
775 vmmc-supply = <&vcc_sdhi0>;
776 vqmmc-supply = <&vccq_sdhi0>;
777 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
778 sd-uhs-sdr50;
779 sd-uhs-sdr104;
780 status = "okay";
781};
782
783&sdhi2 {
784 pinctrl-0 = <&sdhi2_pins>;
785 pinctrl-1 = <&sdhi2_pins_uhs>;
786 pinctrl-names = "default", "state_uhs";
787
788 vmmc-supply = <&vcc_sdhi2>;
789 vqmmc-supply = <&vccq_sdhi2>;
790 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
791 sd-uhs-sdr50;
792 status = "okay";
793};
794
795&cpu0 {
796 cpu0-supply = <&vdd_dvfs>;
797};
798
799&i2c0 {
800 pinctrl-0 = <&i2c0_pins>;
801 pinctrl-names = "i2c-exio0";
802};
803
804&iic0 {
805 pinctrl-0 = <&iic0_pins>;
806 pinctrl-names = "i2c-exio0";
807};
808
809&i2c1 {
810 pinctrl-0 = <&i2c1_pins>;
811 pinctrl-names = "i2c-exio1";
812};
813
814&iic1 {
815 pinctrl-0 = <&iic1_pins>;
816 pinctrl-names = "i2c-exio1";
817};
818
819&i2c2 {
820 pinctrl-0 = <&i2c2_pins>;
821 pinctrl-names = "i2c-hdmi";
822
823 clock-frequency = <100000>;
824};
825
826&iic2 {
827 pinctrl-0 = <&iic2_pins>;
828 pinctrl-names = "i2c-hdmi";
829
830 clock-frequency = <100000>;
831};
832
833&i2c3 {
834 pinctrl-0 = <&i2c3_pins>;
835 pinctrl-names = "i2c-pwr";
836};
837
838&iic3 {
839 pinctrl-0 = <&iic3_pins>;
840 pinctrl-names = "i2c-pwr";
841};
842
843&pci0 {
844 status = "okay";
845 pinctrl-0 = <&usb0_pins>;
846 pinctrl-names = "default";
847};
848
849&pci1 {
850 status = "okay";
851 pinctrl-0 = <&usb1_pins>;
852 pinctrl-names = "default";
853};
854
855&xhci {
856 status = "okay";
857 pinctrl-0 = <&usb2_pins>;
858 pinctrl-names = "default";
859};
860
861&pci2 {
862 status = "okay";
863 pinctrl-0 = <&usb2_pins>;
864 pinctrl-names = "default";
865};
866
867&hsusb {
868 status = "okay";
869 pinctrl-0 = <&hsusb_pins>;
870 pinctrl-names = "default";
871 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
872};
873
874&usbphy {
875 status = "okay";
876};
877
878/* HDMI video input */
879&vin0 {
880 pinctrl-0 = <&vin0_pins>;
881 pinctrl-names = "default";
882
883 status = "okay";
884
885 port {
886 vin0ep2: endpoint {
887 remote-endpoint = <&adv7612_out>;
888 bus-width = <24>;
889 hsync-active = <0>;
890 vsync-active = <0>;
891 pclk-sample = <1>;
892 data-active = <1>;
893 };
894 };
895};
896
897/* composite video input */
898&vin1 {
899 pinctrl-0 = <&vin1_pins>;
900 pinctrl-names = "default";
901
902 status = "okay";
903
904 port {
905 #address-cells = <1>;
906 #size-cells = <0>;
907
908 vin1ep0: endpoint {
909 remote-endpoint = <&adv7180>;
910 bus-width = <8>;
911 };
912 };
913};
914
915&rcar_sound {
916 pinctrl-0 = <&sound_pins &sound_clk_pins>;
917 pinctrl-names = "default";
918
919 /* Single DAI */
920 #sound-dai-cells = <0>;
921
922 status = "okay";
923
924 rcar_sound,dai {
925 dai0 {
926 playback = <&ssi0 &src2 &dvc0>;
927 capture = <&ssi1 &src3 &dvc1>;
928 };
929 };
930};
931
932&ssi1 {
933 shared-pin;
934};
1/*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a7790.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 model = "Lager";
18 compatible = "renesas,lager", "renesas,r8a7790";
19
20 chosen {
21 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
22 };
23
24 memory@40000000 {
25 device_type = "memory";
26 reg = <0 0x40000000 0 0x80000000>;
27 };
28
29 memory@180000000 {
30 device_type = "memory";
31 reg = <1 0x80000000 0 0x80000000>;
32 };
33
34 lbsc {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 };
38
39 leds {
40 compatible = "gpio-leds";
41 led6 {
42 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
43 };
44 led7 {
45 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
46 };
47 led8 {
48 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
49 };
50 };
51
52 fixedregulator3v3: fixedregulator@0 {
53 compatible = "regulator-fixed";
54 regulator-name = "fixed-3.3V";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 regulator-boot-on;
58 regulator-always-on;
59 };
60
61 vcc_sdhi0: regulator@1 {
62 compatible = "regulator-fixed";
63
64 regulator-name = "SDHI0 Vcc";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
67
68 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
69 enable-active-high;
70 };
71
72 vccq_sdhi0: regulator@2 {
73 compatible = "regulator-gpio";
74
75 regulator-name = "SDHI0 VccQ";
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <3300000>;
78
79 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
80 gpios-states = <1>;
81 states = <3300000 1
82 1800000 0>;
83 };
84
85 vcc_sdhi2: regulator@3 {
86 compatible = "regulator-fixed";
87
88 regulator-name = "SDHI2 Vcc";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91
92 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
93 enable-active-high;
94 };
95
96 vccq_sdhi2: regulator@4 {
97 compatible = "regulator-gpio";
98
99 regulator-name = "SDHI2 VccQ";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <3300000>;
102
103 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
104 gpios-states = <1>;
105 states = <3300000 1
106 1800000 0>;
107 };
108};
109
110&extal_clk {
111 clock-frequency = <20000000>;
112};
113
114&pfc {
115 pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
116 pinctrl-names = "default";
117
118 du_pins: du {
119 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
120 renesas,function = "du";
121 };
122
123 scif0_pins: serial0 {
124 renesas,groups = "scif0_data";
125 renesas,function = "scif0";
126 };
127
128 ether_pins: ether {
129 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
130 renesas,function = "eth";
131 };
132
133 phy1_pins: phy1 {
134 renesas,groups = "intc_irq0";
135 renesas,function = "intc";
136 };
137
138 scif1_pins: serial1 {
139 renesas,groups = "scif1_data";
140 renesas,function = "scif1";
141 };
142
143 sdhi0_pins: sd0 {
144 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
145 renesas,function = "sdhi0";
146 };
147
148 sdhi2_pins: sd2 {
149 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
150 renesas,function = "sdhi2";
151 };
152
153 mmc1_pins: mmc1 {
154 renesas,groups = "mmc1_data8", "mmc1_ctrl";
155 renesas,function = "mmc1";
156 };
157
158 qspi_pins: spi {
159 renesas,groups = "qspi_ctrl", "qspi_data4";
160 renesas,function = "qspi";
161 };
162};
163
164ðer {
165 pinctrl-0 = <ðer_pins &phy1_pins>;
166 pinctrl-names = "default";
167
168 phy-handle = <&phy1>;
169 renesas,ether-link-active-low;
170 status = "ok";
171
172 phy1: ethernet-phy@1 {
173 reg = <1>;
174 interrupt-parent = <&irqc0>;
175 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
176 };
177};
178
179&mmcif1 {
180 pinctrl-0 = <&mmc1_pins>;
181 pinctrl-names = "default";
182
183 vmmc-supply = <&fixedregulator3v3>;
184 bus-width = <8>;
185 non-removable;
186 status = "okay";
187};
188
189&sata1 {
190 status = "okay";
191};
192
193&spi {
194 pinctrl-0 = <&qspi_pins>;
195 pinctrl-names = "default";
196
197 status = "okay";
198
199 flash: flash@0 {
200 #address-cells = <1>;
201 #size-cells = <1>;
202 compatible = "spansion,s25fl512s";
203 reg = <0>;
204 spi-max-frequency = <30000000>;
205 m25p,fast-read;
206
207 partition@0 {
208 label = "loader";
209 reg = <0x00000000 0x00040000>;
210 read-only;
211 };
212 partition@40000 {
213 label = "user";
214 reg = <0x00040000 0x00400000>;
215 read-only;
216 };
217 partition@440000 {
218 label = "flash";
219 reg = <0x00440000 0x03bc0000>;
220 };
221 };
222};
223
224&sdhi0 {
225 pinctrl-0 = <&sdhi0_pins>;
226 pinctrl-names = "default";
227
228 vmmc-supply = <&vcc_sdhi0>;
229 vqmmc-supply = <&vccq_sdhi0>;
230 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
231 status = "okay";
232};
233
234&sdhi2 {
235 pinctrl-0 = <&sdhi2_pins>;
236 pinctrl-names = "default";
237
238 vmmc-supply = <&vcc_sdhi2>;
239 vqmmc-supply = <&vccq_sdhi2>;
240 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
241 status = "okay";
242};