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v4.17
  1/*
  2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 as
  6 * published by the Free Software Foundation.
  7 */
  8/dts-v1/;
  9
 10#include "omap36xx.dtsi"
 11#include "omap3-evm-common.dtsi"
 12#include "omap3-evm-processor-common.dtsi"
 13
 14/ {
 15	model = "TI OMAP37XX EVM (TMDSEVM3730)";
 16	compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
 17};
 18
 19&omap3_pmx_core2 {
 20	pinctrl-names = "default";
 21	pinctrl-0 = <&hsusb2_2_pins>;
 
 22
 23	ehci_phy_pins: pinmux_ehci_phy_pins {
 24		pinctrl-single,pins = <
 
 
 
 25
 26		/* EHCI PHY reset GPIO etk_d7.gpio_21 */
 27		OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
 
 
 
 
 
 
 
 
 
 
 
 
 
 28
 29		/* EHCI VBUS etk_d8.gpio_22 */
 30		OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
 
 
 
 
 
 
 
 31		>;
 32	};
 33
 34	/* Used by OHCI and EHCI. OHCI won't work without external phy */
 35	hsusb2_2_pins: pinmux_hsusb2_2_pins {
 36		pinctrl-single,pins = <
 
 
 
 
 37
 38		/* etk_d10.hsusb2_clk */
 39		OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
 
 
 
 
 40
 41		/* etk_d11.hsusb2_stp */
 42		OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
 
 
 
 
 43
 44		/* etk_d12.hsusb2_dir */
 45		OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
 
 
 46
 47		/* etk_d13.hsusb2_nxt */
 48		OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
 
 
 49
 50		/* etk_d14.hsusb2_data0 */
 51		OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
 
 52
 53		/* etk_d15.hsusb2_data1 */
 54		OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
 55		>;
 56	};
 57};
 58
 59&gpmc {
 
 
 
 60	nand@0,0 {
 61		compatible = "ti,omap2-nand";
 62		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 63		interrupt-parent = <&gpmc>;
 64		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 65			     <1 IRQ_TYPE_NONE>;	/* termcount */
 66		linux,mtd-name= "hynix,h8kds0un0mer-4em";
 
 67		nand-bus-width = <16>;
 68		gpmc,device-width = <2>;
 69		ti,nand-ecc-opt = "bch8";
 70
 71		gpmc,sync-clk-ps = <0>;
 72		gpmc,cs-on-ns = <0>;
 73		gpmc,cs-rd-off-ns = <44>;
 74		gpmc,cs-wr-off-ns = <44>;
 75		gpmc,adv-on-ns = <6>;
 76		gpmc,adv-rd-off-ns = <34>;
 77		gpmc,adv-wr-off-ns = <44>;
 78		gpmc,we-off-ns = <40>;
 79		gpmc,oe-off-ns = <54>;
 80		gpmc,access-ns = <64>;
 81		gpmc,rd-cycle-ns = <82>;
 82		gpmc,wr-cycle-ns = <82>;
 83		gpmc,wr-access-ns = <40>;
 84		gpmc,wr-data-mux-bus-ns = <0>;
 85
 86		#address-cells = <1>;
 87		#size-cells = <1>;
 88
 89		partition@0 {
 90			label = "X-Loader";
 91			reg = <0 0x80000>;
 92		};
 93		partition@80000 {
 94			label = "U-Boot";
 95			reg = <0x80000 0x1c0000>;
 96		};
 97		partition@1c0000 {
 98			label = "Environment";
 99			reg = <0x240000 0x40000>;
100		};
101		partition@280000 {
102			label = "Kernel";
103			reg = <0x280000 0x500000>;
104		};
105		partition@780000 {
106			label = "Filesystem";
107			reg = <0x780000 0x1f880000>;
108		};
 
 
 
 
 
109	};
110};
v3.15
  1/*
  2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 as
  6 * published by the Free Software Foundation.
  7 */
  8/dts-v1/;
  9
 10#include "omap36xx.dtsi"
 11#include "omap3-evm-common.dtsi"
 12
 13
 14/ {
 15	model = "TI OMAP37XX EVM (TMDSEVM3730)";
 16	compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
 
 17
 18	memory {
 19		device_type = "memory";
 20		reg = <0x80000000 0x10000000>; /* 256 MB */
 21	};
 22
 23	wl12xx_vmmc: wl12xx_vmmc {
 24		pinctrl-names = "default";
 25		pinctrl-0 = <&wl12xx_gpio>;
 26	};
 27};
 28
 29&omap3_pmx_core {
 30	mmc1_pins: pinmux_mmc1_pins {
 31		pinctrl-single,pins = <
 32			0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
 33			0x116 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
 34			0x118 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat0.sdmmc1_dat0 */
 35			0x11a (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat1.sdmmc1_dat1 */
 36			0x11c (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat2.sdmmc1_dat2 */
 37			0x11e (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat3.sdmmc1_dat3 */
 38			0x120 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat4.sdmmc1_dat4 */
 39			0x122 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat5.sdmmc1_dat5 */
 40			0x124 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat6.sdmmc1_dat6 */
 41			0x126 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat7.sdmmc1_dat7 */
 42		>;
 43	};
 44
 45	/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
 46	mmc2_pins: pinmux_mmc2_pins {
 47		pinctrl-single,pins = <
 48			0x128 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
 49			0x12a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
 50			0x12c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
 51			0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
 52			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
 53			0x132 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
 54		>;
 55	};
 56
 57	uart3_pins: pinmux_uart3_pins {
 
 58		pinctrl-single,pins = <
 59			0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
 60			0x170 (PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
 61		>;
 62	};
 63
 64	wl12xx_gpio: pinmux_wl12xx_gpio {
 65		pinctrl-single,pins = <
 66			0x150 (PIN_OUTPUT | MUX_MODE4)		/* uart1_cts.gpio_150 */
 67			0x14e (PIN_INPUT | MUX_MODE4)		/* uart1_rts.gpio_149 */
 68		>;
 69	};
 70
 71	smsc911x_pins: pinmux_smsc911x_pins {
 72		pinctrl-single,pins = <
 73			0x1a2 (PIN_INPUT | MUX_MODE4)		/* mcspi1_cs2.gpio_176 */
 74		>;
 75	};
 76};
 77
 78&mmc1 {
 79	pinctrl-names = "default";
 80	pinctrl-0 = <&mmc1_pins>;
 81};
 82
 83&mmc2 {
 84	pinctrl-names = "default";
 85	pinctrl-0 = <&mmc2_pins>;
 86};
 87
 88&mmc3 {
 89	status = "disabled";
 90};
 91
 92&uart3 {
 93	pinctrl-names = "default";
 94	pinctrl-0 = <&uart3_pins>;
 
 95};
 96
 97&gpmc {
 98	ranges = <0 0 0x00000000 0x20000000>,
 99		 <5 0 0x2c000000 0x01000000>;
100
101	nand@0,0 {
 
 
 
 
 
102		linux,mtd-name= "hynix,h8kds0un0mer-4em";
103		reg = <0 0 0>;
104		nand-bus-width = <16>;
 
105		ti,nand-ecc-opt = "bch8";
106
107		gpmc,sync-clk-ps = <0>;
108		gpmc,cs-on-ns = <0>;
109		gpmc,cs-rd-off-ns = <44>;
110		gpmc,cs-wr-off-ns = <44>;
111		gpmc,adv-on-ns = <6>;
112		gpmc,adv-rd-off-ns = <34>;
113		gpmc,adv-wr-off-ns = <44>;
114		gpmc,we-off-ns = <40>;
115		gpmc,oe-off-ns = <54>;
116		gpmc,access-ns = <64>;
117		gpmc,rd-cycle-ns = <82>;
118		gpmc,wr-cycle-ns = <82>;
119		gpmc,wr-access-ns = <40>;
120		gpmc,wr-data-mux-bus-ns = <0>;
121
122		#address-cells = <1>;
123		#size-cells = <1>;
124
125		partition@0 {
126			label = "X-Loader";
127			reg = <0 0x80000>;
128		};
129		partition@0x80000 {
130			label = "U-Boot";
131			reg = <0x80000 0x1c0000>;
132		};
133		partition@0x1c0000 {
134			label = "Environment";
135			reg = <0x240000 0x40000>;
136		};
137		partition@0x280000 {
138			label = "Kernel";
139			reg = <0x280000 0x500000>;
140		};
141		partition@0x780000 {
142			label = "Filesystem";
143			reg = <0x780000 0x1f880000>;
144		};
145	};
146
147	ethernet@gpmc {
148		pinctrl-names = "default";
149		pinctrl-0 = <&smsc911x_pins>;
150	};
151};