1/*
  2 * This program is free software; you can redistribute it and/or modify
  3 * it under the terms of the GNU General Public License version 2 as
  4 * published by the Free Software Foundation.
  5 */
  6
  7#include <dt-bindings/input/input.h>
  8
  9/ {
 10	chosen {
 11		stdout-path = &uart1;
 12	};
 13
 14	cpus {
 15		cpu@0 {
 16			cpu0-supply = <&vcc>;
 17		};
 18	};
 19
 20	memory@80000000 {
 21		device_type = "memory";
 22		reg = <0x80000000 0>;
 23	};
 24
 25	leds {
 26		compatible = "gpio-leds";
 27		user0 {
 28			label = "user0";
 29			gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;	/* LEDA */
 30			linux,default-trigger = "none";
 31		};
 32	};
 33};
 34
 35&gpmc {
 36	ranges = <0 0 0x30000000 0x1000000>;	/* CS0: 16MB for NAND */
 37
 38	nand@0,0 {
 39		compatible = "ti,omap2-nand";
 40		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 41		interrupt-parent = <&gpmc>;
 42		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 43			     <1 IRQ_TYPE_NONE>;	/* termcount */
 44		linux,mtd-name = "micron,mt29f4g16abbda3w";
 45		nand-bus-width = <16>;
 46		ti,nand-ecc-opt = "bch8";
 47		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 48		gpmc,sync-clk-ps = <0>;
 49		gpmc,cs-on-ns = <0>;
 50		gpmc,cs-rd-off-ns = <44>;
 51		gpmc,cs-wr-off-ns = <44>;
 52		gpmc,adv-on-ns = <6>;
 53		gpmc,adv-rd-off-ns = <34>;
 54		gpmc,adv-wr-off-ns = <44>;
 55		gpmc,we-off-ns = <40>;
 56		gpmc,oe-off-ns = <54>;
 57		gpmc,access-ns = <64>;
 58		gpmc,rd-cycle-ns = <82>;
 59		gpmc,wr-cycle-ns = <82>;
 60		gpmc,wr-access-ns = <40>;
 61		gpmc,wr-data-mux-bus-ns = <0>;
 62		gpmc,device-width = <2>;
 63		#address-cells = <1>;
 64		#size-cells = <1>;
 65	};
 66};
 67
 68&i2c1 {
 69	pinctrl-names = "default";
 70	pinctrl-0 = <&i2c1_pins>;
 71	clock-frequency = <2600000>;
 72
 73	twl: twl@48 {
 74		reg = <0x48>;
 75		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 76		interrupt-parent = <&intc>;
 77		twl_audio: audio {
 78			compatible = "ti,twl4030-audio";
 79			codec {
 80			};
 81		};
 82	};
 83};
 84
 85&i2c2 {
 86	pinctrl-names = "default";
 87	pinctrl-0 = <&i2c2_pins>;
 88	clock-frequency = <400000>;
 89};
 90
 91&i2c3 {
 92	pinctrl-names = "default";
 93	pinctrl-0 = <&i2c3_pins>;
 94	clock-frequency = <400000>;
 95	at24@50 {
 96		compatible = "atmel,24c64";
 97		readonly;
 98		reg = <0x50>;
 99	};
100};
101
102&omap3_pmx_core {
103	mcbsp2_pins: pinmux_mcbsp2_pins {
104		pinctrl-single,pins = <
105			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
106			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
107			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
108			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
109		>;
110	};
111	uart2_pins: pinmux_uart2_pins {
112		pinctrl-single,pins = <
113			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
114			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
115			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
116			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
117			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* GPIO_162,BT_EN */
118		>;
119	};
120	mcspi1_pins: pinmux_mcspi1_pins {
121		pinctrl-single,pins = <
122			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
123			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
124			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
125			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
126		>;
127	};
128	hsusb_otg_pins: pinmux_hsusb_otg_pins {
129		pinctrl-single,pins = <
130			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */
131			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */
132			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
133			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
134
135			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */
136			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
137			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
138			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */
139			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */
140			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */
141			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */
142			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
143		>;
144	};
145	i2c1_pins: pinmux_i2c1_pins {
146		pinctrl-single,pins = <
147			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
148			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
149		>;
150	};
151	i2c2_pins: pinmux_i2c2_pins {
152		pinctrl-single,pins = <
153			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)	/* i2c2_scl */
154			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)	/* i2c2_sda */
155		>;
156	};
157	i2c3_pins: pinmux_i2c3_pins {
158		pinctrl-single,pins = <
159			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl */
160			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda */
161		>;
162	};
163};
164
165&uart2 {
166	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
167	pinctrl-names = "default";
168	pinctrl-0 = <&uart2_pins>;
169};
170
171&mcspi1 {
172	pinctrl-names = "default";
173	pinctrl-0 = <&mcspi1_pins>;
174};
175
176#include "twl4030.dtsi"
177#include "twl4030_omap3.dtsi"
178
179&twl {
180	twl_power: power {
181		compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
182		ti,use_poweroff;
183	};
184};
185
186&twl_gpio {
187	ti,use-leds;
188};