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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13
14/ {
15 regulators {
16 compatible = "simple-bus";
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 reg_2p5v: regulator@0 {
21 compatible = "regulator-fixed";
22 reg = <0>;
23 regulator-name = "2P5V";
24 regulator-min-microvolt = <2500000>;
25 regulator-max-microvolt = <2500000>;
26 regulator-always-on;
27 };
28
29 reg_3p3v: regulator@1 {
30 compatible = "regulator-fixed";
31 reg = <1>;
32 regulator-name = "3P3V";
33 regulator-min-microvolt = <3300000>;
34 regulator-max-microvolt = <3300000>;
35 regulator-always-on;
36 };
37 };
38
39 sound {
40 compatible = "fsl,imx6-wandboard-sgtl5000",
41 "fsl,imx-audio-sgtl5000";
42 model = "imx6-wandboard-sgtl5000";
43 ssi-controller = <&ssi1>;
44 audio-codec = <&codec>;
45 audio-routing =
46 "MIC_IN", "Mic Jack",
47 "Mic Jack", "Mic Bias",
48 "Headphone Jack", "HP_OUT";
49 mux-int-port = <1>;
50 mux-ext-port = <3>;
51 };
52
53 sound-spdif {
54 compatible = "fsl,imx-audio-spdif";
55 model = "imx-spdif";
56 spdif-controller = <&spdif>;
57 spdif-out;
58 };
59};
60
61&audmux {
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_audmux>;
64 status = "okay";
65};
66
67&hdmi {
68 ddc-i2c-bus = <&i2c1>;
69 status = "okay";
70};
71
72&i2c1 {
73 clock-frequency = <100000>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_i2c1>;
76 status = "okay";
77};
78
79&i2c2 {
80 clock-frequency = <100000>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_i2c2>;
83 status = "okay";
84
85 codec: sgtl5000@a {
86 compatible = "fsl,sgtl5000";
87 reg = <0x0a>;
88 clocks = <&clks IMX6QDL_CLK_CKO>;
89 VDDA-supply = <®_2p5v>;
90 VDDIO-supply = <®_3p3v>;
91 lrclk-strength = <3>;
92 };
93};
94
95&iomuxc {
96 pinctrl-names = "default";
97
98 imx6qdl-wandboard {
99
100 pinctrl_audmux: audmuxgrp {
101 fsl,pins = <
102 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
103 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
104 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
105 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
106 >;
107 };
108
109 pinctrl_enet: enetgrp {
110 fsl,pins = <
111 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
112 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
113 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
114 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
115 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
116 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
117 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
118 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
119 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
120 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
121 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
122 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
123 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
124 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
125 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
126 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
127 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
128 >;
129 };
130
131 pinctrl_i2c1: i2c1grp {
132 fsl,pins = <
133 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
134 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
135 >;
136 };
137
138 pinctrl_i2c2: i2c2grp {
139 fsl,pins = <
140 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
141 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
142 >;
143 };
144
145 pinctrl_spdif: spdifgrp {
146 fsl,pins = <
147 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
148 >;
149 };
150
151 pinctrl_uart1: uart1grp {
152 fsl,pins = <
153 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
154 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
155 >;
156 };
157
158 pinctrl_uart3: uart3grp {
159 fsl,pins = <
160 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
161 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
162 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
163 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
164 >;
165 };
166
167 pinctrl_usbotg: usbotggrp {
168 fsl,pins = <
169 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
170 >;
171 };
172
173 pinctrl_usdhc1: usdhc1grp {
174 fsl,pins = <
175 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
176 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
177 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
178 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
179 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
180 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
181 >;
182 };
183
184 pinctrl_usdhc2: usdhc2grp {
185 fsl,pins = <
186 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
187 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
188 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
189 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
190 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
191 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
192 >;
193 };
194
195 pinctrl_usdhc3: usdhc3grp {
196 fsl,pins = <
197 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
198 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
199 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
200 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
201 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
202 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
203 >;
204 };
205 };
206};
207
208&fec {
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_enet>;
211 phy-mode = "rgmii";
212 phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
213 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
214 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
215 fsl,err006687-workaround-present;
216 status = "okay";
217};
218
219&spdif {
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_spdif>;
222 status = "okay";
223};
224
225&ssi1 {
226 status = "okay";
227};
228
229&uart1 {
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_uart1>;
232 status = "okay";
233};
234
235&uart3 {
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_uart3>;
238 uart-has-rtscts;
239 status = "okay";
240};
241
242&usbh1 {
243 status = "okay";
244};
245
246&usbotg {
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_usbotg>;
249 disable-over-current;
250 dr_mode = "peripheral";
251 status = "okay";
252};
253
254&usdhc1 {
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_usdhc1>;
257 cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
258 status = "okay";
259};
260
261&usdhc3 {
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_usdhc3>;
264 cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
265 status = "okay";
266};
1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/ {
13 regulators {
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 reg_2p5v: regulator@0 {
19 compatible = "regulator-fixed";
20 reg = <0>;
21 regulator-name = "2P5V";
22 regulator-min-microvolt = <2500000>;
23 regulator-max-microvolt = <2500000>;
24 regulator-always-on;
25 };
26
27 reg_3p3v: regulator@1 {
28 compatible = "regulator-fixed";
29 reg = <1>;
30 regulator-name = "3P3V";
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
33 regulator-always-on;
34 };
35 };
36
37 sound {
38 compatible = "fsl,imx6-wandboard-sgtl5000",
39 "fsl,imx-audio-sgtl5000";
40 model = "imx6-wandboard-sgtl5000";
41 ssi-controller = <&ssi1>;
42 audio-codec = <&codec>;
43 audio-routing =
44 "MIC_IN", "Mic Jack",
45 "Mic Jack", "Mic Bias",
46 "Headphone Jack", "HP_OUT";
47 mux-int-port = <1>;
48 mux-ext-port = <3>;
49 };
50
51 sound-spdif {
52 compatible = "fsl,imx-audio-spdif";
53 model = "imx-spdif";
54 spdif-controller = <&spdif>;
55 spdif-out;
56 };
57};
58
59&audmux {
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_audmux>;
62 status = "okay";
63};
64
65&i2c2 {
66 clock-frequency = <100000>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_i2c2>;
69 status = "okay";
70
71 codec: sgtl5000@0a {
72 compatible = "fsl,sgtl5000";
73 reg = <0x0a>;
74 clocks = <&clks 201>;
75 VDDA-supply = <®_2p5v>;
76 VDDIO-supply = <®_3p3v>;
77 };
78};
79
80&iomuxc {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_hog>;
83
84 imx6qdl-wandboard {
85 pinctrl_hog: hoggrp {
86 fsl,pins = <
87 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
88 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
89 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
90 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 /* WL_REF_ON */
91 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* WL_RST_N */
92 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
93 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
94 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
95 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
96 >;
97 };
98
99 pinctrl_audmux: audmuxgrp {
100 fsl,pins = <
101 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
102 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
103 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
104 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
105 >;
106 };
107
108 pinctrl_enet: enetgrp {
109 fsl,pins = <
110 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
111 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
112 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
113 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
114 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
115 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
116 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
117 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
118 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
119 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
120 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
121 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
122 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
123 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
124 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
125 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
126 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
127 >;
128 };
129
130 pinctrl_i2c2: i2c2grp {
131 fsl,pins = <
132 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
133 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
134 >;
135 };
136
137 pinctrl_spdif: spdifgrp {
138 fsl,pins = <
139 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
140 >;
141 };
142
143 pinctrl_uart1: uart1grp {
144 fsl,pins = <
145 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
146 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
147 >;
148 };
149
150 pinctrl_uart3: uart3grp {
151 fsl,pins = <
152 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
153 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
154 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
155 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
156 >;
157 };
158
159 pinctrl_usbotg: usbotggrp {
160 fsl,pins = <
161 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
162 >;
163 };
164
165 pinctrl_usdhc1: usdhc1grp {
166 fsl,pins = <
167 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
168 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
169 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
170 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
171 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
172 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
173 >;
174 };
175
176 pinctrl_usdhc2: usdhc2grp {
177 fsl,pins = <
178 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
179 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
180 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
181 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
182 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
183 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
184 >;
185 };
186
187 pinctrl_usdhc3: usdhc3grp {
188 fsl,pins = <
189 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
190 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
191 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
192 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
193 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
194 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
195 >;
196 };
197 };
198};
199
200&fec {
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_enet>;
203 phy-mode = "rgmii";
204 phy-reset-gpios = <&gpio3 29 0>;
205 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
206 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
207 status = "okay";
208};
209
210&spdif {
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_spdif>;
213 status = "okay";
214};
215
216&ssi1 {
217 fsl,mode = "i2s-slave";
218 status = "okay";
219};
220
221&uart1 {
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_uart1>;
224 status = "okay";
225};
226
227&uart3 {
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_uart3>;
230 fsl,uart-has-rtscts;
231 status = "okay";
232};
233
234&usbh1 {
235 status = "okay";
236};
237
238&usbotg {
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_usbotg>;
241 disable-over-current;
242 dr_mode = "peripheral";
243 status = "okay";
244};
245
246&usdhc1 {
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_usdhc1>;
249 cd-gpios = <&gpio1 2 0>;
250 status = "okay";
251};
252
253&usdhc2 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_usdhc2>;
256 non-removable;
257 status = "okay";
258};
259
260&usdhc3 {
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_usdhc3>;
263 cd-gpios = <&gpio3 9 0>;
264 status = "okay";
265};