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1/*
2 * Faraday FTMAC100 10/100 Ethernet
3 *
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/dma-mapping.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/io.h>
30#include <linux/mii.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/platform_device.h>
34
35#include "ftmac100.h"
36
37#define DRV_NAME "ftmac100"
38#define DRV_VERSION "0.2"
39
40#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
41#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
42
43#define MAX_PKT_SIZE 1518
44#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
45
46#if MAX_PKT_SIZE > 0x7ff
47#error invalid MAX_PKT_SIZE
48#endif
49
50#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
51#error invalid RX_BUF_SIZE
52#endif
53
54/******************************************************************************
55 * private data
56 *****************************************************************************/
57struct ftmac100_descs {
58 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
59 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
60};
61
62struct ftmac100 {
63 struct resource *res;
64 void __iomem *base;
65 int irq;
66
67 struct ftmac100_descs *descs;
68 dma_addr_t descs_dma_addr;
69
70 unsigned int rx_pointer;
71 unsigned int tx_clean_pointer;
72 unsigned int tx_pointer;
73 unsigned int tx_pending;
74
75 spinlock_t tx_lock;
76
77 struct net_device *netdev;
78 struct device *dev;
79 struct napi_struct napi;
80
81 struct mii_if_info mii;
82};
83
84static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
85 struct ftmac100_rxdes *rxdes, gfp_t gfp);
86
87/******************************************************************************
88 * internal functions (hardware register access)
89 *****************************************************************************/
90#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
91 FTMAC100_INT_NORXBUF | \
92 FTMAC100_INT_XPKT_OK | \
93 FTMAC100_INT_XPKT_LOST | \
94 FTMAC100_INT_RPKT_LOST | \
95 FTMAC100_INT_AHB_ERR | \
96 FTMAC100_INT_PHYSTS_CHG)
97
98#define INT_MASK_ALL_DISABLED 0
99
100static void ftmac100_enable_all_int(struct ftmac100 *priv)
101{
102 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
103}
104
105static void ftmac100_disable_all_int(struct ftmac100 *priv)
106{
107 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
108}
109
110static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
111{
112 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
113}
114
115static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
116{
117 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
118}
119
120static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
121{
122 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
123}
124
125static int ftmac100_reset(struct ftmac100 *priv)
126{
127 struct net_device *netdev = priv->netdev;
128 int i;
129
130 /* NOTE: reset clears all registers */
131 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
132
133 for (i = 0; i < 5; i++) {
134 unsigned int maccr;
135
136 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
137 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
138 /*
139 * FTMAC100_MACCR_SW_RST cleared does not indicate
140 * that hardware reset completed (what the f*ck).
141 * We still need to wait for a while.
142 */
143 udelay(500);
144 return 0;
145 }
146
147 udelay(1000);
148 }
149
150 netdev_err(netdev, "software reset failed\n");
151 return -EIO;
152}
153
154static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
155{
156 unsigned int maddr = mac[0] << 8 | mac[1];
157 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
158
159 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
160 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
161}
162
163#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
164 FTMAC100_MACCR_RCV_EN | \
165 FTMAC100_MACCR_XDMA_EN | \
166 FTMAC100_MACCR_RDMA_EN | \
167 FTMAC100_MACCR_CRC_APD | \
168 FTMAC100_MACCR_FULLDUP | \
169 FTMAC100_MACCR_RX_RUNT | \
170 FTMAC100_MACCR_RX_BROADPKT)
171
172static int ftmac100_start_hw(struct ftmac100 *priv)
173{
174 struct net_device *netdev = priv->netdev;
175
176 if (ftmac100_reset(priv))
177 return -EIO;
178
179 /* setup ring buffer base registers */
180 ftmac100_set_rx_ring_base(priv,
181 priv->descs_dma_addr +
182 offsetof(struct ftmac100_descs, rxdes));
183 ftmac100_set_tx_ring_base(priv,
184 priv->descs_dma_addr +
185 offsetof(struct ftmac100_descs, txdes));
186
187 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
188
189 ftmac100_set_mac(priv, netdev->dev_addr);
190
191 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
192 return 0;
193}
194
195static void ftmac100_stop_hw(struct ftmac100 *priv)
196{
197 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
198}
199
200/******************************************************************************
201 * internal functions (receive descriptor)
202 *****************************************************************************/
203static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
204{
205 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
206}
207
208static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
209{
210 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
211}
212
213static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
214{
215 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
216}
217
218static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
219{
220 /* clear status bits */
221 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
222}
223
224static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
225{
226 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
227}
228
229static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
230{
231 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
232}
233
234static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
235{
236 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
237}
238
239static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
240{
241 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
242}
243
244static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
245{
246 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
247}
248
249static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
250{
251 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
252}
253
254static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
255{
256 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
257}
258
259static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
260 unsigned int size)
261{
262 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
263 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
264}
265
266static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
267{
268 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
269}
270
271static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
272 dma_addr_t addr)
273{
274 rxdes->rxdes2 = cpu_to_le32(addr);
275}
276
277static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
278{
279 return le32_to_cpu(rxdes->rxdes2);
280}
281
282/*
283 * rxdes3 is not used by hardware. We use it to keep track of page.
284 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
285 */
286static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
287{
288 rxdes->rxdes3 = (unsigned int)page;
289}
290
291static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
292{
293 return (struct page *)rxdes->rxdes3;
294}
295
296/******************************************************************************
297 * internal functions (receive)
298 *****************************************************************************/
299static int ftmac100_next_rx_pointer(int pointer)
300{
301 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
302}
303
304static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
305{
306 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
307}
308
309static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
310{
311 return &priv->descs->rxdes[priv->rx_pointer];
312}
313
314static struct ftmac100_rxdes *
315ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
316{
317 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
318
319 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
320 if (ftmac100_rxdes_first_segment(rxdes))
321 return rxdes;
322
323 ftmac100_rxdes_set_dma_own(rxdes);
324 ftmac100_rx_pointer_advance(priv);
325 rxdes = ftmac100_current_rxdes(priv);
326 }
327
328 return NULL;
329}
330
331static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
332 struct ftmac100_rxdes *rxdes)
333{
334 struct net_device *netdev = priv->netdev;
335 bool error = false;
336
337 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
338 if (net_ratelimit())
339 netdev_info(netdev, "rx err\n");
340
341 netdev->stats.rx_errors++;
342 error = true;
343 }
344
345 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
346 if (net_ratelimit())
347 netdev_info(netdev, "rx crc err\n");
348
349 netdev->stats.rx_crc_errors++;
350 error = true;
351 }
352
353 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
354 if (net_ratelimit())
355 netdev_info(netdev, "rx frame too long\n");
356
357 netdev->stats.rx_length_errors++;
358 error = true;
359 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
360 if (net_ratelimit())
361 netdev_info(netdev, "rx runt\n");
362
363 netdev->stats.rx_length_errors++;
364 error = true;
365 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
366 if (net_ratelimit())
367 netdev_info(netdev, "rx odd nibble\n");
368
369 netdev->stats.rx_length_errors++;
370 error = true;
371 }
372
373 return error;
374}
375
376static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
377{
378 struct net_device *netdev = priv->netdev;
379 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
380 bool done = false;
381
382 if (net_ratelimit())
383 netdev_dbg(netdev, "drop packet %p\n", rxdes);
384
385 do {
386 if (ftmac100_rxdes_last_segment(rxdes))
387 done = true;
388
389 ftmac100_rxdes_set_dma_own(rxdes);
390 ftmac100_rx_pointer_advance(priv);
391 rxdes = ftmac100_current_rxdes(priv);
392 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
393
394 netdev->stats.rx_dropped++;
395}
396
397static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
398{
399 struct net_device *netdev = priv->netdev;
400 struct ftmac100_rxdes *rxdes;
401 struct sk_buff *skb;
402 struct page *page;
403 dma_addr_t map;
404 int length;
405 bool ret;
406
407 rxdes = ftmac100_rx_locate_first_segment(priv);
408 if (!rxdes)
409 return false;
410
411 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
412 ftmac100_rx_drop_packet(priv);
413 return true;
414 }
415
416 /*
417 * It is impossible to get multi-segment packets
418 * because we always provide big enough receive buffers.
419 */
420 ret = ftmac100_rxdes_last_segment(rxdes);
421 BUG_ON(!ret);
422
423 /* start processing */
424 skb = netdev_alloc_skb_ip_align(netdev, 128);
425 if (unlikely(!skb)) {
426 if (net_ratelimit())
427 netdev_err(netdev, "rx skb alloc failed\n");
428
429 ftmac100_rx_drop_packet(priv);
430 return true;
431 }
432
433 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
434 netdev->stats.multicast++;
435
436 map = ftmac100_rxdes_get_dma_addr(rxdes);
437 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
438
439 length = ftmac100_rxdes_frame_length(rxdes);
440 page = ftmac100_rxdes_get_page(rxdes);
441 skb_fill_page_desc(skb, 0, page, 0, length);
442 skb->len += length;
443 skb->data_len += length;
444
445 if (length > 128) {
446 skb->truesize += PAGE_SIZE;
447 /* We pull the minimum amount into linear part */
448 __pskb_pull_tail(skb, ETH_HLEN);
449 } else {
450 /* Small frames are copied into linear part to free one page */
451 __pskb_pull_tail(skb, length);
452 }
453 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
454
455 ftmac100_rx_pointer_advance(priv);
456
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 netdev->stats.rx_packets++;
460 netdev->stats.rx_bytes += skb->len;
461
462 /* push packet to protocol stack */
463 netif_receive_skb(skb);
464
465 (*processed)++;
466 return true;
467}
468
469/******************************************************************************
470 * internal functions (transmit descriptor)
471 *****************************************************************************/
472static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
473{
474 /* clear all except end of ring bit */
475 txdes->txdes0 = 0;
476 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
477 txdes->txdes2 = 0;
478 txdes->txdes3 = 0;
479}
480
481static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
482{
483 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
484}
485
486static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
487{
488 /*
489 * Make sure dma own bit will not be set before any other
490 * descriptor fields.
491 */
492 wmb();
493 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
494}
495
496static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
497{
498 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
499}
500
501static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
502{
503 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
504}
505
506static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
507{
508 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
509}
510
511static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
512{
513 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
514}
515
516static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
517{
518 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
519}
520
521static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
522{
523 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
524}
525
526static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
527 unsigned int len)
528{
529 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
530}
531
532static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
533 dma_addr_t addr)
534{
535 txdes->txdes2 = cpu_to_le32(addr);
536}
537
538static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
539{
540 return le32_to_cpu(txdes->txdes2);
541}
542
543/*
544 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
545 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
546 */
547static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
548{
549 txdes->txdes3 = (unsigned int)skb;
550}
551
552static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
553{
554 return (struct sk_buff *)txdes->txdes3;
555}
556
557/******************************************************************************
558 * internal functions (transmit)
559 *****************************************************************************/
560static int ftmac100_next_tx_pointer(int pointer)
561{
562 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
563}
564
565static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
566{
567 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
568}
569
570static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
571{
572 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
573}
574
575static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
576{
577 return &priv->descs->txdes[priv->tx_pointer];
578}
579
580static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
581{
582 return &priv->descs->txdes[priv->tx_clean_pointer];
583}
584
585static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
586{
587 struct net_device *netdev = priv->netdev;
588 struct ftmac100_txdes *txdes;
589 struct sk_buff *skb;
590 dma_addr_t map;
591
592 if (priv->tx_pending == 0)
593 return false;
594
595 txdes = ftmac100_current_clean_txdes(priv);
596
597 if (ftmac100_txdes_owned_by_dma(txdes))
598 return false;
599
600 skb = ftmac100_txdes_get_skb(txdes);
601 map = ftmac100_txdes_get_dma_addr(txdes);
602
603 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
604 ftmac100_txdes_late_collision(txdes))) {
605 /*
606 * packet transmitted to ethernet lost due to late collision
607 * or excessive collision
608 */
609 netdev->stats.tx_aborted_errors++;
610 } else {
611 netdev->stats.tx_packets++;
612 netdev->stats.tx_bytes += skb->len;
613 }
614
615 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
616 dev_kfree_skb(skb);
617
618 ftmac100_txdes_reset(txdes);
619
620 ftmac100_tx_clean_pointer_advance(priv);
621
622 spin_lock(&priv->tx_lock);
623 priv->tx_pending--;
624 spin_unlock(&priv->tx_lock);
625 netif_wake_queue(netdev);
626
627 return true;
628}
629
630static void ftmac100_tx_complete(struct ftmac100 *priv)
631{
632 while (ftmac100_tx_complete_packet(priv))
633 ;
634}
635
636static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
637 dma_addr_t map)
638{
639 struct net_device *netdev = priv->netdev;
640 struct ftmac100_txdes *txdes;
641 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
642
643 txdes = ftmac100_current_txdes(priv);
644 ftmac100_tx_pointer_advance(priv);
645
646 /* setup TX descriptor */
647 ftmac100_txdes_set_skb(txdes, skb);
648 ftmac100_txdes_set_dma_addr(txdes, map);
649
650 ftmac100_txdes_set_first_segment(txdes);
651 ftmac100_txdes_set_last_segment(txdes);
652 ftmac100_txdes_set_txint(txdes);
653 ftmac100_txdes_set_buffer_size(txdes, len);
654
655 spin_lock(&priv->tx_lock);
656 priv->tx_pending++;
657 if (priv->tx_pending == TX_QUEUE_ENTRIES)
658 netif_stop_queue(netdev);
659
660 /* start transmit */
661 ftmac100_txdes_set_dma_own(txdes);
662 spin_unlock(&priv->tx_lock);
663
664 ftmac100_txdma_start_polling(priv);
665 return NETDEV_TX_OK;
666}
667
668/******************************************************************************
669 * internal functions (buffer)
670 *****************************************************************************/
671static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
672 struct ftmac100_rxdes *rxdes, gfp_t gfp)
673{
674 struct net_device *netdev = priv->netdev;
675 struct page *page;
676 dma_addr_t map;
677
678 page = alloc_page(gfp);
679 if (!page) {
680 if (net_ratelimit())
681 netdev_err(netdev, "failed to allocate rx page\n");
682 return -ENOMEM;
683 }
684
685 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
686 if (unlikely(dma_mapping_error(priv->dev, map))) {
687 if (net_ratelimit())
688 netdev_err(netdev, "failed to map rx page\n");
689 __free_page(page);
690 return -ENOMEM;
691 }
692
693 ftmac100_rxdes_set_page(rxdes, page);
694 ftmac100_rxdes_set_dma_addr(rxdes, map);
695 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
696 ftmac100_rxdes_set_dma_own(rxdes);
697 return 0;
698}
699
700static void ftmac100_free_buffers(struct ftmac100 *priv)
701{
702 int i;
703
704 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
705 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
706 struct page *page = ftmac100_rxdes_get_page(rxdes);
707 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
708
709 if (!page)
710 continue;
711
712 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
713 __free_page(page);
714 }
715
716 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
717 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
718 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
719 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
720
721 if (!skb)
722 continue;
723
724 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
725 dev_kfree_skb(skb);
726 }
727
728 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
729 priv->descs, priv->descs_dma_addr);
730}
731
732static int ftmac100_alloc_buffers(struct ftmac100 *priv)
733{
734 int i;
735
736 priv->descs = dma_zalloc_coherent(priv->dev,
737 sizeof(struct ftmac100_descs),
738 &priv->descs_dma_addr,
739 GFP_KERNEL);
740 if (!priv->descs)
741 return -ENOMEM;
742
743 /* initialize RX ring */
744 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
745
746 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
747 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
748
749 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
750 goto err;
751 }
752
753 /* initialize TX ring */
754 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
755 return 0;
756
757err:
758 ftmac100_free_buffers(priv);
759 return -ENOMEM;
760}
761
762/******************************************************************************
763 * struct mii_if_info functions
764 *****************************************************************************/
765static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
766{
767 struct ftmac100 *priv = netdev_priv(netdev);
768 unsigned int phycr;
769 int i;
770
771 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
772 FTMAC100_PHYCR_REGAD(reg) |
773 FTMAC100_PHYCR_MIIRD;
774
775 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
776
777 for (i = 0; i < 10; i++) {
778 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
779
780 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
781 return phycr & FTMAC100_PHYCR_MIIRDATA;
782
783 udelay(100);
784 }
785
786 netdev_err(netdev, "mdio read timed out\n");
787 return 0;
788}
789
790static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
791 int data)
792{
793 struct ftmac100 *priv = netdev_priv(netdev);
794 unsigned int phycr;
795 int i;
796
797 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
798 FTMAC100_PHYCR_REGAD(reg) |
799 FTMAC100_PHYCR_MIIWR;
800
801 data = FTMAC100_PHYWDATA_MIIWDATA(data);
802
803 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
804 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
805
806 for (i = 0; i < 10; i++) {
807 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
808
809 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
810 return;
811
812 udelay(100);
813 }
814
815 netdev_err(netdev, "mdio write timed out\n");
816}
817
818/******************************************************************************
819 * struct ethtool_ops functions
820 *****************************************************************************/
821static void ftmac100_get_drvinfo(struct net_device *netdev,
822 struct ethtool_drvinfo *info)
823{
824 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
825 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
826 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
827}
828
829static int ftmac100_get_link_ksettings(struct net_device *netdev,
830 struct ethtool_link_ksettings *cmd)
831{
832 struct ftmac100 *priv = netdev_priv(netdev);
833
834 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
835
836 return 0;
837}
838
839static int ftmac100_set_link_ksettings(struct net_device *netdev,
840 const struct ethtool_link_ksettings *cmd)
841{
842 struct ftmac100 *priv = netdev_priv(netdev);
843 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
844}
845
846static int ftmac100_nway_reset(struct net_device *netdev)
847{
848 struct ftmac100 *priv = netdev_priv(netdev);
849 return mii_nway_restart(&priv->mii);
850}
851
852static u32 ftmac100_get_link(struct net_device *netdev)
853{
854 struct ftmac100 *priv = netdev_priv(netdev);
855 return mii_link_ok(&priv->mii);
856}
857
858static const struct ethtool_ops ftmac100_ethtool_ops = {
859 .get_drvinfo = ftmac100_get_drvinfo,
860 .nway_reset = ftmac100_nway_reset,
861 .get_link = ftmac100_get_link,
862 .get_link_ksettings = ftmac100_get_link_ksettings,
863 .set_link_ksettings = ftmac100_set_link_ksettings,
864};
865
866/******************************************************************************
867 * interrupt handler
868 *****************************************************************************/
869static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
870{
871 struct net_device *netdev = dev_id;
872 struct ftmac100 *priv = netdev_priv(netdev);
873
874 if (likely(netif_running(netdev))) {
875 /* Disable interrupts for polling */
876 ftmac100_disable_all_int(priv);
877 napi_schedule(&priv->napi);
878 }
879
880 return IRQ_HANDLED;
881}
882
883/******************************************************************************
884 * struct napi_struct functions
885 *****************************************************************************/
886static int ftmac100_poll(struct napi_struct *napi, int budget)
887{
888 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
889 struct net_device *netdev = priv->netdev;
890 unsigned int status;
891 bool completed = true;
892 int rx = 0;
893
894 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
895
896 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
897 /*
898 * FTMAC100_INT_RPKT_FINISH:
899 * RX DMA has received packets into RX buffer successfully
900 *
901 * FTMAC100_INT_NORXBUF:
902 * RX buffer unavailable
903 */
904 bool retry;
905
906 do {
907 retry = ftmac100_rx_packet(priv, &rx);
908 } while (retry && rx < budget);
909
910 if (retry && rx == budget)
911 completed = false;
912 }
913
914 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
915 /*
916 * FTMAC100_INT_XPKT_OK:
917 * packet transmitted to ethernet successfully
918 *
919 * FTMAC100_INT_XPKT_LOST:
920 * packet transmitted to ethernet lost due to late
921 * collision or excessive collision
922 */
923 ftmac100_tx_complete(priv);
924 }
925
926 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
927 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
928 if (net_ratelimit())
929 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
930 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
931 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
932 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
933 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
934
935 if (status & FTMAC100_INT_NORXBUF) {
936 /* RX buffer unavailable */
937 netdev->stats.rx_over_errors++;
938 }
939
940 if (status & FTMAC100_INT_RPKT_LOST) {
941 /* received packet lost due to RX FIFO full */
942 netdev->stats.rx_fifo_errors++;
943 }
944
945 if (status & FTMAC100_INT_PHYSTS_CHG) {
946 /* PHY link status change */
947 mii_check_link(&priv->mii);
948 }
949 }
950
951 if (completed) {
952 /* stop polling */
953 napi_complete(napi);
954 ftmac100_enable_all_int(priv);
955 }
956
957 return rx;
958}
959
960/******************************************************************************
961 * struct net_device_ops functions
962 *****************************************************************************/
963static int ftmac100_open(struct net_device *netdev)
964{
965 struct ftmac100 *priv = netdev_priv(netdev);
966 int err;
967
968 err = ftmac100_alloc_buffers(priv);
969 if (err) {
970 netdev_err(netdev, "failed to allocate buffers\n");
971 goto err_alloc;
972 }
973
974 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
975 if (err) {
976 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
977 goto err_irq;
978 }
979
980 priv->rx_pointer = 0;
981 priv->tx_clean_pointer = 0;
982 priv->tx_pointer = 0;
983 priv->tx_pending = 0;
984
985 err = ftmac100_start_hw(priv);
986 if (err)
987 goto err_hw;
988
989 napi_enable(&priv->napi);
990 netif_start_queue(netdev);
991
992 ftmac100_enable_all_int(priv);
993
994 return 0;
995
996err_hw:
997 free_irq(priv->irq, netdev);
998err_irq:
999 ftmac100_free_buffers(priv);
1000err_alloc:
1001 return err;
1002}
1003
1004static int ftmac100_stop(struct net_device *netdev)
1005{
1006 struct ftmac100 *priv = netdev_priv(netdev);
1007
1008 ftmac100_disable_all_int(priv);
1009 netif_stop_queue(netdev);
1010 napi_disable(&priv->napi);
1011 ftmac100_stop_hw(priv);
1012 free_irq(priv->irq, netdev);
1013 ftmac100_free_buffers(priv);
1014
1015 return 0;
1016}
1017
1018static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1019{
1020 struct ftmac100 *priv = netdev_priv(netdev);
1021 dma_addr_t map;
1022
1023 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1024 if (net_ratelimit())
1025 netdev_dbg(netdev, "tx packet too big\n");
1026
1027 netdev->stats.tx_dropped++;
1028 dev_kfree_skb(skb);
1029 return NETDEV_TX_OK;
1030 }
1031
1032 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1033 if (unlikely(dma_mapping_error(priv->dev, map))) {
1034 /* drop packet */
1035 if (net_ratelimit())
1036 netdev_err(netdev, "map socket buffer failed\n");
1037
1038 netdev->stats.tx_dropped++;
1039 dev_kfree_skb(skb);
1040 return NETDEV_TX_OK;
1041 }
1042
1043 return ftmac100_xmit(priv, skb, map);
1044}
1045
1046/* optional */
1047static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1048{
1049 struct ftmac100 *priv = netdev_priv(netdev);
1050 struct mii_ioctl_data *data = if_mii(ifr);
1051
1052 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1053}
1054
1055static const struct net_device_ops ftmac100_netdev_ops = {
1056 .ndo_open = ftmac100_open,
1057 .ndo_stop = ftmac100_stop,
1058 .ndo_start_xmit = ftmac100_hard_start_xmit,
1059 .ndo_set_mac_address = eth_mac_addr,
1060 .ndo_validate_addr = eth_validate_addr,
1061 .ndo_do_ioctl = ftmac100_do_ioctl,
1062};
1063
1064/******************************************************************************
1065 * struct platform_driver functions
1066 *****************************************************************************/
1067static int ftmac100_probe(struct platform_device *pdev)
1068{
1069 struct resource *res;
1070 int irq;
1071 struct net_device *netdev;
1072 struct ftmac100 *priv;
1073 int err;
1074
1075 if (!pdev)
1076 return -ENODEV;
1077
1078 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1079 if (!res)
1080 return -ENXIO;
1081
1082 irq = platform_get_irq(pdev, 0);
1083 if (irq < 0)
1084 return irq;
1085
1086 /* setup net_device */
1087 netdev = alloc_etherdev(sizeof(*priv));
1088 if (!netdev) {
1089 err = -ENOMEM;
1090 goto err_alloc_etherdev;
1091 }
1092
1093 SET_NETDEV_DEV(netdev, &pdev->dev);
1094 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1095 netdev->netdev_ops = &ftmac100_netdev_ops;
1096
1097 platform_set_drvdata(pdev, netdev);
1098
1099 /* setup private data */
1100 priv = netdev_priv(netdev);
1101 priv->netdev = netdev;
1102 priv->dev = &pdev->dev;
1103
1104 spin_lock_init(&priv->tx_lock);
1105
1106 /* initialize NAPI */
1107 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1108
1109 /* map io memory */
1110 priv->res = request_mem_region(res->start, resource_size(res),
1111 dev_name(&pdev->dev));
1112 if (!priv->res) {
1113 dev_err(&pdev->dev, "Could not reserve memory region\n");
1114 err = -ENOMEM;
1115 goto err_req_mem;
1116 }
1117
1118 priv->base = ioremap(res->start, resource_size(res));
1119 if (!priv->base) {
1120 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1121 err = -EIO;
1122 goto err_ioremap;
1123 }
1124
1125 priv->irq = irq;
1126
1127 /* initialize struct mii_if_info */
1128 priv->mii.phy_id = 0;
1129 priv->mii.phy_id_mask = 0x1f;
1130 priv->mii.reg_num_mask = 0x1f;
1131 priv->mii.dev = netdev;
1132 priv->mii.mdio_read = ftmac100_mdio_read;
1133 priv->mii.mdio_write = ftmac100_mdio_write;
1134
1135 /* register network device */
1136 err = register_netdev(netdev);
1137 if (err) {
1138 dev_err(&pdev->dev, "Failed to register netdev\n");
1139 goto err_register_netdev;
1140 }
1141
1142 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1143
1144 if (!is_valid_ether_addr(netdev->dev_addr)) {
1145 eth_hw_addr_random(netdev);
1146 netdev_info(netdev, "generated random MAC address %pM\n",
1147 netdev->dev_addr);
1148 }
1149
1150 return 0;
1151
1152err_register_netdev:
1153 iounmap(priv->base);
1154err_ioremap:
1155 release_resource(priv->res);
1156err_req_mem:
1157 netif_napi_del(&priv->napi);
1158 free_netdev(netdev);
1159err_alloc_etherdev:
1160 return err;
1161}
1162
1163static int ftmac100_remove(struct platform_device *pdev)
1164{
1165 struct net_device *netdev;
1166 struct ftmac100 *priv;
1167
1168 netdev = platform_get_drvdata(pdev);
1169 priv = netdev_priv(netdev);
1170
1171 unregister_netdev(netdev);
1172
1173 iounmap(priv->base);
1174 release_resource(priv->res);
1175
1176 netif_napi_del(&priv->napi);
1177 free_netdev(netdev);
1178 return 0;
1179}
1180
1181static const struct of_device_id ftmac100_of_ids[] = {
1182 { .compatible = "andestech,atmac100" },
1183 { }
1184};
1185
1186static struct platform_driver ftmac100_driver = {
1187 .probe = ftmac100_probe,
1188 .remove = ftmac100_remove,
1189 .driver = {
1190 .name = DRV_NAME,
1191 .of_match_table = ftmac100_of_ids
1192 },
1193};
1194
1195/******************************************************************************
1196 * initialization / finalization
1197 *****************************************************************************/
1198static int __init ftmac100_init(void)
1199{
1200 pr_info("Loading version " DRV_VERSION " ...\n");
1201 return platform_driver_register(&ftmac100_driver);
1202}
1203
1204static void __exit ftmac100_exit(void)
1205{
1206 platform_driver_unregister(&ftmac100_driver);
1207}
1208
1209module_init(ftmac100_init);
1210module_exit(ftmac100_exit);
1211
1212MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1213MODULE_DESCRIPTION("FTMAC100 driver");
1214MODULE_LICENSE("GPL");
1215MODULE_DEVICE_TABLE(of, ftmac100_of_ids);
1/*
2 * Faraday FTMAC100 10/100 Ethernet
3 *
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/dma-mapping.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/io.h>
30#include <linux/mii.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/platform_device.h>
34
35#include "ftmac100.h"
36
37#define DRV_NAME "ftmac100"
38#define DRV_VERSION "0.2"
39
40#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
41#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
42
43#define MAX_PKT_SIZE 1518
44#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
45
46#if MAX_PKT_SIZE > 0x7ff
47#error invalid MAX_PKT_SIZE
48#endif
49
50#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
51#error invalid RX_BUF_SIZE
52#endif
53
54/******************************************************************************
55 * private data
56 *****************************************************************************/
57struct ftmac100_descs {
58 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
59 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
60};
61
62struct ftmac100 {
63 struct resource *res;
64 void __iomem *base;
65 int irq;
66
67 struct ftmac100_descs *descs;
68 dma_addr_t descs_dma_addr;
69
70 unsigned int rx_pointer;
71 unsigned int tx_clean_pointer;
72 unsigned int tx_pointer;
73 unsigned int tx_pending;
74
75 spinlock_t tx_lock;
76
77 struct net_device *netdev;
78 struct device *dev;
79 struct napi_struct napi;
80
81 struct mii_if_info mii;
82};
83
84static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
85 struct ftmac100_rxdes *rxdes, gfp_t gfp);
86
87/******************************************************************************
88 * internal functions (hardware register access)
89 *****************************************************************************/
90#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
91 FTMAC100_INT_NORXBUF | \
92 FTMAC100_INT_XPKT_OK | \
93 FTMAC100_INT_XPKT_LOST | \
94 FTMAC100_INT_RPKT_LOST | \
95 FTMAC100_INT_AHB_ERR | \
96 FTMAC100_INT_PHYSTS_CHG)
97
98#define INT_MASK_ALL_DISABLED 0
99
100static void ftmac100_enable_all_int(struct ftmac100 *priv)
101{
102 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
103}
104
105static void ftmac100_disable_all_int(struct ftmac100 *priv)
106{
107 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
108}
109
110static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
111{
112 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
113}
114
115static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
116{
117 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
118}
119
120static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
121{
122 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
123}
124
125static int ftmac100_reset(struct ftmac100 *priv)
126{
127 struct net_device *netdev = priv->netdev;
128 int i;
129
130 /* NOTE: reset clears all registers */
131 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
132
133 for (i = 0; i < 5; i++) {
134 unsigned int maccr;
135
136 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
137 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
138 /*
139 * FTMAC100_MACCR_SW_RST cleared does not indicate
140 * that hardware reset completed (what the f*ck).
141 * We still need to wait for a while.
142 */
143 udelay(500);
144 return 0;
145 }
146
147 udelay(1000);
148 }
149
150 netdev_err(netdev, "software reset failed\n");
151 return -EIO;
152}
153
154static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
155{
156 unsigned int maddr = mac[0] << 8 | mac[1];
157 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
158
159 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
160 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
161}
162
163#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
164 FTMAC100_MACCR_RCV_EN | \
165 FTMAC100_MACCR_XDMA_EN | \
166 FTMAC100_MACCR_RDMA_EN | \
167 FTMAC100_MACCR_CRC_APD | \
168 FTMAC100_MACCR_FULLDUP | \
169 FTMAC100_MACCR_RX_RUNT | \
170 FTMAC100_MACCR_RX_BROADPKT)
171
172static int ftmac100_start_hw(struct ftmac100 *priv)
173{
174 struct net_device *netdev = priv->netdev;
175
176 if (ftmac100_reset(priv))
177 return -EIO;
178
179 /* setup ring buffer base registers */
180 ftmac100_set_rx_ring_base(priv,
181 priv->descs_dma_addr +
182 offsetof(struct ftmac100_descs, rxdes));
183 ftmac100_set_tx_ring_base(priv,
184 priv->descs_dma_addr +
185 offsetof(struct ftmac100_descs, txdes));
186
187 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
188
189 ftmac100_set_mac(priv, netdev->dev_addr);
190
191 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
192 return 0;
193}
194
195static void ftmac100_stop_hw(struct ftmac100 *priv)
196{
197 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
198}
199
200/******************************************************************************
201 * internal functions (receive descriptor)
202 *****************************************************************************/
203static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
204{
205 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
206}
207
208static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
209{
210 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
211}
212
213static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
214{
215 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
216}
217
218static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
219{
220 /* clear status bits */
221 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
222}
223
224static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
225{
226 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
227}
228
229static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
230{
231 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
232}
233
234static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
235{
236 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
237}
238
239static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
240{
241 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
242}
243
244static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
245{
246 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
247}
248
249static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
250{
251 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
252}
253
254static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
255{
256 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
257}
258
259static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
260 unsigned int size)
261{
262 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
263 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
264}
265
266static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
267{
268 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
269}
270
271static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
272 dma_addr_t addr)
273{
274 rxdes->rxdes2 = cpu_to_le32(addr);
275}
276
277static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
278{
279 return le32_to_cpu(rxdes->rxdes2);
280}
281
282/*
283 * rxdes3 is not used by hardware. We use it to keep track of page.
284 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
285 */
286static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
287{
288 rxdes->rxdes3 = (unsigned int)page;
289}
290
291static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
292{
293 return (struct page *)rxdes->rxdes3;
294}
295
296/******************************************************************************
297 * internal functions (receive)
298 *****************************************************************************/
299static int ftmac100_next_rx_pointer(int pointer)
300{
301 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
302}
303
304static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
305{
306 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
307}
308
309static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
310{
311 return &priv->descs->rxdes[priv->rx_pointer];
312}
313
314static struct ftmac100_rxdes *
315ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
316{
317 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
318
319 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
320 if (ftmac100_rxdes_first_segment(rxdes))
321 return rxdes;
322
323 ftmac100_rxdes_set_dma_own(rxdes);
324 ftmac100_rx_pointer_advance(priv);
325 rxdes = ftmac100_current_rxdes(priv);
326 }
327
328 return NULL;
329}
330
331static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
332 struct ftmac100_rxdes *rxdes)
333{
334 struct net_device *netdev = priv->netdev;
335 bool error = false;
336
337 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
338 if (net_ratelimit())
339 netdev_info(netdev, "rx err\n");
340
341 netdev->stats.rx_errors++;
342 error = true;
343 }
344
345 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
346 if (net_ratelimit())
347 netdev_info(netdev, "rx crc err\n");
348
349 netdev->stats.rx_crc_errors++;
350 error = true;
351 }
352
353 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
354 if (net_ratelimit())
355 netdev_info(netdev, "rx frame too long\n");
356
357 netdev->stats.rx_length_errors++;
358 error = true;
359 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
360 if (net_ratelimit())
361 netdev_info(netdev, "rx runt\n");
362
363 netdev->stats.rx_length_errors++;
364 error = true;
365 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
366 if (net_ratelimit())
367 netdev_info(netdev, "rx odd nibble\n");
368
369 netdev->stats.rx_length_errors++;
370 error = true;
371 }
372
373 return error;
374}
375
376static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
377{
378 struct net_device *netdev = priv->netdev;
379 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
380 bool done = false;
381
382 if (net_ratelimit())
383 netdev_dbg(netdev, "drop packet %p\n", rxdes);
384
385 do {
386 if (ftmac100_rxdes_last_segment(rxdes))
387 done = true;
388
389 ftmac100_rxdes_set_dma_own(rxdes);
390 ftmac100_rx_pointer_advance(priv);
391 rxdes = ftmac100_current_rxdes(priv);
392 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
393
394 netdev->stats.rx_dropped++;
395}
396
397static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
398{
399 struct net_device *netdev = priv->netdev;
400 struct ftmac100_rxdes *rxdes;
401 struct sk_buff *skb;
402 struct page *page;
403 dma_addr_t map;
404 int length;
405
406 rxdes = ftmac100_rx_locate_first_segment(priv);
407 if (!rxdes)
408 return false;
409
410 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
411 ftmac100_rx_drop_packet(priv);
412 return true;
413 }
414
415 /*
416 * It is impossible to get multi-segment packets
417 * because we always provide big enough receive buffers.
418 */
419 if (unlikely(!ftmac100_rxdes_last_segment(rxdes)))
420 BUG();
421
422 /* start processing */
423 skb = netdev_alloc_skb_ip_align(netdev, 128);
424 if (unlikely(!skb)) {
425 if (net_ratelimit())
426 netdev_err(netdev, "rx skb alloc failed\n");
427
428 ftmac100_rx_drop_packet(priv);
429 return true;
430 }
431
432 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
433 netdev->stats.multicast++;
434
435 map = ftmac100_rxdes_get_dma_addr(rxdes);
436 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
437
438 length = ftmac100_rxdes_frame_length(rxdes);
439 page = ftmac100_rxdes_get_page(rxdes);
440 skb_fill_page_desc(skb, 0, page, 0, length);
441 skb->len += length;
442 skb->data_len += length;
443
444 if (length > 128) {
445 skb->truesize += PAGE_SIZE;
446 /* We pull the minimum amount into linear part */
447 __pskb_pull_tail(skb, ETH_HLEN);
448 } else {
449 /* Small frames are copied into linear part to free one page */
450 __pskb_pull_tail(skb, length);
451 }
452 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
453
454 ftmac100_rx_pointer_advance(priv);
455
456 skb->protocol = eth_type_trans(skb, netdev);
457
458 netdev->stats.rx_packets++;
459 netdev->stats.rx_bytes += skb->len;
460
461 /* push packet to protocol stack */
462 netif_receive_skb(skb);
463
464 (*processed)++;
465 return true;
466}
467
468/******************************************************************************
469 * internal functions (transmit descriptor)
470 *****************************************************************************/
471static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
472{
473 /* clear all except end of ring bit */
474 txdes->txdes0 = 0;
475 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
476 txdes->txdes2 = 0;
477 txdes->txdes3 = 0;
478}
479
480static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
481{
482 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
483}
484
485static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
486{
487 /*
488 * Make sure dma own bit will not be set before any other
489 * descriptor fields.
490 */
491 wmb();
492 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
493}
494
495static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
496{
497 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
498}
499
500static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
501{
502 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
503}
504
505static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
506{
507 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
508}
509
510static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
511{
512 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
513}
514
515static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
516{
517 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
518}
519
520static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
521{
522 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
523}
524
525static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
526 unsigned int len)
527{
528 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
529}
530
531static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
532 dma_addr_t addr)
533{
534 txdes->txdes2 = cpu_to_le32(addr);
535}
536
537static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
538{
539 return le32_to_cpu(txdes->txdes2);
540}
541
542/*
543 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
544 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
545 */
546static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
547{
548 txdes->txdes3 = (unsigned int)skb;
549}
550
551static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
552{
553 return (struct sk_buff *)txdes->txdes3;
554}
555
556/******************************************************************************
557 * internal functions (transmit)
558 *****************************************************************************/
559static int ftmac100_next_tx_pointer(int pointer)
560{
561 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
562}
563
564static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
565{
566 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
567}
568
569static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
570{
571 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
572}
573
574static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
575{
576 return &priv->descs->txdes[priv->tx_pointer];
577}
578
579static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
580{
581 return &priv->descs->txdes[priv->tx_clean_pointer];
582}
583
584static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
585{
586 struct net_device *netdev = priv->netdev;
587 struct ftmac100_txdes *txdes;
588 struct sk_buff *skb;
589 dma_addr_t map;
590
591 if (priv->tx_pending == 0)
592 return false;
593
594 txdes = ftmac100_current_clean_txdes(priv);
595
596 if (ftmac100_txdes_owned_by_dma(txdes))
597 return false;
598
599 skb = ftmac100_txdes_get_skb(txdes);
600 map = ftmac100_txdes_get_dma_addr(txdes);
601
602 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
603 ftmac100_txdes_late_collision(txdes))) {
604 /*
605 * packet transmitted to ethernet lost due to late collision
606 * or excessive collision
607 */
608 netdev->stats.tx_aborted_errors++;
609 } else {
610 netdev->stats.tx_packets++;
611 netdev->stats.tx_bytes += skb->len;
612 }
613
614 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
615 dev_kfree_skb(skb);
616
617 ftmac100_txdes_reset(txdes);
618
619 ftmac100_tx_clean_pointer_advance(priv);
620
621 spin_lock(&priv->tx_lock);
622 priv->tx_pending--;
623 spin_unlock(&priv->tx_lock);
624 netif_wake_queue(netdev);
625
626 return true;
627}
628
629static void ftmac100_tx_complete(struct ftmac100 *priv)
630{
631 while (ftmac100_tx_complete_packet(priv))
632 ;
633}
634
635static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
636 dma_addr_t map)
637{
638 struct net_device *netdev = priv->netdev;
639 struct ftmac100_txdes *txdes;
640 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
641
642 txdes = ftmac100_current_txdes(priv);
643 ftmac100_tx_pointer_advance(priv);
644
645 /* setup TX descriptor */
646 ftmac100_txdes_set_skb(txdes, skb);
647 ftmac100_txdes_set_dma_addr(txdes, map);
648
649 ftmac100_txdes_set_first_segment(txdes);
650 ftmac100_txdes_set_last_segment(txdes);
651 ftmac100_txdes_set_txint(txdes);
652 ftmac100_txdes_set_buffer_size(txdes, len);
653
654 spin_lock(&priv->tx_lock);
655 priv->tx_pending++;
656 if (priv->tx_pending == TX_QUEUE_ENTRIES)
657 netif_stop_queue(netdev);
658
659 /* start transmit */
660 ftmac100_txdes_set_dma_own(txdes);
661 spin_unlock(&priv->tx_lock);
662
663 ftmac100_txdma_start_polling(priv);
664 return NETDEV_TX_OK;
665}
666
667/******************************************************************************
668 * internal functions (buffer)
669 *****************************************************************************/
670static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
671 struct ftmac100_rxdes *rxdes, gfp_t gfp)
672{
673 struct net_device *netdev = priv->netdev;
674 struct page *page;
675 dma_addr_t map;
676
677 page = alloc_page(gfp);
678 if (!page) {
679 if (net_ratelimit())
680 netdev_err(netdev, "failed to allocate rx page\n");
681 return -ENOMEM;
682 }
683
684 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
685 if (unlikely(dma_mapping_error(priv->dev, map))) {
686 if (net_ratelimit())
687 netdev_err(netdev, "failed to map rx page\n");
688 __free_page(page);
689 return -ENOMEM;
690 }
691
692 ftmac100_rxdes_set_page(rxdes, page);
693 ftmac100_rxdes_set_dma_addr(rxdes, map);
694 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
695 ftmac100_rxdes_set_dma_own(rxdes);
696 return 0;
697}
698
699static void ftmac100_free_buffers(struct ftmac100 *priv)
700{
701 int i;
702
703 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
704 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
705 struct page *page = ftmac100_rxdes_get_page(rxdes);
706 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
707
708 if (!page)
709 continue;
710
711 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
712 __free_page(page);
713 }
714
715 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
716 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
717 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
718 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
719
720 if (!skb)
721 continue;
722
723 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
724 dev_kfree_skb(skb);
725 }
726
727 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
728 priv->descs, priv->descs_dma_addr);
729}
730
731static int ftmac100_alloc_buffers(struct ftmac100 *priv)
732{
733 int i;
734
735 priv->descs = dma_zalloc_coherent(priv->dev,
736 sizeof(struct ftmac100_descs),
737 &priv->descs_dma_addr,
738 GFP_KERNEL);
739 if (!priv->descs)
740 return -ENOMEM;
741
742 /* initialize RX ring */
743 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
744
745 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
746 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
747
748 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
749 goto err;
750 }
751
752 /* initialize TX ring */
753 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
754 return 0;
755
756err:
757 ftmac100_free_buffers(priv);
758 return -ENOMEM;
759}
760
761/******************************************************************************
762 * struct mii_if_info functions
763 *****************************************************************************/
764static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
765{
766 struct ftmac100 *priv = netdev_priv(netdev);
767 unsigned int phycr;
768 int i;
769
770 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
771 FTMAC100_PHYCR_REGAD(reg) |
772 FTMAC100_PHYCR_MIIRD;
773
774 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
775
776 for (i = 0; i < 10; i++) {
777 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
778
779 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
780 return phycr & FTMAC100_PHYCR_MIIRDATA;
781
782 udelay(100);
783 }
784
785 netdev_err(netdev, "mdio read timed out\n");
786 return 0;
787}
788
789static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
790 int data)
791{
792 struct ftmac100 *priv = netdev_priv(netdev);
793 unsigned int phycr;
794 int i;
795
796 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
797 FTMAC100_PHYCR_REGAD(reg) |
798 FTMAC100_PHYCR_MIIWR;
799
800 data = FTMAC100_PHYWDATA_MIIWDATA(data);
801
802 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
803 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
804
805 for (i = 0; i < 10; i++) {
806 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
807
808 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
809 return;
810
811 udelay(100);
812 }
813
814 netdev_err(netdev, "mdio write timed out\n");
815}
816
817/******************************************************************************
818 * struct ethtool_ops functions
819 *****************************************************************************/
820static void ftmac100_get_drvinfo(struct net_device *netdev,
821 struct ethtool_drvinfo *info)
822{
823 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
824 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
825 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
826}
827
828static int ftmac100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
829{
830 struct ftmac100 *priv = netdev_priv(netdev);
831 return mii_ethtool_gset(&priv->mii, cmd);
832}
833
834static int ftmac100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
835{
836 struct ftmac100 *priv = netdev_priv(netdev);
837 return mii_ethtool_sset(&priv->mii, cmd);
838}
839
840static int ftmac100_nway_reset(struct net_device *netdev)
841{
842 struct ftmac100 *priv = netdev_priv(netdev);
843 return mii_nway_restart(&priv->mii);
844}
845
846static u32 ftmac100_get_link(struct net_device *netdev)
847{
848 struct ftmac100 *priv = netdev_priv(netdev);
849 return mii_link_ok(&priv->mii);
850}
851
852static const struct ethtool_ops ftmac100_ethtool_ops = {
853 .set_settings = ftmac100_set_settings,
854 .get_settings = ftmac100_get_settings,
855 .get_drvinfo = ftmac100_get_drvinfo,
856 .nway_reset = ftmac100_nway_reset,
857 .get_link = ftmac100_get_link,
858};
859
860/******************************************************************************
861 * interrupt handler
862 *****************************************************************************/
863static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
864{
865 struct net_device *netdev = dev_id;
866 struct ftmac100 *priv = netdev_priv(netdev);
867
868 if (likely(netif_running(netdev))) {
869 /* Disable interrupts for polling */
870 ftmac100_disable_all_int(priv);
871 napi_schedule(&priv->napi);
872 }
873
874 return IRQ_HANDLED;
875}
876
877/******************************************************************************
878 * struct napi_struct functions
879 *****************************************************************************/
880static int ftmac100_poll(struct napi_struct *napi, int budget)
881{
882 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
883 struct net_device *netdev = priv->netdev;
884 unsigned int status;
885 bool completed = true;
886 int rx = 0;
887
888 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
889
890 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
891 /*
892 * FTMAC100_INT_RPKT_FINISH:
893 * RX DMA has received packets into RX buffer successfully
894 *
895 * FTMAC100_INT_NORXBUF:
896 * RX buffer unavailable
897 */
898 bool retry;
899
900 do {
901 retry = ftmac100_rx_packet(priv, &rx);
902 } while (retry && rx < budget);
903
904 if (retry && rx == budget)
905 completed = false;
906 }
907
908 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
909 /*
910 * FTMAC100_INT_XPKT_OK:
911 * packet transmitted to ethernet successfully
912 *
913 * FTMAC100_INT_XPKT_LOST:
914 * packet transmitted to ethernet lost due to late
915 * collision or excessive collision
916 */
917 ftmac100_tx_complete(priv);
918 }
919
920 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
921 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
922 if (net_ratelimit())
923 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
924 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
925 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
926 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
927 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
928
929 if (status & FTMAC100_INT_NORXBUF) {
930 /* RX buffer unavailable */
931 netdev->stats.rx_over_errors++;
932 }
933
934 if (status & FTMAC100_INT_RPKT_LOST) {
935 /* received packet lost due to RX FIFO full */
936 netdev->stats.rx_fifo_errors++;
937 }
938
939 if (status & FTMAC100_INT_PHYSTS_CHG) {
940 /* PHY link status change */
941 mii_check_link(&priv->mii);
942 }
943 }
944
945 if (completed) {
946 /* stop polling */
947 napi_complete(napi);
948 ftmac100_enable_all_int(priv);
949 }
950
951 return rx;
952}
953
954/******************************************************************************
955 * struct net_device_ops functions
956 *****************************************************************************/
957static int ftmac100_open(struct net_device *netdev)
958{
959 struct ftmac100 *priv = netdev_priv(netdev);
960 int err;
961
962 err = ftmac100_alloc_buffers(priv);
963 if (err) {
964 netdev_err(netdev, "failed to allocate buffers\n");
965 goto err_alloc;
966 }
967
968 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
969 if (err) {
970 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
971 goto err_irq;
972 }
973
974 priv->rx_pointer = 0;
975 priv->tx_clean_pointer = 0;
976 priv->tx_pointer = 0;
977 priv->tx_pending = 0;
978
979 err = ftmac100_start_hw(priv);
980 if (err)
981 goto err_hw;
982
983 napi_enable(&priv->napi);
984 netif_start_queue(netdev);
985
986 ftmac100_enable_all_int(priv);
987
988 return 0;
989
990err_hw:
991 free_irq(priv->irq, netdev);
992err_irq:
993 ftmac100_free_buffers(priv);
994err_alloc:
995 return err;
996}
997
998static int ftmac100_stop(struct net_device *netdev)
999{
1000 struct ftmac100 *priv = netdev_priv(netdev);
1001
1002 ftmac100_disable_all_int(priv);
1003 netif_stop_queue(netdev);
1004 napi_disable(&priv->napi);
1005 ftmac100_stop_hw(priv);
1006 free_irq(priv->irq, netdev);
1007 ftmac100_free_buffers(priv);
1008
1009 return 0;
1010}
1011
1012static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1013{
1014 struct ftmac100 *priv = netdev_priv(netdev);
1015 dma_addr_t map;
1016
1017 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1018 if (net_ratelimit())
1019 netdev_dbg(netdev, "tx packet too big\n");
1020
1021 netdev->stats.tx_dropped++;
1022 dev_kfree_skb(skb);
1023 return NETDEV_TX_OK;
1024 }
1025
1026 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1027 if (unlikely(dma_mapping_error(priv->dev, map))) {
1028 /* drop packet */
1029 if (net_ratelimit())
1030 netdev_err(netdev, "map socket buffer failed\n");
1031
1032 netdev->stats.tx_dropped++;
1033 dev_kfree_skb(skb);
1034 return NETDEV_TX_OK;
1035 }
1036
1037 return ftmac100_xmit(priv, skb, map);
1038}
1039
1040/* optional */
1041static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1042{
1043 struct ftmac100 *priv = netdev_priv(netdev);
1044 struct mii_ioctl_data *data = if_mii(ifr);
1045
1046 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1047}
1048
1049static const struct net_device_ops ftmac100_netdev_ops = {
1050 .ndo_open = ftmac100_open,
1051 .ndo_stop = ftmac100_stop,
1052 .ndo_start_xmit = ftmac100_hard_start_xmit,
1053 .ndo_set_mac_address = eth_mac_addr,
1054 .ndo_validate_addr = eth_validate_addr,
1055 .ndo_do_ioctl = ftmac100_do_ioctl,
1056};
1057
1058/******************************************************************************
1059 * struct platform_driver functions
1060 *****************************************************************************/
1061static int ftmac100_probe(struct platform_device *pdev)
1062{
1063 struct resource *res;
1064 int irq;
1065 struct net_device *netdev;
1066 struct ftmac100 *priv;
1067 int err;
1068
1069 if (!pdev)
1070 return -ENODEV;
1071
1072 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1073 if (!res)
1074 return -ENXIO;
1075
1076 irq = platform_get_irq(pdev, 0);
1077 if (irq < 0)
1078 return irq;
1079
1080 /* setup net_device */
1081 netdev = alloc_etherdev(sizeof(*priv));
1082 if (!netdev) {
1083 err = -ENOMEM;
1084 goto err_alloc_etherdev;
1085 }
1086
1087 SET_NETDEV_DEV(netdev, &pdev->dev);
1088 SET_ETHTOOL_OPS(netdev, &ftmac100_ethtool_ops);
1089 netdev->netdev_ops = &ftmac100_netdev_ops;
1090
1091 platform_set_drvdata(pdev, netdev);
1092
1093 /* setup private data */
1094 priv = netdev_priv(netdev);
1095 priv->netdev = netdev;
1096 priv->dev = &pdev->dev;
1097
1098 spin_lock_init(&priv->tx_lock);
1099
1100 /* initialize NAPI */
1101 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1102
1103 /* map io memory */
1104 priv->res = request_mem_region(res->start, resource_size(res),
1105 dev_name(&pdev->dev));
1106 if (!priv->res) {
1107 dev_err(&pdev->dev, "Could not reserve memory region\n");
1108 err = -ENOMEM;
1109 goto err_req_mem;
1110 }
1111
1112 priv->base = ioremap(res->start, resource_size(res));
1113 if (!priv->base) {
1114 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1115 err = -EIO;
1116 goto err_ioremap;
1117 }
1118
1119 priv->irq = irq;
1120
1121 /* initialize struct mii_if_info */
1122 priv->mii.phy_id = 0;
1123 priv->mii.phy_id_mask = 0x1f;
1124 priv->mii.reg_num_mask = 0x1f;
1125 priv->mii.dev = netdev;
1126 priv->mii.mdio_read = ftmac100_mdio_read;
1127 priv->mii.mdio_write = ftmac100_mdio_write;
1128
1129 /* register network device */
1130 err = register_netdev(netdev);
1131 if (err) {
1132 dev_err(&pdev->dev, "Failed to register netdev\n");
1133 goto err_register_netdev;
1134 }
1135
1136 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1137
1138 if (!is_valid_ether_addr(netdev->dev_addr)) {
1139 eth_hw_addr_random(netdev);
1140 netdev_info(netdev, "generated random MAC address %pM\n",
1141 netdev->dev_addr);
1142 }
1143
1144 return 0;
1145
1146err_register_netdev:
1147 iounmap(priv->base);
1148err_ioremap:
1149 release_resource(priv->res);
1150err_req_mem:
1151 netif_napi_del(&priv->napi);
1152 free_netdev(netdev);
1153err_alloc_etherdev:
1154 return err;
1155}
1156
1157static int __exit ftmac100_remove(struct platform_device *pdev)
1158{
1159 struct net_device *netdev;
1160 struct ftmac100 *priv;
1161
1162 netdev = platform_get_drvdata(pdev);
1163 priv = netdev_priv(netdev);
1164
1165 unregister_netdev(netdev);
1166
1167 iounmap(priv->base);
1168 release_resource(priv->res);
1169
1170 netif_napi_del(&priv->napi);
1171 free_netdev(netdev);
1172 return 0;
1173}
1174
1175static struct platform_driver ftmac100_driver = {
1176 .probe = ftmac100_probe,
1177 .remove = __exit_p(ftmac100_remove),
1178 .driver = {
1179 .name = DRV_NAME,
1180 .owner = THIS_MODULE,
1181 },
1182};
1183
1184/******************************************************************************
1185 * initialization / finalization
1186 *****************************************************************************/
1187static int __init ftmac100_init(void)
1188{
1189 pr_info("Loading version " DRV_VERSION " ...\n");
1190 return platform_driver_register(&ftmac100_driver);
1191}
1192
1193static void __exit ftmac100_exit(void)
1194{
1195 platform_driver_unregister(&ftmac100_driver);
1196}
1197
1198module_init(ftmac100_init);
1199module_exit(ftmac100_exit);
1200
1201MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1202MODULE_DESCRIPTION("FTMAC100 driver");
1203MODULE_LICENSE("GPL");