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1/*
2 * Device Tree Source for OMAP2420 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include "omap2.dtsi"
12
13/ {
14 compatible = "ti,omap2420", "ti,omap2";
15
16 ocp {
17 l4: l4@48000000 {
18 compatible = "ti,omap2-l4", "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
21 ranges = <0 0x48000000 0x100000>;
22
23 prcm: prcm@8000 {
24 compatible = "ti,omap2-prcm";
25 reg = <0x8000 0x1000>;
26
27 prcm_clocks: clocks {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 };
31
32 prcm_clockdomains: clockdomains {
33 };
34 };
35
36 scm: scm@0 {
37 compatible = "ti,omap2-scm", "simple-bus";
38 reg = <0x0 0x1000>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41 #pinctrl-cells = <1>;
42 ranges = <0 0x0 0x1000>;
43
44 omap2420_pmx: pinmux@30 {
45 compatible = "ti,omap2420-padconf",
46 "pinctrl-single";
47 reg = <0x30 0x0113>;
48 #address-cells = <1>;
49 #size-cells = <0>;
50 #pinctrl-cells = <1>;
51 pinctrl-single,register-width = <8>;
52 pinctrl-single,function-mask = <0x3f>;
53 };
54
55 scm_conf: scm_conf@270 {
56 compatible = "syscon";
57 reg = <0x270 0x100>;
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 scm_clocks: clocks {
62 #address-cells = <1>;
63 #size-cells = <0>;
64 };
65 };
66
67 scm_clockdomains: clockdomains {
68 };
69 };
70
71 counter32k: counter@4000 {
72 compatible = "ti,omap-counter32k";
73 reg = <0x4000 0x20>;
74 ti,hwmods = "counter_32k";
75 };
76 };
77
78 gpio1: gpio@48018000 {
79 compatible = "ti,omap2-gpio";
80 reg = <0x48018000 0x200>;
81 interrupts = <29>;
82 ti,hwmods = "gpio1";
83 ti,gpio-always-on;
84 #gpio-cells = <2>;
85 gpio-controller;
86 #interrupt-cells = <2>;
87 interrupt-controller;
88 };
89
90 gpio2: gpio@4801a000 {
91 compatible = "ti,omap2-gpio";
92 reg = <0x4801a000 0x200>;
93 interrupts = <30>;
94 ti,hwmods = "gpio2";
95 ti,gpio-always-on;
96 #gpio-cells = <2>;
97 gpio-controller;
98 #interrupt-cells = <2>;
99 interrupt-controller;
100 };
101
102 gpio3: gpio@4801c000 {
103 compatible = "ti,omap2-gpio";
104 reg = <0x4801c000 0x200>;
105 interrupts = <31>;
106 ti,hwmods = "gpio3";
107 ti,gpio-always-on;
108 #gpio-cells = <2>;
109 gpio-controller;
110 #interrupt-cells = <2>;
111 interrupt-controller;
112 };
113
114 gpio4: gpio@4801e000 {
115 compatible = "ti,omap2-gpio";
116 reg = <0x4801e000 0x200>;
117 interrupts = <32>;
118 ti,hwmods = "gpio4";
119 ti,gpio-always-on;
120 #gpio-cells = <2>;
121 gpio-controller;
122 #interrupt-cells = <2>;
123 interrupt-controller;
124 };
125
126 gpmc: gpmc@6800a000 {
127 compatible = "ti,omap2420-gpmc";
128 reg = <0x6800a000 0x1000>;
129 #address-cells = <2>;
130 #size-cells = <1>;
131 interrupts = <20>;
132 gpmc,num-cs = <8>;
133 gpmc,num-waitpins = <4>;
134 ti,hwmods = "gpmc";
135 interrupt-controller;
136 #interrupt-cells = <2>;
137 gpio-controller;
138 #gpio-cells = <2>;
139 };
140
141 mcbsp1: mcbsp@48074000 {
142 compatible = "ti,omap2420-mcbsp";
143 reg = <0x48074000 0xff>;
144 reg-names = "mpu";
145 interrupts = <59>, /* TX interrupt */
146 <60>; /* RX interrupt */
147 interrupt-names = "tx", "rx";
148 ti,hwmods = "mcbsp1";
149 dmas = <&sdma 31>,
150 <&sdma 32>;
151 dma-names = "tx", "rx";
152 status = "disabled";
153 };
154
155 mcbsp2: mcbsp@48076000 {
156 compatible = "ti,omap2420-mcbsp";
157 reg = <0x48076000 0xff>;
158 reg-names = "mpu";
159 interrupts = <62>, /* TX interrupt */
160 <63>; /* RX interrupt */
161 interrupt-names = "tx", "rx";
162 ti,hwmods = "mcbsp2";
163 dmas = <&sdma 33>,
164 <&sdma 34>;
165 dma-names = "tx", "rx";
166 status = "disabled";
167 };
168
169 msdi1: mmc@4809c000 {
170 compatible = "ti,omap2420-mmc";
171 ti,hwmods = "msdi1";
172 reg = <0x4809c000 0x80>;
173 interrupts = <83>;
174 dmas = <&sdma 61 &sdma 62>;
175 dma-names = "tx", "rx";
176 };
177
178 mailbox: mailbox@48094000 {
179 compatible = "ti,omap2-mailbox";
180 reg = <0x48094000 0x200>;
181 interrupts = <26>, <34>;
182 interrupt-names = "dsp", "iva";
183 ti,hwmods = "mailbox";
184 #mbox-cells = <1>;
185 ti,mbox-num-users = <4>;
186 ti,mbox-num-fifos = <6>;
187 mbox_dsp: dsp {
188 ti,mbox-tx = <0 0 0>;
189 ti,mbox-rx = <1 0 0>;
190 };
191 mbox_iva: iva {
192 ti,mbox-tx = <2 1 3>;
193 ti,mbox-rx = <3 1 3>;
194 };
195 };
196
197 timer1: timer@48028000 {
198 compatible = "ti,omap2420-timer";
199 reg = <0x48028000 0x400>;
200 interrupts = <37>;
201 ti,hwmods = "timer1";
202 ti,timer-alwon;
203 };
204
205 wd_timer2: wdt@48022000 {
206 compatible = "ti,omap2-wdt";
207 ti,hwmods = "wd_timer2";
208 reg = <0x48022000 0x80>;
209 };
210 };
211};
212
213&i2c1 {
214 compatible = "ti,omap2420-i2c";
215};
216
217&i2c2 {
218 compatible = "ti,omap2420-i2c";
219};
220
221/include/ "omap24xx-clocks.dtsi"
222/include/ "omap2420-clocks.dtsi"
1/*
2 * Device Tree Source for OMAP2420 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include "omap2.dtsi"
12
13/ {
14 compatible = "ti,omap2420", "ti,omap2";
15
16 ocp {
17 counter32k: counter@48004000 {
18 compatible = "ti,omap-counter32k";
19 reg = <0x48004000 0x20>;
20 ti,hwmods = "counter_32k";
21 };
22
23 omap2420_pmx: pinmux@48000030 {
24 compatible = "ti,omap2420-padconf", "pinctrl-single";
25 reg = <0x48000030 0x0113>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 pinctrl-single,register-width = <8>;
29 pinctrl-single,function-mask = <0x3f>;
30 };
31
32 gpio1: gpio@48018000 {
33 compatible = "ti,omap2-gpio";
34 reg = <0x48018000 0x200>;
35 interrupts = <29>;
36 ti,hwmods = "gpio1";
37 ti,gpio-always-on;
38 #gpio-cells = <2>;
39 gpio-controller;
40 #interrupt-cells = <2>;
41 interrupt-controller;
42 };
43
44 gpio2: gpio@4801a000 {
45 compatible = "ti,omap2-gpio";
46 reg = <0x4801a000 0x200>;
47 interrupts = <30>;
48 ti,hwmods = "gpio2";
49 ti,gpio-always-on;
50 #gpio-cells = <2>;
51 gpio-controller;
52 #interrupt-cells = <2>;
53 interrupt-controller;
54 };
55
56 gpio3: gpio@4801c000 {
57 compatible = "ti,omap2-gpio";
58 reg = <0x4801c000 0x200>;
59 interrupts = <31>;
60 ti,hwmods = "gpio3";
61 ti,gpio-always-on;
62 #gpio-cells = <2>;
63 gpio-controller;
64 #interrupt-cells = <2>;
65 interrupt-controller;
66 };
67
68 gpio4: gpio@4801e000 {
69 compatible = "ti,omap2-gpio";
70 reg = <0x4801e000 0x200>;
71 interrupts = <32>;
72 ti,hwmods = "gpio4";
73 ti,gpio-always-on;
74 #gpio-cells = <2>;
75 gpio-controller;
76 #interrupt-cells = <2>;
77 interrupt-controller;
78 };
79
80 gpmc: gpmc@6800a000 {
81 compatible = "ti,omap2420-gpmc";
82 reg = <0x6800a000 0x1000>;
83 #address-cells = <2>;
84 #size-cells = <1>;
85 interrupts = <20>;
86 gpmc,num-cs = <8>;
87 gpmc,num-waitpins = <4>;
88 ti,hwmods = "gpmc";
89 };
90
91 mcbsp1: mcbsp@48074000 {
92 compatible = "ti,omap2420-mcbsp";
93 reg = <0x48074000 0xff>;
94 reg-names = "mpu";
95 interrupts = <59>, /* TX interrupt */
96 <60>; /* RX interrupt */
97 interrupt-names = "tx", "rx";
98 ti,hwmods = "mcbsp1";
99 dmas = <&sdma 31>,
100 <&sdma 32>;
101 dma-names = "tx", "rx";
102 status = "disabled";
103 };
104
105 mcbsp2: mcbsp@48076000 {
106 compatible = "ti,omap2420-mcbsp";
107 reg = <0x48076000 0xff>;
108 reg-names = "mpu";
109 interrupts = <62>, /* TX interrupt */
110 <63>; /* RX interrupt */
111 interrupt-names = "tx", "rx";
112 ti,hwmods = "mcbsp2";
113 dmas = <&sdma 33>,
114 <&sdma 34>;
115 dma-names = "tx", "rx";
116 status = "disabled";
117 };
118
119 msdi1: mmc@4809c000 {
120 compatible = "ti,omap2420-mmc";
121 ti,hwmods = "msdi1";
122 reg = <0x4809c000 0x80>;
123 interrupts = <83>;
124 dmas = <&sdma 61 &sdma 62>;
125 dma-names = "tx", "rx";
126 };
127
128 mailbox: mailbox@48094000 {
129 compatible = "ti,omap2-mailbox";
130 reg = <0x48094000 0x200>;
131 interrupts = <26>, <34>;
132 interrupt-names = "dsp", "iva";
133 ti,hwmods = "mailbox";
134 };
135
136 timer1: timer@48028000 {
137 compatible = "ti,omap2420-timer";
138 reg = <0x48028000 0x400>;
139 interrupts = <37>;
140 ti,hwmods = "timer1";
141 ti,timer-alwon;
142 };
143
144 wd_timer2: wdt@48022000 {
145 compatible = "ti,omap2-wdt";
146 ti,hwmods = "wd_timer2";
147 reg = <0x48022000 0x80>;
148 };
149 };
150};
151
152&i2c1 {
153 compatible = "ti,omap2420-i2c";
154};
155
156&i2c2 {
157 compatible = "ti,omap2420-i2c";
158};