1Integrated Flash Controller
 2
 3Properties:
 4- name : Should be ifc
 5- compatible : should contain "fsl,ifc". The version of the integrated
 6               flash controller can be found in the IFC_REV register at
 7               offset zero.
 8
 9- #address-cells : Should be either two or three.  The first cell is the
10                   chipselect number, and the remaining cells are the
11                   offset into the chipselect.
12- #size-cells : Either one or two, depending on how large each chipselect
13                can be.
14- reg : Offset and length of the register set for the device
15- interrupts: IFC may have one or two interrupts.  If two interrupt
16              specifiers are present, the first is the "common"
17              interrupt (CM_EVTER_STAT), and the second is the NAND
18              interrupt (NAND_EVTER_STAT).  If there is only one,
19              that interrupt reports both types of event.
20
21- little-endian : If this property is absent, the big-endian mode will
22                  be in use as default for registers.
23
24- ranges : Each range corresponds to a single chipselect, and covers
25           the entire access window as configured.
26
27Child device nodes describe the devices connected to IFC such as NOR (e.g.
28cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
29like FPGAs, CPLDs, etc.
30
31Example:
32
33	ifc@ffe1e000 {
34		compatible = "fsl,ifc", "simple-bus";
35		#address-cells = <2>;
36		#size-cells = <1>;
37		reg = <0x0 0xffe1e000 0 0x2000>;
38		interrupts = <16 2 19 2>;
39		little-endian;
40
41		/* NOR, NAND Flashes and CPLD on board */
42		ranges = <0x0 0x0 0x0 0xee000000 0x02000000
43			  0x1 0x0 0x0 0xffa00000 0x00010000
44			  0x3 0x0 0x0 0xffb00000 0x00020000>;
45
46		flash@0,0 {
47			#address-cells = <1>;
48			#size-cells = <1>;
49			compatible = "cfi-flash";
50			reg = <0x0 0x0 0x2000000>;
51			bank-width = <2>;
52			device-width = <1>;
53
54			partition@0 {
55				/* 32MB for user data */
56				reg = <0x0 0x02000000>;
57				label = "NOR Data";
58			};
59		};
60
61		flash@1,0 {
62			#address-cells = <1>;
63			#size-cells = <1>;
64			compatible = "fsl,ifc-nand";
65			reg = <0x1 0x0 0x10000>;
66
67			partition@0 {
68				/* This location must not be altered  */
69				/* 1MB for u-boot Bootloader Image */
70				reg = <0x0 0x00100000>;
71				label = "NAND U-Boot Image";
72				read-only;
73			};
74		};
75
76		cpld@3,0 {
77			#address-cells = <1>;
78			#size-cells = <1>;
79			compatible = "fsl,p1010rdb-cpld";
80			reg = <0x3 0x0 0x000001f>;
81		};
82	};

 1Integrated Flash Controller
 2
 3Properties:
 4- name : Should be ifc
 5- compatible : should contain "fsl,ifc". The version of the integrated
 6               flash controller can be found in the IFC_REV register at
 7               offset zero.
 8
 9- #address-cells : Should be either two or three.  The first cell is the
10                   chipselect number, and the remaining cells are the
11                   offset into the chipselect.
12- #size-cells : Either one or two, depending on how large each chipselect
13                can be.
14- reg : Offset and length of the register set for the device
15- interrupts: IFC may have one or two interrupts.  If two interrupt
16              specifiers are present, the first is the "common"
17              interrupt (CM_EVTER_STAT), and the second is the NAND
18              interrupt (NAND_EVTER_STAT).  If there is only one,
19              that interrupt reports both types of event.
20
 
 
21
22- ranges : Each range corresponds to a single chipselect, and covers
23           the entire access window as configured.
24
25Child device nodes describe the devices connected to IFC such as NOR (e.g.
26cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
27like FPGAs, CPLDs, etc.
28
29Example:
30
31	ifc@ffe1e000 {
32		compatible = "fsl,ifc", "simple-bus";
33		#address-cells = <2>;
34		#size-cells = <1>;
35		reg = <0x0 0xffe1e000 0 0x2000>;
36		interrupts = <16 2 19 2>;
 
37
38		/* NOR, NAND Flashes and CPLD on board */
39		ranges = <0x0 0x0 0x0 0xee000000 0x02000000
40			  0x1 0x0 0x0 0xffa00000 0x00010000
41			  0x3 0x0 0x0 0xffb00000 0x00020000>;
42
43		flash@0,0 {
44			#address-cells = <1>;
45			#size-cells = <1>;
46			compatible = "cfi-flash";
47			reg = <0x0 0x0 0x2000000>;
48			bank-width = <2>;
49			device-width = <1>;
50
51			partition@0 {
52				/* 32MB for user data */
53				reg = <0x0 0x02000000>;
54				label = "NOR Data";
55			};
56		};
57
58		flash@1,0 {
59			#address-cells = <1>;
60			#size-cells = <1>;
61			compatible = "fsl,ifc-nand";
62			reg = <0x1 0x0 0x10000>;
63
64			partition@0 {
65				/* This location must not be altered  */
66				/* 1MB for u-boot Bootloader Image */
67				reg = <0x0 0x00100000>;
68				label = "NAND U-Boot Image";
69				read-only;
70			};
71		};
72
73		cpld@3,0 {
74			#address-cells = <1>;
75			#size-cells = <1>;
76			compatible = "fsl,p1010rdb-cpld";
77			reg = <0x3 0x0 0x000001f>;
78		};
79	};