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1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#ifndef _IXGBEVF_H_
29#define _IXGBEVF_H_
30
31#include <linux/types.h>
32#include <linux/bitops.h>
33#include <linux/timer.h>
34#include <linux/io.h>
35#include <linux/netdevice.h>
36#include <linux/if_vlan.h>
37
38#include "vf.h"
39
40/* wrapper around a pointer to a socket buffer,
41 * so a DMA handle can be stored along with the buffer */
42struct ixgbevf_tx_buffer {
43 struct sk_buff *skb;
44 dma_addr_t dma;
45 unsigned long time_stamp;
46 u16 length;
47 u16 next_to_watch;
48 u16 mapped_as_page;
49};
50
51struct ixgbevf_rx_buffer {
52 struct sk_buff *skb;
53 dma_addr_t dma;
54 struct page *page;
55 dma_addr_t page_dma;
56 unsigned int page_offset;
57};
58
59struct ixgbevf_ring {
60 struct ixgbevf_adapter *adapter; /* backlink */
61 void *desc; /* descriptor ring memory */
62 dma_addr_t dma; /* phys. address of descriptor ring */
63 unsigned int size; /* length in bytes */
64 unsigned int count; /* amount of descriptors */
65 unsigned int next_to_use;
66 unsigned int next_to_clean;
67
68 int queue_index; /* needed for multiqueue queue management */
69 union {
70 struct ixgbevf_tx_buffer *tx_buffer_info;
71 struct ixgbevf_rx_buffer *rx_buffer_info;
72 };
73
74 u16 head;
75 u16 tail;
76
77 unsigned int total_bytes;
78 unsigned int total_packets;
79
80 u16 reg_idx; /* holds the special value that gets the hardware register
81 * offset associated with this ring, which is different
82 * for DCB and RSS modes */
83
84#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
85 /* cpu for tx queue */
86 int cpu;
87#endif
88
89 u64 v_idx; /* maps directly to the index for this ring in the hardware
90 * vector array, can also be used for finding the bit in EICR
91 * and friends that represents the vector for this ring */
92
93 u16 work_limit; /* max work per interrupt */
94 u16 rx_buf_len;
95};
96
97enum ixgbevf_ring_f_enum {
98 RING_F_NONE = 0,
99 RING_F_ARRAY_SIZE /* must be last in enum set */
100};
101
102struct ixgbevf_ring_feature {
103 int indices;
104 int mask;
105};
106
107/* How many Rx Buffers do we bundle into one write to the hardware ? */
108#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
109
110#define MAX_RX_QUEUES 1
111#define MAX_TX_QUEUES 1
112
113#define IXGBEVF_DEFAULT_TXD 1024
114#define IXGBEVF_DEFAULT_RXD 512
115#define IXGBEVF_MAX_TXD 4096
116#define IXGBEVF_MIN_TXD 64
117#define IXGBEVF_MAX_RXD 4096
118#define IXGBEVF_MIN_RXD 64
119
120/* Supported Rx Buffer Sizes */
121#define IXGBEVF_RXBUFFER_64 64 /* Used for packet split */
122#define IXGBEVF_RXBUFFER_128 128 /* Used for packet split */
123#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
124#define IXGBEVF_RXBUFFER_2048 2048
125#define IXGBEVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
126
127#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
128
129#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
130
131#define IXGBE_TX_FLAGS_CSUM (u32)(1)
132#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
133#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
134#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
135#define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
136#define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
137#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
138#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
139#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
140
141/* MAX_MSIX_Q_VECTORS of these are allocated,
142 * but we only use one per queue-specific vector.
143 */
144struct ixgbevf_q_vector {
145 struct ixgbevf_adapter *adapter;
146 struct napi_struct napi;
147 DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
148 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
149 u8 rxr_count; /* Rx ring count assigned to this vector */
150 u8 txr_count; /* Tx ring count assigned to this vector */
151 u8 tx_itr;
152 u8 rx_itr;
153 u32 eitr;
154 int v_idx; /* vector index in list */
155};
156
157/* Helper macros to switch between ints/sec and what the register uses.
158 * And yes, it's the same math going both ways. The lowest value
159 * supported by all of the ixgbe hardware is 8.
160 */
161#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
162 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
163#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
164
165#define IXGBE_DESC_UNUSED(R) \
166 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
167 (R)->next_to_clean - (R)->next_to_use - 1)
168
169#define IXGBE_RX_DESC_ADV(R, i) \
170 (&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
171#define IXGBE_TX_DESC_ADV(R, i) \
172 (&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
173#define IXGBE_TX_CTXTDESC_ADV(R, i) \
174 (&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
175
176#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
177
178#define OTHER_VECTOR 1
179#define NON_Q_VECTORS (OTHER_VECTOR)
180
181#define MAX_MSIX_Q_VECTORS 2
182#define MAX_MSIX_COUNT 2
183
184#define MIN_MSIX_Q_VECTORS 2
185#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
186
187/* board specific private data structure */
188struct ixgbevf_adapter {
189 struct timer_list watchdog_timer;
190 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
191 u16 bd_number;
192 struct work_struct reset_task;
193 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
194 char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
195
196 /* Interrupt Throttle Rate */
197 u32 itr_setting;
198 u16 eitr_low;
199 u16 eitr_high;
200
201 /* TX */
202 struct ixgbevf_ring *tx_ring; /* One per active queue */
203 int num_tx_queues;
204 u64 restart_queue;
205 u64 hw_csum_tx_good;
206 u64 lsc_int;
207 u64 hw_tso_ctxt;
208 u64 hw_tso6_ctxt;
209 u32 tx_timeout_count;
210
211 /* RX */
212 struct ixgbevf_ring *rx_ring; /* One per active queue */
213 int num_rx_queues;
214 int num_rx_pools; /* == num_rx_queues in 82598 */
215 int num_rx_queues_per_pool; /* 1 if 82598, can be many if 82599 */
216 u64 hw_csum_rx_error;
217 u64 hw_rx_no_dma_resources;
218 u64 hw_csum_rx_good;
219 u64 non_eop_descs;
220 int num_msix_vectors;
221 int max_msix_q_vectors; /* true count of q_vectors for device */
222 struct ixgbevf_ring_feature ring_feature[RING_F_ARRAY_SIZE];
223 struct msix_entry *msix_entries;
224
225 u64 rx_hdr_split;
226 u32 alloc_rx_page_failed;
227 u32 alloc_rx_buff_failed;
228
229 /* Some features need tri-state capability,
230 * thus the additional *_CAPABLE flags.
231 */
232 u32 flags;
233#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
234#define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 1)
235#define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 2)
236#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 3)
237#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 4)
238#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 5)
239#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 6)
240#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 7)
241#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 8)
242 /* OS defined structs */
243 struct net_device *netdev;
244 struct pci_dev *pdev;
245
246 /* structs defined in ixgbe_vf.h */
247 struct ixgbe_hw hw;
248 u16 msg_enable;
249 struct ixgbevf_hw_stats stats;
250 u64 zero_base;
251 /* Interrupt Throttle Rate */
252 u32 eitr_param;
253
254 unsigned long state;
255 u32 *config_space;
256 u64 tx_busy;
257 unsigned int tx_ring_count;
258 unsigned int rx_ring_count;
259
260 u32 link_speed;
261 bool link_up;
262 unsigned long link_check_timeout;
263
264 struct work_struct watchdog_task;
265 bool netdev_registered;
266 bool dev_closed;
267};
268
269enum ixbgevf_state_t {
270 __IXGBEVF_TESTING,
271 __IXGBEVF_RESETTING,
272 __IXGBEVF_DOWN
273};
274
275enum ixgbevf_boards {
276 board_82599_vf,
277 board_X540_vf,
278};
279
280extern struct ixgbevf_info ixgbevf_82599_vf_info;
281extern struct ixgbevf_info ixgbevf_X540_vf_info;
282extern struct ixgbe_mbx_operations ixgbevf_mbx_ops;
283
284/* needed by ethtool.c */
285extern char ixgbevf_driver_name[];
286extern const char ixgbevf_driver_version[];
287
288extern int ixgbevf_up(struct ixgbevf_adapter *adapter);
289extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
290extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
291extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
292extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
293extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
294 struct ixgbevf_ring *);
295extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
296 struct ixgbevf_ring *);
297extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
298 struct ixgbevf_ring *);
299extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
300 struct ixgbevf_ring *);
301extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
302
303#ifdef ETHTOOL_OPS_COMPAT
304extern int ethtool_ioctl(struct ifreq *ifr);
305
306#endif
307extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
308extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
309
310#ifdef DEBUG
311extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
312#define hw_dbg(hw, format, arg...) \
313 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
314#else
315#define hw_dbg(hw, format, arg...) do {} while (0)
316#endif
317
318#endif /* _IXGBEVF_H_ */