1/*
  2 * Copyright 2017 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 */
 23/*
 24 * link_encoder.h
 25 *
 26 *  Created on: Oct 6, 2015
 27 *      Author: yonsun
 28 */
 29
 30#ifndef LINK_ENCODER_H_
 31#define LINK_ENCODER_H_
 32
 33#include "grph_object_defs.h"
 34#include "signal_types.h"
 35#include "dc_types.h"
 36
 37struct dc_context;
 38struct encoder_set_dp_phy_pattern_param;
 39struct link_mst_stream_allocation_table;
 40struct dc_link_settings;
 41struct link_training_settings;
 42struct pipe_ctx;
 43
 44struct encoder_init_data {
 45	enum channel_id channel;
 46	struct graphics_object_id connector;
 47	enum hpd_source_id hpd_source;
 48	/* TODO: in DAL2, here was pointer to EventManagerInterface */
 49	struct graphics_object_id encoder;
 50	struct dc_context *ctx;
 51	enum transmitter transmitter;
 52};
 53
 54struct encoder_feature_support {
 55	union {
 56		struct {
 57			uint32_t IS_HBR2_CAPABLE:1;
 58			uint32_t IS_HBR3_CAPABLE:1;
 59			uint32_t IS_TPS3_CAPABLE:1;
 60			uint32_t IS_TPS4_CAPABLE:1;
 61			uint32_t IS_YCBCR_CAPABLE:1;
 62			uint32_t HDMI_6GB_EN:1;
 63		} bits;
 64		uint32_t raw;
 65	} flags;
 66
 67	enum dc_color_depth max_hdmi_deep_color;
 68	unsigned int max_hdmi_pixel_clock;
 69	bool ycbcr420_supported;
 70};
 71
 72union dpcd_psr_configuration {
 73	struct {
 74		unsigned char ENABLE                    : 1;
 75		unsigned char TRANSMITTER_ACTIVE_IN_PSR : 1;
 76		unsigned char CRC_VERIFICATION          : 1;
 77		unsigned char FRAME_CAPTURE_INDICATION  : 1;
 78		/* For eDP 1.4, PSR v2*/
 79		unsigned char LINE_CAPTURE_INDICATION   : 1;
 80		/* For eDP 1.4, PSR v2*/
 81		unsigned char IRQ_HPD_WITH_CRC_ERROR    : 1;
 82		unsigned char RESERVED                  : 2;
 83	} bits;
 84	unsigned char raw;
 85};
 86
 87union psr_error_status {
 88	struct {
 89		unsigned char LINK_CRC_ERROR        :1;
 90		unsigned char RFB_STORAGE_ERROR     :1;
 91		unsigned char RESERVED              :6;
 92	} bits;
 93	unsigned char raw;
 94};
 95
 96union psr_sink_psr_status {
 97	struct {
 98	unsigned char SINK_SELF_REFRESH_STATUS  :3;
 99	unsigned char RESERVED                  :5;
100	} bits;
101	unsigned char raw;
102};
103
104struct link_encoder {
105	const struct link_encoder_funcs *funcs;
106	int32_t aux_channel_offset;
107	struct dc_context *ctx;
108	struct graphics_object_id id;
109	struct graphics_object_id connector;
110	uint32_t output_signals;
111	enum engine_id preferred_engine;
112	struct encoder_feature_support features;
113	enum transmitter transmitter;
114	enum hpd_source_id hpd_source;
115};
116
117struct link_encoder_funcs {
118	bool (*validate_output_with_stream)(
119		struct link_encoder *enc, const struct dc_stream_state *stream);
120	void (*hw_init)(struct link_encoder *enc);
121	void (*setup)(struct link_encoder *enc,
122		enum signal_type signal);
123	void (*enable_tmds_output)(struct link_encoder *enc,
124		enum clock_source_id clock_source,
125		enum dc_color_depth color_depth,
126		enum signal_type signal,
127		uint32_t pixel_clock);
128	void (*enable_dp_output)(struct link_encoder *enc,
129		const struct dc_link_settings *link_settings,
130		enum clock_source_id clock_source);
131	void (*enable_dp_mst_output)(struct link_encoder *enc,
132		const struct dc_link_settings *link_settings,
133		enum clock_source_id clock_source);
134	void (*disable_output)(struct link_encoder *link_enc,
135		enum signal_type signal);
136	void (*dp_set_lane_settings)(struct link_encoder *enc,
137		const struct link_training_settings *link_settings);
138	void (*dp_set_phy_pattern)(struct link_encoder *enc,
139		const struct encoder_set_dp_phy_pattern_param *para);
140	void (*update_mst_stream_allocation_table)(
141		struct link_encoder *enc,
142		const struct link_mst_stream_allocation_table *table);
143	void (*psr_program_dp_dphy_fast_training)(struct link_encoder *enc,
144			bool exit_link_training_required);
145	void (*psr_program_secondary_packet)(struct link_encoder *enc,
146				unsigned int sdp_transmit_line_num_deadline);
147	void (*connect_dig_be_to_fe)(struct link_encoder *enc,
148		enum engine_id engine,
149		bool connect);
150	void (*enable_hpd)(struct link_encoder *enc);
151	void (*disable_hpd)(struct link_encoder *enc);
152	void (*destroy)(struct link_encoder **enc);
153};
154
155#endif /* LINK_ENCODER_H_ */