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1/*
2 * vSMPowered(tm) systems specific initialization
3 * Copyright (C) 2005 ScaleMP Inc.
4 *
5 * Use of this code is subject to the terms and conditions of the
6 * GNU general public license version 2. See "COPYING" or
7 * http://www.gnu.org/licenses/gpl.html
8 *
9 * Ravikiran Thirumalai <kiran@scalemp.com>,
10 * Shai Fultheim <shai@scalemp.com>
11 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
12 * Ravikiran Thirumalai <kiran@scalemp.com>
13 */
14
15#include <linux/init.h>
16#include <linux/pci_ids.h>
17#include <linux/pci_regs.h>
18#include <linux/smp.h>
19#include <linux/irq.h>
20
21#include <asm/apic.h>
22#include <asm/pci-direct.h>
23#include <asm/io.h>
24#include <asm/paravirt.h>
25#include <asm/setup.h>
26
27#define TOPOLOGY_REGISTER_OFFSET 0x10
28
29#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
30/*
31 * Interrupt control on vSMPowered systems:
32 * ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
33 * and vice versa.
34 */
35
36asmlinkage __visible unsigned long vsmp_save_fl(void)
37{
38 unsigned long flags = native_save_fl();
39
40 if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
41 flags &= ~X86_EFLAGS_IF;
42 return flags;
43}
44PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
45
46__visible void vsmp_restore_fl(unsigned long flags)
47{
48 if (flags & X86_EFLAGS_IF)
49 flags &= ~X86_EFLAGS_AC;
50 else
51 flags |= X86_EFLAGS_AC;
52 native_restore_fl(flags);
53}
54PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
55
56asmlinkage __visible void vsmp_irq_disable(void)
57{
58 unsigned long flags = native_save_fl();
59
60 native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
61}
62PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
63
64asmlinkage __visible void vsmp_irq_enable(void)
65{
66 unsigned long flags = native_save_fl();
67
68 native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
69}
70PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
71
72static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf,
73 unsigned long addr, unsigned len)
74{
75 switch (type) {
76 case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
77 case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
78 case PARAVIRT_PATCH(pv_irq_ops.save_fl):
79 case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
80 return paravirt_patch_default(type, clobbers, ibuf, addr, len);
81 default:
82 return native_patch(type, clobbers, ibuf, addr, len);
83 }
84
85}
86
87static void __init set_vsmp_pv_ops(void)
88{
89 void __iomem *address;
90 unsigned int cap, ctl, cfg;
91
92 /* set vSMP magic bits to indicate vSMP capable kernel */
93 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
94 address = early_ioremap(cfg, 8);
95 cap = readl(address);
96 ctl = readl(address + 4);
97 printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
98 cap, ctl);
99
100 /* If possible, let the vSMP foundation route the interrupt optimally */
101#ifdef CONFIG_SMP
102 if (cap & ctl & BIT(8)) {
103 ctl &= ~BIT(8);
104
105#ifdef CONFIG_PROC_FS
106 /* Don't let users change irq affinity via procfs */
107 no_irq_affinity = 1;
108#endif
109 }
110#endif
111
112 if (cap & ctl & (1 << 4)) {
113 /* Setup irq ops and turn on vSMP IRQ fastpath handling */
114 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
115 pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
116 pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
117 pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
118 pv_init_ops.patch = vsmp_patch;
119 ctl &= ~(1 << 4);
120 }
121 writel(ctl, address + 4);
122 ctl = readl(address + 4);
123 pr_info("vSMP CTL: control set to:0x%08x\n", ctl);
124
125 early_iounmap(address, 8);
126}
127#else
128static void __init set_vsmp_pv_ops(void)
129{
130}
131#endif
132
133#ifdef CONFIG_PCI
134static int is_vsmp = -1;
135
136static void __init detect_vsmp_box(void)
137{
138 is_vsmp = 0;
139
140 if (!early_pci_allowed())
141 return;
142
143 /* Check if we are running on a ScaleMP vSMPowered box */
144 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
145 (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
146 is_vsmp = 1;
147}
148
149static int is_vsmp_box(void)
150{
151 if (is_vsmp != -1)
152 return is_vsmp;
153 else {
154 WARN_ON_ONCE(1);
155 return 0;
156 }
157}
158
159#else
160static void __init detect_vsmp_box(void)
161{
162}
163static int is_vsmp_box(void)
164{
165 return 0;
166}
167#endif
168
169static void __init vsmp_cap_cpus(void)
170{
171#if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP)
172 void __iomem *address;
173 unsigned int cfg, topology, node_shift, maxcpus;
174
175 /*
176 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the
177 * ones present in the first board, unless explicitly overridden by
178 * setup_max_cpus
179 */
180 if (setup_max_cpus != NR_CPUS)
181 return;
182
183 /* Read the vSMP Foundation topology register */
184 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
185 address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);
186 if (WARN_ON(!address))
187 return;
188
189 topology = readl(address);
190 node_shift = (topology >> 16) & 0x7;
191 if (!node_shift)
192 /* The value 0 should be decoded as 8 */
193 node_shift = 8;
194 maxcpus = (topology & ((1 << node_shift) - 1)) + 1;
195
196 pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
197 maxcpus);
198 setup_max_cpus = maxcpus;
199 early_iounmap(address, 4);
200#endif
201}
202
203static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
204{
205 return hard_smp_processor_id() >> index_msb;
206}
207
208static void vsmp_apic_post_init(void)
209{
210 /* need to update phys_pkg_id */
211 apic->phys_pkg_id = apicid_phys_pkg_id;
212}
213
214void __init vsmp_init(void)
215{
216 detect_vsmp_box();
217 if (!is_vsmp_box())
218 return;
219
220 x86_platform.apic_post_init = vsmp_apic_post_init;
221
222 vsmp_cap_cpus();
223
224 set_vsmp_pv_ops();
225 return;
226}
1/*
2 * vSMPowered(tm) systems specific initialization
3 * Copyright (C) 2005 ScaleMP Inc.
4 *
5 * Use of this code is subject to the terms and conditions of the
6 * GNU general public license version 2. See "COPYING" or
7 * http://www.gnu.org/licenses/gpl.html
8 *
9 * Ravikiran Thirumalai <kiran@scalemp.com>,
10 * Shai Fultheim <shai@scalemp.com>
11 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
12 * Ravikiran Thirumalai <kiran@scalemp.com>
13 */
14
15#include <linux/init.h>
16#include <linux/pci_ids.h>
17#include <linux/pci_regs.h>
18
19#include <asm/apic.h>
20#include <asm/pci-direct.h>
21#include <asm/io.h>
22#include <asm/paravirt.h>
23#include <asm/setup.h>
24
25#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
26/*
27 * Interrupt control on vSMPowered systems:
28 * ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
29 * and vice versa.
30 */
31
32static unsigned long vsmp_save_fl(void)
33{
34 unsigned long flags = native_save_fl();
35
36 if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
37 flags &= ~X86_EFLAGS_IF;
38 return flags;
39}
40PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
41
42static void vsmp_restore_fl(unsigned long flags)
43{
44 if (flags & X86_EFLAGS_IF)
45 flags &= ~X86_EFLAGS_AC;
46 else
47 flags |= X86_EFLAGS_AC;
48 native_restore_fl(flags);
49}
50PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
51
52static void vsmp_irq_disable(void)
53{
54 unsigned long flags = native_save_fl();
55
56 native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
57}
58PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
59
60static void vsmp_irq_enable(void)
61{
62 unsigned long flags = native_save_fl();
63
64 native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
65}
66PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
67
68static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
69 unsigned long addr, unsigned len)
70{
71 switch (type) {
72 case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
73 case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
74 case PARAVIRT_PATCH(pv_irq_ops.save_fl):
75 case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
76 return paravirt_patch_default(type, clobbers, ibuf, addr, len);
77 default:
78 return native_patch(type, clobbers, ibuf, addr, len);
79 }
80
81}
82
83static void __init set_vsmp_pv_ops(void)
84{
85 void __iomem *address;
86 unsigned int cap, ctl, cfg;
87
88 /* set vSMP magic bits to indicate vSMP capable kernel */
89 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
90 address = early_ioremap(cfg, 8);
91 cap = readl(address);
92 ctl = readl(address + 4);
93 printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
94 cap, ctl);
95 if (cap & ctl & (1 << 4)) {
96 /* Setup irq ops and turn on vSMP IRQ fastpath handling */
97 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
98 pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
99 pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
100 pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
101 pv_init_ops.patch = vsmp_patch;
102
103 ctl &= ~(1 << 4);
104 writel(ctl, address + 4);
105 ctl = readl(address + 4);
106 printk(KERN_INFO "vSMP CTL: control set to:0x%08x\n", ctl);
107 }
108
109 early_iounmap(address, 8);
110}
111#else
112static void __init set_vsmp_pv_ops(void)
113{
114}
115#endif
116
117#ifdef CONFIG_PCI
118static int is_vsmp = -1;
119
120static void __init detect_vsmp_box(void)
121{
122 is_vsmp = 0;
123
124 if (!early_pci_allowed())
125 return;
126
127 /* Check if we are running on a ScaleMP vSMPowered box */
128 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
129 (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
130 is_vsmp = 1;
131}
132
133int is_vsmp_box(void)
134{
135 if (is_vsmp != -1)
136 return is_vsmp;
137 else {
138 WARN_ON_ONCE(1);
139 return 0;
140 }
141}
142
143#else
144static void __init detect_vsmp_box(void)
145{
146}
147int is_vsmp_box(void)
148{
149 return 0;
150}
151#endif
152void __init vsmp_init(void)
153{
154 detect_vsmp_box();
155 if (!is_vsmp_box())
156 return;
157
158 set_vsmp_pv_ops();
159 return;
160}