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v4.17
  1/*
  2 * Manroland uc101 board Device Tree Source
  3 *
  4 * Copyright (C) 2009 DENX Software Engineering GmbH
  5 * Heiko Schocher <hs@denx.de>
  6 * Copyright 2006-2007 Secret Lab Technologies Ltd.
  7 *
  8 * This program is free software; you can redistribute  it and/or modify it
  9 * under  the terms of  the GNU General  Public License as published by the
 10 * Free Software Foundation;  either version 2 of the  License, or (at your
 11 * option) any later version.
 12 */
 13
 14/include/ "mpc5200b.dtsi"
 15
 16&gpt0 { gpio-controller; };
 17&gpt1 { gpio-controller; };
 18&gpt2 { gpio-controller; };
 19&gpt3 { gpio-controller; };
 20&gpt4 { gpio-controller; };
 21&gpt5 { gpio-controller; };
 22&gpt6 { gpio-controller; };
 23&gpt7 { gpio-controller; };
 24
 25/ {
 26	model = "manroland,uc101";
 27	compatible = "manroland,uc101";
 28
 29	soc5200@f0000000 {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 30		rtc@800 {
 31			status = "disabled";
 32		};
 33
 34		can@900 {
 35			status = "disabled";
 36		};
 37
 38		can@980 {
 39			status = "disabled";
 40		};
 41
 42		spi@f00 {
 43			status = "disabled";
 44		};
 45
 46		usb@1000 {
 47			status = "disabled";
 48		};
 49
 50		psc@2000 {	// PSC1
 51			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 52		};
 53
 54		psc@2200 {	// PSC2
 55			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 56		};
 57
 58		psc@2400 {	// PSC3
 59			status = "disabled";
 60		};
 61
 62		psc@2600 {	// PSC4
 63			status = "disabled";
 64		};
 65
 66		psc@2800 {	// PSC5
 67			status = "disabled";
 68		};
 69
 70		psc@2c00 {	// PSC6
 71			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 72		};
 73
 74		ethernet@3000 {
 75			phy-handle = <&phy0>;
 76		};
 77
 78		mdio@3000 {
 79			phy0: ethernet-phy@0 {
 80				compatible = "intel,lxt971";
 81				reg = <0>;
 82			};
 83		};
 84
 85		i2c@3d00 {
 86			status = "disabled";
 87		};
 88
 89		i2c@3d40 {
 90			fsl,preserve-clocking;
 91			clock-frequency = <400000>;
 92
 93			hwmon@2c {
 94				compatible = "ad,adm9240";
 95				reg = <0x2c>;
 96			};
 97			rtc@51 {
 98				compatible = "nxp,pcf8563";
 99				reg = <0x51>;
100			};
101		};
102	};
103
104	pci@f0000d00 {
105		status = "disabled";
106	};
107
108	localbus {
109		ranges = <0 0 0xff800000 0x00800000
110			  1 0 0x80000000 0x00800000
111			  3 0 0x80000000 0x00800000>;
112
113		flash@0,0 {
114			compatible = "cfi-flash";
115			reg = <0 0 0x00800000>;
116			bank-width = <2>;
117			device-width = <2>;
118			#size-cells = <1>;
119			#address-cells = <1>;
120
121			partition@0 {
122				label = "DTS";
123				reg = <0x0 0x00100000>;
124			};
125			partition@100000 {
126				label = "Kernel";
127				reg = <0x100000 0x00200000>;
128			};
129			partition@300000 {
130				label = "RootFS";
131				reg = <0x00300000 0x00200000>;
132			};
133			partition@500000 {
134				label = "user";
135				reg = <0x00500000 0x00200000>;
136			};
137			partition@700000 {
138				label = "U-Boot";
139				reg = <0x00700000 0x00040000>;
140			};
141			partition@740000 {
142				label = "Env";
143				reg = <0x00740000 0x00010000>;
144			};
145			partition@750000 {
146				label = "red. Env";
147				reg = <0x00750000 0x00010000>;
148			};
149			partition@760000 {
150				label = "reserve";
151				reg = <0x00760000 0x000a0000>;
152			};
153		};
154
155	};
156};
v3.1
  1/*
  2 * Manroland uc101 board Device Tree Source
  3 *
  4 * Copyright (C) 2009 DENX Software Engineering GmbH
  5 * Heiko Schocher <hs@denx.de>
  6 * Copyright 2006-2007 Secret Lab Technologies Ltd.
  7 *
  8 * This program is free software; you can redistribute  it and/or modify it
  9 * under  the terms of  the GNU General  Public License as published by the
 10 * Free Software Foundation;  either version 2 of the  License, or (at your
 11 * option) any later version.
 12 */
 13
 14/include/ "mpc5200b.dtsi"
 15
 
 
 
 
 
 
 
 
 
 16/ {
 17	model = "manroland,uc101";
 18	compatible = "manroland,uc101";
 19
 20	soc5200@f0000000 {
 21		gpt0: timer@600 {	// General Purpose Timer in GPIO mode
 22			gpio-controller;
 23			#gpio-cells = <2>;
 24		};
 25
 26		gpt1: timer@610 {	// General Purpose Timer in GPIO mode
 27			gpio-controller;
 28			#gpio-cells = <2>;
 29		};
 30
 31		gpt2: timer@620 {	// General Purpose Timer in GPIO mode
 32			gpio-controller;
 33			#gpio-cells = <2>;
 34		};
 35
 36		gpt3: timer@630 {	// General Purpose Timer in GPIO mode
 37			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
 38			reg = <0x630 0x10>;
 39			interrupts = <1 12 0>;
 40			gpio-controller;
 41			#gpio-cells = <2>;
 42		};
 43
 44		gpt4: timer@640 {	// General Purpose Timer in GPIO mode
 45			gpio-controller;
 46			#gpio-cells = <2>;
 47		};
 48
 49		gpt5: timer@650 {	// General Purpose Timer in GPIO mode
 50			gpio-controller;
 51			#gpio-cells = <2>;
 52		};
 53
 54		gpt6: timer@660 {	// General Purpose Timer in GPIO mode
 55			gpio-controller;
 56			#gpio-cells = <2>;
 57		};
 58
 59		gpt7: timer@670 {	// General Purpose Timer in GPIO mode
 60			gpio-controller;
 61			#gpio-cells = <2>;
 62		};
 63
 64		rtc@800 {
 65			status = "disabled";
 66		};
 67
 68		can@900 {
 69			status = "disabled";
 70		};
 71
 72		can@980 {
 73			status = "disabled";
 74		};
 75
 76		spi@f00 {
 77			status = "disabled";
 78		};
 79
 80		usb@1000 {
 81			status = "disabled";
 82		};
 83
 84		psc@2000 {	// PSC1
 85			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 86		};
 87
 88		psc@2200 {	// PSC2
 89			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 90		};
 91
 92		psc@2400 {	// PSC3
 93			status = "disabled";
 94		};
 95
 96		psc@2600 {	// PSC4
 97			status = "disabled";
 98		};
 99
100		psc@2800 {	// PSC5
101			status = "disabled";
102		};
103
104		psc@2c00 {	// PSC6
105			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
106		};
107
108		ethernet@3000 {
109			phy-handle = <&phy0>;
110		};
111
112		mdio@3000 {
113			phy0: ethernet-phy@0 {
114				compatible = "intel,lxt971";
115				reg = <0>;
116			};
117		};
118
119		i2c@3d00 {
120			status = "disabled";
121		};
122
123		i2c@3d40 {
124			fsl,preserve-clocking;
125			clock-frequency = <400000>;
126
127			hwmon@2c {
128				compatible = "ad,adm9240";
129				reg = <0x2c>;
130			};
131			rtc@51 {
132				compatible = "nxp,pcf8563";
133				reg = <0x51>;
134			};
135		};
136	};
137
138	pci@f0000d00 {
139		status = "disabled";
140	};
141
142	localbus {
143		ranges = <0 0 0xff800000 0x00800000
144			  1 0 0x80000000 0x00800000
145			  3 0 0x80000000 0x00800000>;
146
147		flash@0,0 {
148			compatible = "cfi-flash";
149			reg = <0 0 0x00800000>;
150			bank-width = <2>;
151			device-width = <2>;
152			#size-cells = <1>;
153			#address-cells = <1>;
154
155			partition@0 {
156				label = "DTS";
157				reg = <0x0 0x00100000>;
158			};
159			partition@100000 {
160				label = "Kernel";
161				reg = <0x100000 0x00200000>;
162			};
163			partition@300000 {
164				label = "RootFS";
165				reg = <0x00300000 0x00200000>;
166			};
167			partition@500000 {
168				label = "user";
169				reg = <0x00500000 0x00200000>;
170			};
171			partition@700000 {
172				label = "U-Boot";
173				reg = <0x00700000 0x00040000>;
174			};
175			partition@740000 {
176				label = "Env";
177				reg = <0x00740000 0x00010000>;
178			};
179			partition@750000 {
180				label = "red. Env";
181				reg = <0x00750000 0x00010000>;
182			};
183			partition@760000 {
184				label = "reserve";
185				reg = <0x00760000 0x000a0000>;
186			};
187		};
188
189	};
190};