1/*
  2 * P2020 RDB  Core0 Device Tree Source in CAMP mode.
  3 *
  4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
  5 * can be shared, all the other devices must be assigned to one core only.
  6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
  7 * eth1, eth2, sdhc, crypto, global-util, pci0.
  8 *
  9 * Copyright 2009-2011 Freescale Semiconductor Inc.
 10 *
 11 * This program is free software; you can redistribute  it and/or modify it
 12 * under  the terms of  the GNU General  Public License as published by the
 13 * Free Software Foundation;  either version 2 of the  License, or (at your
 14 * option) any later version.
 15 */
 16
 17/include/ "p2020si.dtsi"
 18
 19/ {
 20	model = "fsl,P2020RDB";
 21	compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
 22
 23	aliases {
 24		ethernet1 = &enet1;
 25		ethernet2 = &enet2;
 26		serial0 = &serial0;
 27		pci0 = &pci0;
 28	};
 29
 30	cpus {
 31		PowerPC,P2020@1 {
 32		status = "disabled";
 33		};
 34
 35	};
 36
 37	memory {
 38		device_type = "memory";
 39	};
 40
 41	localbus@ffe05000 {
 42		status = "disabled";
 43	};
 44
 45	soc@ffe00000 {
 46		i2c@3000 {
 47			rtc@68 {
 48				compatible = "dallas,ds1339";
 49				reg = <0x68>;
 50			};
 51		};
 52
 53		serial1: serial@4600 {
 54			status = "disabled";
 55		};
 56
 57		spi@7000 {
 58
 59			fsl_m25p80@0 {
 60				#address-cells = <1>;
 61				#size-cells = <1>;
 62				compatible = "fsl,espi-flash";
 63				reg = <0>;
 64				linux,modalias = "fsl_m25p80";
 65				modal = "s25sl128b";
 66				spi-max-frequency = <50000000>;
 67				mode = <0>;
 68
 69				partition@0 {
 70					/* 512KB for u-boot Bootloader Image */
 71					reg = <0x0 0x00080000>;
 72					label = "SPI (RO) U-Boot Image";
 73					read-only;
 74				};
 75
 76				partition@80000 {
 77					/* 512KB for DTB Image */
 78					reg = <0x00080000 0x00080000>;
 79					label = "SPI (RO) DTB Image";
 80					read-only;
 81				};
 82
 83				partition@100000 {
 84					/* 4MB for Linux Kernel Image */
 85					reg = <0x00100000 0x00400000>;
 86					label = "SPI (RO) Linux Kernel Image";
 87					read-only;
 88				};
 89
 90				partition@500000 {
 91					/* 4MB for Compressed RFS Image */
 92					reg = <0x00500000 0x00400000>;
 93					label = "SPI (RO) Compressed RFS Image";
 94					read-only;
 95				};
 96
 97				partition@900000 {
 98					/* 7MB for JFFS2 based RFS */
 99					reg = <0x00900000 0x00700000>;
100					label = "SPI (RW) JFFS2 RFS";
101				};
102			};
103		};
104
105		dma@c300 {
106			status = "disabled";
107		};
108
109		usb@22000 {
110			phy_type = "ulpi";
111		};
112
113		mdio@24520 {
114
115			phy0: ethernet-phy@0 {
116				interrupt-parent = <&mpic>;
117				interrupts = <3 1>;
118				reg = <0x0>;
119			};
120			phy1: ethernet-phy@1 {
121				interrupt-parent = <&mpic>;
122				interrupts = <3 1>;
123				reg = <0x1>;
124			};
125		};
126
127		mdio@25520 {
128			tbi0: tbi-phy@11 {
129				reg = <0x11>;
130				device_type = "tbi-phy";
131			};
132		};
133
134		mdio@26520 {
135			status = "disabled";
136		};
137
138		enet0: ethernet@24000 {
139			status = "disabled";
140		};
141
142		enet1: ethernet@25000 {
143			tbi-handle = <&tbi0>;
144			phy-handle = <&phy0>;
145			phy-connection-type = "sgmii";
146
147		};
148
149		enet2: ethernet@26000 {
150			phy-handle = <&phy1>;
151			phy-connection-type = "rgmii-id";
152		};
153
154
155		mpic: pic@40000 {
156			protected-sources = <
157			42 76 77 78 79 /* serial1 , dma2 */
158			29 30 34 26 /* enet0, pci1 */
159			0xe0 0xe1 0xe2 0xe3 /* msi */
160			0xe4 0xe5 0xe6 0xe7
161			>;
162		};
163
164		msi@41600 {
165			status = "disabled";
166		};
167
168
169	};
170
171	pci0: pcie@ffe08000 {
172		status = "disabled";
173	};
174
175	pci1: pcie@ffe09000 {
176		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
177			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
178		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
179		interrupt-map = <
180			/* IDSEL 0x0 */
181			0000 0x0 0x0 0x1 &mpic 0x4 0x1
182			0000 0x0 0x0 0x2 &mpic 0x5 0x1
183			0000 0x0 0x0 0x3 &mpic 0x6 0x1
184			0000 0x0 0x0 0x4 &mpic 0x7 0x1
185			>;
186		pcie@0 {
187			reg = <0x0 0x0 0x0 0x0 0x0>;
188			#size-cells = <2>;
189			#address-cells = <3>;
190			device_type = "pci";
191			ranges = <0x2000000 0x0 0xa0000000
192				  0x2000000 0x0 0xa0000000
193				  0x0 0x20000000
194
195				  0x1000000 0x0 0x0
196				  0x1000000 0x0 0x0
197				  0x0 0x100000>;
198		};
199	};
200
201	pci2: pcie@ffe0a000 {
202		status = "disabled";
203	};
204};