Loading...
Note: File does not exist in v4.17.
1/*
2 * P1020 RDB Device Tree Source
3 *
4 * Copyright 2009-2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "p1020si.dtsi"
13
14/ {
15 model = "fsl,P1020RDB";
16 compatible = "fsl,P1020RDB";
17
18 aliases {
19 serial0 = &serial0;
20 serial1 = &serial1;
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 };
27
28 memory {
29 device_type = "memory";
30 };
31
32 localbus@ffe05000 {
33
34 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
35 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
36 0x1 0x0 0x0 0xffa00000 0x00040000
37 0x2 0x0 0x0 0xffb00000 0x00020000>;
38
39 nor@0,0 {
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "cfi-flash";
43 reg = <0x0 0x0 0x1000000>;
44 bank-width = <2>;
45 device-width = <1>;
46
47 partition@0 {
48 /* This location must not be altered */
49 /* 256KB for Vitesse 7385 Switch firmware */
50 reg = <0x0 0x00040000>;
51 label = "NOR (RO) Vitesse-7385 Firmware";
52 read-only;
53 };
54
55 partition@40000 {
56 /* 256KB for DTB Image */
57 reg = <0x00040000 0x00040000>;
58 label = "NOR (RO) DTB Image";
59 read-only;
60 };
61
62 partition@80000 {
63 /* 3.5 MB for Linux Kernel Image */
64 reg = <0x00080000 0x00380000>;
65 label = "NOR (RO) Linux Kernel Image";
66 read-only;
67 };
68
69 partition@400000 {
70 /* 11MB for JFFS2 based Root file System */
71 reg = <0x00400000 0x00b00000>;
72 label = "NOR (RW) JFFS2 Root File System";
73 };
74
75 partition@f00000 {
76 /* This location must not be altered */
77 /* 512KB for u-boot Bootloader Image */
78 /* 512KB for u-boot Environment Variables */
79 reg = <0x00f00000 0x00100000>;
80 label = "NOR (RO) U-Boot Image";
81 read-only;
82 };
83 };
84
85 nand@1,0 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "fsl,p1020-fcm-nand",
89 "fsl,elbc-fcm-nand";
90 reg = <0x1 0x0 0x40000>;
91
92 partition@0 {
93 /* This location must not be altered */
94 /* 1MB for u-boot Bootloader Image */
95 reg = <0x0 0x00100000>;
96 label = "NAND (RO) U-Boot Image";
97 read-only;
98 };
99
100 partition@100000 {
101 /* 1MB for DTB Image */
102 reg = <0x00100000 0x00100000>;
103 label = "NAND (RO) DTB Image";
104 read-only;
105 };
106
107 partition@200000 {
108 /* 4MB for Linux Kernel Image */
109 reg = <0x00200000 0x00400000>;
110 label = "NAND (RO) Linux Kernel Image";
111 read-only;
112 };
113
114 partition@600000 {
115 /* 4MB for Compressed Root file System Image */
116 reg = <0x00600000 0x00400000>;
117 label = "NAND (RO) Compressed RFS Image";
118 read-only;
119 };
120
121 partition@a00000 {
122 /* 7MB for JFFS2 based Root file System */
123 reg = <0x00a00000 0x00700000>;
124 label = "NAND (RW) JFFS2 Root File System";
125 };
126
127 partition@1100000 {
128 /* 15MB for JFFS2 based Root file System */
129 reg = <0x01100000 0x00f00000>;
130 label = "NAND (RW) Writable User area";
131 };
132 };
133
134 L2switch@2,0 {
135 #address-cells = <1>;
136 #size-cells = <1>;
137 compatible = "vitesse-7385";
138 reg = <0x2 0x0 0x20000>;
139 };
140
141 };
142
143 soc@ffe00000 {
144 i2c@3000 {
145 rtc@68 {
146 compatible = "dallas,ds1339";
147 reg = <0x68>;
148 };
149 };
150
151 spi@7000 {
152
153 fsl_m25p80@0 {
154 #address-cells = <1>;
155 #size-cells = <1>;
156 compatible = "fsl,espi-flash";
157 reg = <0>;
158 linux,modalias = "fsl_m25p80";
159 modal = "s25sl128b";
160 spi-max-frequency = <50000000>;
161 mode = <0>;
162
163 partition@0 {
164 /* 512KB for u-boot Bootloader Image */
165 reg = <0x0 0x00080000>;
166 label = "SPI (RO) U-Boot Image";
167 read-only;
168 };
169
170 partition@80000 {
171 /* 512KB for DTB Image */
172 reg = <0x00080000 0x00080000>;
173 label = "SPI (RO) DTB Image";
174 read-only;
175 };
176
177 partition@100000 {
178 /* 4MB for Linux Kernel Image */
179 reg = <0x00100000 0x00400000>;
180 label = "SPI (RO) Linux Kernel Image";
181 read-only;
182 };
183
184 partition@500000 {
185 /* 4MB for Compressed RFS Image */
186 reg = <0x00500000 0x00400000>;
187 label = "SPI (RO) Compressed RFS Image";
188 read-only;
189 };
190
191 partition@900000 {
192 /* 7MB for JFFS2 based RFS */
193 reg = <0x00900000 0x00700000>;
194 label = "SPI (RW) JFFS2 RFS";
195 };
196 };
197 };
198
199 mdio@24000 {
200
201 phy0: ethernet-phy@0 {
202 interrupt-parent = <&mpic>;
203 interrupts = <3 1>;
204 reg = <0x0>;
205 };
206
207 phy1: ethernet-phy@1 {
208 interrupt-parent = <&mpic>;
209 interrupts = <2 1>;
210 reg = <0x1>;
211 };
212 };
213
214 mdio@25000 {
215
216 tbi0: tbi-phy@11 {
217 reg = <0x11>;
218 device_type = "tbi-phy";
219 };
220 };
221
222 enet0: ethernet@b0000 {
223 fixed-link = <1 1 1000 0 0>;
224 phy-connection-type = "rgmii-id";
225
226 };
227
228 enet1: ethernet@b1000 {
229 phy-handle = <&phy0>;
230 tbi-handle = <&tbi0>;
231 phy-connection-type = "sgmii";
232
233 };
234
235 enet2: ethernet@b2000 {
236 phy-handle = <&phy1>;
237 phy-connection-type = "rgmii-id";
238
239 };
240
241 usb@22000 {
242 phy_type = "ulpi";
243 };
244
245 /* USB2 is shared with localbus, so it must be disabled
246 by default. We can't put 'status = "disabled";' here
247 since U-Boot doesn't clear the status property when
248 it enables USB2. OTOH, U-Boot does create a new node
249 when there isn't any. So, just comment it out.
250 usb@23000 {
251 phy_type = "ulpi";
252 };
253 */
254
255 };
256
257 pci0: pcie@ffe09000 {
258 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
259 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
260 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
261 interrupt-map = <
262 /* IDSEL 0x0 */
263 0000 0x0 0x0 0x1 &mpic 0x4 0x1
264 0000 0x0 0x0 0x2 &mpic 0x5 0x1
265 0000 0x0 0x0 0x3 &mpic 0x6 0x1
266 0000 0x0 0x0 0x4 &mpic 0x7 0x1
267 >;
268 pcie@0 {
269 reg = <0x0 0x0 0x0 0x0 0x0>;
270 #size-cells = <2>;
271 #address-cells = <3>;
272 device_type = "pci";
273 ranges = <0x2000000 0x0 0xa0000000
274 0x2000000 0x0 0xa0000000
275 0x0 0x20000000
276
277 0x1000000 0x0 0x0
278 0x1000000 0x0 0x0
279 0x0 0x100000>;
280 };
281 };
282
283 pci1: pcie@ffe0a000 {
284 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
285 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
286 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
287 interrupt-map = <
288 /* IDSEL 0x0 */
289 0000 0x0 0x0 0x1 &mpic 0x0 0x1
290 0000 0x0 0x0 0x2 &mpic 0x1 0x1
291 0000 0x0 0x0 0x3 &mpic 0x2 0x1
292 0000 0x0 0x0 0x4 &mpic 0x3 0x1
293 >;
294 pcie@0 {
295 reg = <0x0 0x0 0x0 0x0 0x0>;
296 #size-cells = <2>;
297 #address-cells = <3>;
298 device_type = "pci";
299 ranges = <0x2000000 0x0 0x80000000
300 0x2000000 0x0 0x80000000
301 0x0 0x20000000
302
303 0x1000000 0x0 0x0
304 0x1000000 0x0 0x0
305 0x0 0x100000>;
306 };
307 };
308};