1/*
  2 * This file is subject to the terms and conditions of the GNU General Public
  3 * License.  See the file "COPYING" in the main directory of this archive
  4 * for more details.
  5 *
  6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
  7 * Copyright (C) 1996 by Paul M. Antoine
  8 * Copyright (C) 1999 Silicon Graphics
  9 * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
 10 * Copyright (C) 2000 MIPS Technologies, Inc.
 11 */
 12#ifndef _ASM_SWITCH_TO_H
 13#define _ASM_SWITCH_TO_H
 14
 15#include <asm/cpu-features.h>
 16#include <asm/watch.h>
 17#include <asm/dsp.h>
 18#include <asm/cop2.h>
 19#include <asm/fpu.h>
 20
 21struct task_struct;
 22
 23/**
 24 * resume - resume execution of a task
 25 * @prev:	The task previously executed.
 26 * @next:	The task to begin executing.
 27 * @next_ti:	task_thread_info(next).
 28 *
 29 * This function is used whilst scheduling to save the context of prev & load
 30 * the context of next. Returns prev.
 31 */
 32extern asmlinkage struct task_struct *resume(struct task_struct *prev,
 33		struct task_struct *next, struct thread_info *next_ti);
 34
 35extern unsigned int ll_bit;
 36extern struct task_struct *ll_task;
 37
 38#ifdef CONFIG_MIPS_MT_FPAFF
 39
 40/*
 41 * Handle the scheduler resume end of FPU affinity management.	We do this
 42 * inline to try to keep the overhead down. If we have been forced to run on
 43 * a "CPU" with an FPU because of a previous high level of FP computation,
 44 * but did not actually use the FPU during the most recent time-slice (CU1
 45 * isn't set), we undo the restriction on cpus_allowed.
 46 *
 47 * We're not calling set_cpus_allowed() here, because we have no need to
 48 * force prompt migration - we're already switching the current CPU to a
 49 * different thread.
 50 */
 51
 52#define __mips_mt_fpaff_switch_to(prev)					\
 53do {									\
 54	struct thread_info *__prev_ti = task_thread_info(prev);		\
 55									\
 56	if (cpu_has_fpu &&						\
 57	    test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) &&		\
 58	    (!(KSTK_STATUS(prev) & ST0_CU1))) {				\
 59		clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND);		\
 60		prev->cpus_allowed = prev->thread.user_cpus_allowed;	\
 61	}								\
 62	next->thread.emulated_fp = 0;					\
 63} while(0)
 64
 65#else
 66#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
 67#endif
 68
 69/*
 70 * Clear LLBit during context switches on MIPSr6 such that eretnc can be used
 71 * unconditionally when returning to userland in entry.S.
 72 */
 73#define __clear_r6_hw_ll_bit() do {					\
 74	if (cpu_has_mips_r6)						\
 75		write_c0_lladdr(0);					\
 76} while (0)
 77
 78#define __clear_software_ll_bit() do {					\
 79	if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc)	\
 80		ll_bit = 0;						\
 81} while (0)
 82
 83/*
 84 * Check FCSR for any unmasked exceptions pending set with `ptrace',
 85 * clear them and send a signal.
 86 */
 87#define __sanitize_fcr31(next)						\
 88do {									\
 89	unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31);	\
 90	void __user *pc;						\
 91									\
 92	if (unlikely(fcr31)) {						\
 93		pc = (void __user *)task_pt_regs(next)->cp0_epc;	\
 94		next->thread.fpu.fcr31 &= ~fcr31;			\
 95		force_fcr31_sig(fcr31, pc, next);			\
 96	}								\
 97} while (0)
 98
 99/*
100 * For newly created kernel threads switch_to() will return to
101 * ret_from_kernel_thread, newly created user threads to ret_from_fork.
102 * That is, everything following resume() will be skipped for new threads.
103 * So everything that matters to new threads should be placed before resume().
104 */
105#define switch_to(prev, next, last)					\
106do {									\
107	__mips_mt_fpaff_switch_to(prev);				\
108	lose_fpu_inatomic(1, prev);					\
109	if (tsk_used_math(next))					\
110		__sanitize_fcr31(next);					\
111	if (cpu_has_dsp) {						\
112		__save_dsp(prev);					\
113		__restore_dsp(next);					\
114	}								\
115	if (cop2_present) {						\
116		set_c0_status(ST0_CU2);					\
117		if ((KSTK_STATUS(prev) & ST0_CU2)) {			\
118			if (cop2_lazy_restore)				\
119				KSTK_STATUS(prev) &= ~ST0_CU2;		\
120			cop2_save(prev);				\
121		}							\
122		if (KSTK_STATUS(next) & ST0_CU2 &&			\
123		    !cop2_lazy_restore) {				\
124			cop2_restore(next);				\
125		}							\
126		clear_c0_status(ST0_CU2);				\
127	}								\
128	__clear_r6_hw_ll_bit();						\
129	__clear_software_ll_bit();					\
130	if (cpu_has_userlocal)						\
131		write_c0_userlocal(task_thread_info(next)->tp_value);	\
132	__restore_watch(next);						\
133	(last) = resume(prev, next, task_thread_info(next));		\
134} while (0)
135
136#endif /* _ASM_SWITCH_TO_H */