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1/*
2 * linux/arch/arm/mach-realview/realview_pb11mp.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/amba/pl061.h>
27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h>
29#include <linux/io.h>
30
31#include <mach/hardware.h>
32#include <asm/irq.h>
33#include <asm/leds.h>
34#include <asm/mach-types.h>
35#include <asm/pmu.h>
36#include <asm/pgtable.h>
37#include <asm/hardware/gic.h>
38#include <asm/hardware/cache-l2x0.h>
39#include <asm/localtimer.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/flash.h>
43#include <asm/mach/map.h>
44#include <asm/mach/time.h>
45
46#include <mach/board-pb11mp.h>
47#include <mach/irqs.h>
48
49#include "core.h"
50
51static struct map_desc realview_pb11mp_io_desc[] __initdata = {
52 {
53 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
79 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
80 .length = SZ_4K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
84 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 }, {
93 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
94 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
95 .length = SZ_8K,
96 .type = MT_DEVICE,
97 },
98#ifdef CONFIG_DEBUG_LL
99 {
100 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
101 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 },
105#endif
106};
107
108static void __init realview_pb11mp_map_io(void)
109{
110 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
111}
112
113static struct pl061_platform_data gpio0_plat_data = {
114 .gpio_base = 0,
115 .irq_base = -1,
116};
117
118static struct pl061_platform_data gpio1_plat_data = {
119 .gpio_base = 8,
120 .irq_base = -1,
121};
122
123static struct pl061_platform_data gpio2_plat_data = {
124 .gpio_base = 16,
125 .irq_base = -1,
126};
127
128static struct pl022_ssp_controller ssp0_plat_data = {
129 .bus_id = 0,
130 .enable_dma = 0,
131 .num_chipselect = 1,
132};
133
134/*
135 * RealView PB11MPCore AMBA devices
136 */
137
138#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
139#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
140#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
141#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
142#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
143#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
144#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
145#define MPMC_IRQ { NO_IRQ, NO_IRQ }
146#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
147#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
148#define SCTL_IRQ { NO_IRQ, NO_IRQ }
149#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
150#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
151#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
152#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
153#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
154#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
155#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
156#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
157#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
158#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
159
160/* FPGA Primecells */
161AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
162AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
163AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
164AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
165AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
166
167/* DevChip Primecells */
168AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
169AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
170AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
171AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
172AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
173AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
174AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
175AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
176AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
177AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
178AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
179AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
180
181/* Primecells on the NEC ISSP chip */
182AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
183AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
184
185static struct amba_device *amba_devs[] __initdata = {
186 &dmac_device,
187 &uart0_device,
188 &uart1_device,
189 &uart2_device,
190 &uart3_device,
191 &smc_device,
192 &clcd_device,
193 &sctl_device,
194 &wdog_device,
195 &gpio0_device,
196 &gpio1_device,
197 &gpio2_device,
198 &rtc_device,
199 &sci0_device,
200 &ssp0_device,
201 &aaci_device,
202 &mmc0_device,
203 &kmi0_device,
204 &kmi1_device,
205};
206
207/*
208 * RealView PB11MPCore platform devices
209 */
210static struct resource realview_pb11mp_flash_resource[] = {
211 [0] = {
212 .start = REALVIEW_PB11MP_FLASH0_BASE,
213 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = REALVIEW_PB11MP_FLASH1_BASE,
218 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
219 .flags = IORESOURCE_MEM,
220 },
221};
222
223static struct resource realview_pb11mp_smsc911x_resources[] = {
224 [0] = {
225 .start = REALVIEW_PB11MP_ETH_BASE,
226 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
227 .flags = IORESOURCE_MEM,
228 },
229 [1] = {
230 .start = IRQ_TC11MP_ETH,
231 .end = IRQ_TC11MP_ETH,
232 .flags = IORESOURCE_IRQ,
233 },
234};
235
236static struct resource realview_pb11mp_isp1761_resources[] = {
237 [0] = {
238 .start = REALVIEW_PB11MP_USB_BASE,
239 .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
240 .flags = IORESOURCE_MEM,
241 },
242 [1] = {
243 .start = IRQ_TC11MP_USB,
244 .end = IRQ_TC11MP_USB,
245 .flags = IORESOURCE_IRQ,
246 },
247};
248
249static struct resource pmu_resources[] = {
250 [0] = {
251 .start = IRQ_TC11MP_PMU_CPU0,
252 .end = IRQ_TC11MP_PMU_CPU0,
253 .flags = IORESOURCE_IRQ,
254 },
255 [1] = {
256 .start = IRQ_TC11MP_PMU_CPU1,
257 .end = IRQ_TC11MP_PMU_CPU1,
258 .flags = IORESOURCE_IRQ,
259 },
260 [2] = {
261 .start = IRQ_TC11MP_PMU_CPU2,
262 .end = IRQ_TC11MP_PMU_CPU2,
263 .flags = IORESOURCE_IRQ,
264 },
265 [3] = {
266 .start = IRQ_TC11MP_PMU_CPU3,
267 .end = IRQ_TC11MP_PMU_CPU3,
268 .flags = IORESOURCE_IRQ,
269 },
270};
271
272static struct platform_device pmu_device = {
273 .name = "arm-pmu",
274 .id = ARM_PMU_DEVICE_CPU,
275 .num_resources = ARRAY_SIZE(pmu_resources),
276 .resource = pmu_resources,
277};
278
279static void __init gic_init_irq(void)
280{
281 unsigned int pldctrl;
282
283 /* new irq mode with no DCC */
284 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
285 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
286 pldctrl |= 2 << 22;
287 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
288 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
289
290 /* ARM11MPCore test chip GIC, primary */
291 gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
292 __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
293
294 /* board GIC, secondary */
295 gic_init(1, IRQ_PB11MP_GIC_START,
296 __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
297 __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
298 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
299}
300
301static void __init realview_pb11mp_timer_init(void)
302{
303 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
304 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
305 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
306 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
307
308#ifdef CONFIG_LOCAL_TIMERS
309 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
310#endif
311 realview_timer_init(IRQ_TC11MP_TIMER0_1);
312}
313
314static struct sys_timer realview_pb11mp_timer = {
315 .init = realview_pb11mp_timer_init,
316};
317
318static void realview_pb11mp_reset(char mode)
319{
320 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
321 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
322
323 /*
324 * To reset, we hit the on-board reset register
325 * in the system FPGA
326 */
327 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
328 __raw_writel(0x0000, reset_ctrl);
329 __raw_writel(0x0004, reset_ctrl);
330}
331
332static void __init realview_pb11mp_init(void)
333{
334 int i;
335
336#ifdef CONFIG_CACHE_L2X0
337 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
338 * Bits: .... ...0 0111 1001 0000 .... .... .... */
339 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
340#endif
341
342 realview_flash_register(realview_pb11mp_flash_resource,
343 ARRAY_SIZE(realview_pb11mp_flash_resource));
344 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
345 platform_device_register(&realview_i2c_device);
346 platform_device_register(&realview_cf_device);
347 realview_usb_register(realview_pb11mp_isp1761_resources);
348 platform_device_register(&pmu_device);
349
350 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
351 struct amba_device *d = amba_devs[i];
352 amba_device_register(d, &iomem_resource);
353 }
354
355#ifdef CONFIG_LEDS
356 leds_event = realview_leds_event;
357#endif
358 realview_reset = realview_pb11mp_reset;
359}
360
361MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
362 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
363 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
364 .fixup = realview_fixup,
365 .map_io = realview_pb11mp_map_io,
366 .init_early = realview_init_early,
367 .init_irq = gic_init_irq,
368 .timer = &realview_pb11mp_timer,
369 .init_machine = realview_pb11mp_init,
370#ifdef CONFIG_ZONE_DMA
371 .dma_zone_size = SZ_256M,
372#endif
373MACHINE_END