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1/*
2 * mach-davinci/devices.c
3 *
4 * DaVinci platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <linux/io.h>
16#include <linux/reboot.h>
17
18#include <mach/hardware.h>
19#include <linux/platform_data/i2c-davinci.h>
20#include <mach/irqs.h>
21#include <mach/cputype.h>
22#include <mach/mux.h>
23#include <linux/platform_data/mmc-davinci.h>
24#include <mach/time.h>
25#include <linux/platform_data/edma.h>
26
27
28#include "davinci.h"
29#include "clock.h"
30
31#define DAVINCI_I2C_BASE 0x01C21000
32#define DAVINCI_ATA_BASE 0x01C66000
33#define DAVINCI_MMCSD0_BASE 0x01E10000
34#define DM355_MMCSD0_BASE 0x01E11000
35#define DM355_MMCSD1_BASE 0x01E00000
36#define DM365_MMCSD0_BASE 0x01D11000
37#define DM365_MMCSD1_BASE 0x01D00000
38
39void __iomem *davinci_sysmod_base;
40
41void davinci_map_sysmod(void)
42{
43 davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
44 0x800);
45 /*
46 * Throw a bug since a lot of board initialization code depends
47 * on system module availability. ioremap() failing this early
48 * need careful looking into anyway.
49 */
50 BUG_ON(!davinci_sysmod_base);
51}
52
53static struct resource i2c_resources[] = {
54 {
55 .start = DAVINCI_I2C_BASE,
56 .end = DAVINCI_I2C_BASE + 0x40,
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .start = IRQ_I2C,
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65static struct platform_device davinci_i2c_device = {
66 .name = "i2c_davinci",
67 .id = 1,
68 .num_resources = ARRAY_SIZE(i2c_resources),
69 .resource = i2c_resources,
70};
71
72void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
73{
74 if (cpu_is_davinci_dm644x())
75 davinci_cfg_reg(DM644X_I2C);
76
77 davinci_i2c_device.dev.platform_data = pdata;
78 (void) platform_device_register(&davinci_i2c_device);
79}
80
81static struct resource ide_resources[] = {
82 {
83 .start = DAVINCI_ATA_BASE,
84 .end = DAVINCI_ATA_BASE + 0x7ff,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = IRQ_IDE,
89 .end = IRQ_IDE,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94static u64 ide_dma_mask = DMA_BIT_MASK(32);
95
96static struct platform_device ide_device = {
97 .name = "palm_bk3710",
98 .id = -1,
99 .resource = ide_resources,
100 .num_resources = ARRAY_SIZE(ide_resources),
101 .dev = {
102 .dma_mask = &ide_dma_mask,
103 .coherent_dma_mask = DMA_BIT_MASK(32),
104 },
105};
106
107void __init davinci_init_ide(void)
108{
109 if (cpu_is_davinci_dm644x()) {
110 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
111 davinci_cfg_reg(DM644X_ATAEN);
112 davinci_cfg_reg(DM644X_HDIREN);
113 } else if (cpu_is_davinci_dm646x()) {
114 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
115 davinci_cfg_reg(DM646X_ATAEN);
116 } else {
117 WARN_ON(1);
118 return;
119 }
120
121 platform_device_register(&ide_device);
122}
123
124#if IS_ENABLED(CONFIG_MMC_DAVINCI)
125
126static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
127
128static struct resource mmcsd0_resources[] = {
129 {
130 /* different on dm355 */
131 .start = DAVINCI_MMCSD0_BASE,
132 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
133 .flags = IORESOURCE_MEM,
134 },
135 /* IRQs: MMC/SD, then SDIO */
136 {
137 .start = IRQ_MMCINT,
138 .flags = IORESOURCE_IRQ,
139 }, {
140 /* different on dm355 */
141 .start = IRQ_SDIOINT,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device davinci_mmcsd0_device = {
147 .name = "dm6441-mmc",
148 .id = 0,
149 .dev = {
150 .dma_mask = &mmcsd0_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
152 },
153 .num_resources = ARRAY_SIZE(mmcsd0_resources),
154 .resource = mmcsd0_resources,
155};
156
157static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
158
159static struct resource mmcsd1_resources[] = {
160 {
161 .start = DM355_MMCSD1_BASE,
162 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
163 .flags = IORESOURCE_MEM,
164 },
165 /* IRQs: MMC/SD, then SDIO */
166 {
167 .start = IRQ_DM355_MMCINT1,
168 .flags = IORESOURCE_IRQ,
169 }, {
170 .start = IRQ_DM355_SDIOINT1,
171 .flags = IORESOURCE_IRQ,
172 },
173};
174
175static struct platform_device davinci_mmcsd1_device = {
176 .name = "dm6441-mmc",
177 .id = 1,
178 .dev = {
179 .dma_mask = &mmcsd1_dma_mask,
180 .coherent_dma_mask = DMA_BIT_MASK(32),
181 },
182 .num_resources = ARRAY_SIZE(mmcsd1_resources),
183 .resource = mmcsd1_resources,
184};
185
186
187void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
188{
189 struct platform_device *pdev = NULL;
190
191 if (WARN_ON(cpu_is_davinci_dm646x()))
192 return;
193
194 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
195 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
196 *
197 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
198 * not handled right here ...
199 */
200 switch (module) {
201 case 1:
202 if (cpu_is_davinci_dm355()) {
203 /* REVISIT we may not need all these pins if e.g. this
204 * is a hard-wired SDIO device...
205 */
206 davinci_cfg_reg(DM355_SD1_CMD);
207 davinci_cfg_reg(DM355_SD1_CLK);
208 davinci_cfg_reg(DM355_SD1_DATA0);
209 davinci_cfg_reg(DM355_SD1_DATA1);
210 davinci_cfg_reg(DM355_SD1_DATA2);
211 davinci_cfg_reg(DM355_SD1_DATA3);
212 } else if (cpu_is_davinci_dm365()) {
213 /* Configure pull down control */
214 unsigned v;
215
216 v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
217 __raw_writel(v & ~0xfc0,
218 DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
219
220 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
221 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
222 SZ_4K - 1;
223 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
224 davinci_mmcsd1_device.name = "da830-mmc";
225 } else
226 break;
227
228 pdev = &davinci_mmcsd1_device;
229 break;
230 case 0:
231 if (cpu_is_davinci_dm355()) {
232 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
233 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
234 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
235
236 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
237 davinci_cfg_reg(DM355_MMCSD0);
238
239 /* enable RX EDMA */
240 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
241 } else if (cpu_is_davinci_dm365()) {
242 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
243 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
244 SZ_4K - 1;
245 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
246 davinci_mmcsd0_device.name = "da830-mmc";
247 } else if (cpu_is_davinci_dm644x()) {
248 /* REVISIT: should this be in board-init code? */
249 /* Power-on 3.3V IO cells */
250 __raw_writel(0,
251 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
252 /*Set up the pull regiter for MMC */
253 davinci_cfg_reg(DM644X_MSTK);
254 }
255
256 pdev = &davinci_mmcsd0_device;
257 break;
258 }
259
260 if (WARN_ON(!pdev))
261 return;
262
263 pdev->dev.platform_data = config;
264 platform_device_register(pdev);
265}
266
267#else
268
269void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
270{
271}
272
273#endif
274
275/*-------------------------------------------------------------------------*/
276
277static struct resource wdt_resources[] = {
278 {
279 .start = DAVINCI_WDOG_BASE,
280 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
281 .flags = IORESOURCE_MEM,
282 },
283};
284
285static struct platform_device davinci_wdt_device = {
286 .name = "davinci-wdt",
287 .id = -1,
288 .num_resources = ARRAY_SIZE(wdt_resources),
289 .resource = wdt_resources,
290};
291
292int davinci_init_wdt(void)
293{
294 return platform_device_register(&davinci_wdt_device);
295}
296
297static struct platform_device davinci_gpio_device = {
298 .name = "davinci_gpio",
299 .id = -1,
300};
301
302int davinci_gpio_register(struct resource *res, int size, void *pdata)
303{
304 davinci_gpio_device.resource = res;
305 davinci_gpio_device.num_resources = size;
306 davinci_gpio_device.dev.platform_data = pdata;
307 return platform_device_register(&davinci_gpio_device);
308}
309
310/*-------------------------------------------------------------------------*/
311
312/*-------------------------------------------------------------------------*/
313
314struct davinci_timer_instance davinci_timer_instance[2] = {
315 {
316 .base = DAVINCI_TIMER0_BASE,
317 .bottom_irq = IRQ_TINT0_TINT12,
318 .top_irq = IRQ_TINT0_TINT34,
319 },
320 {
321 .base = DAVINCI_TIMER1_BASE,
322 .bottom_irq = IRQ_TINT1_TINT12,
323 .top_irq = IRQ_TINT1_TINT34,
324 },
325};
326
1/*
2 * mach-davinci/devices.c
3 *
4 * DaVinci platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <linux/io.h>
16
17#include <mach/hardware.h>
18#include <mach/i2c.h>
19#include <mach/irqs.h>
20#include <mach/cputype.h>
21#include <mach/mux.h>
22#include <mach/edma.h>
23#include <mach/mmc.h>
24#include <mach/time.h>
25
26#include "clock.h"
27
28#define DAVINCI_I2C_BASE 0x01C21000
29#define DAVINCI_ATA_BASE 0x01C66000
30#define DAVINCI_MMCSD0_BASE 0x01E10000
31#define DM355_MMCSD0_BASE 0x01E11000
32#define DM355_MMCSD1_BASE 0x01E00000
33#define DM365_MMCSD0_BASE 0x01D11000
34#define DM365_MMCSD1_BASE 0x01D00000
35
36/* System control register offsets */
37#define DM64XX_VDD3P3V_PWDN 0x48
38
39static struct resource i2c_resources[] = {
40 {
41 .start = DAVINCI_I2C_BASE,
42 .end = DAVINCI_I2C_BASE + 0x40,
43 .flags = IORESOURCE_MEM,
44 },
45 {
46 .start = IRQ_I2C,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct platform_device davinci_i2c_device = {
52 .name = "i2c_davinci",
53 .id = 1,
54 .num_resources = ARRAY_SIZE(i2c_resources),
55 .resource = i2c_resources,
56};
57
58void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
59{
60 if (cpu_is_davinci_dm644x())
61 davinci_cfg_reg(DM644X_I2C);
62
63 davinci_i2c_device.dev.platform_data = pdata;
64 (void) platform_device_register(&davinci_i2c_device);
65}
66
67static struct resource ide_resources[] = {
68 {
69 .start = DAVINCI_ATA_BASE,
70 .end = DAVINCI_ATA_BASE + 0x7ff,
71 .flags = IORESOURCE_MEM,
72 },
73 {
74 .start = IRQ_IDE,
75 .end = IRQ_IDE,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static u64 ide_dma_mask = DMA_BIT_MASK(32);
81
82static struct platform_device ide_device = {
83 .name = "palm_bk3710",
84 .id = -1,
85 .resource = ide_resources,
86 .num_resources = ARRAY_SIZE(ide_resources),
87 .dev = {
88 .dma_mask = &ide_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
90 },
91};
92
93void __init davinci_init_ide(void)
94{
95 if (cpu_is_davinci_dm644x()) {
96 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
97 davinci_cfg_reg(DM644X_ATAEN);
98 davinci_cfg_reg(DM644X_HDIREN);
99 } else if (cpu_is_davinci_dm646x()) {
100 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
101 davinci_cfg_reg(DM646X_ATAEN);
102 } else {
103 WARN_ON(1);
104 return;
105 }
106
107 platform_device_register(&ide_device);
108}
109
110#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
111
112static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
113
114static struct resource mmcsd0_resources[] = {
115 {
116 /* different on dm355 */
117 .start = DAVINCI_MMCSD0_BASE,
118 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 /* IRQs: MMC/SD, then SDIO */
122 {
123 .start = IRQ_MMCINT,
124 .flags = IORESOURCE_IRQ,
125 }, {
126 /* different on dm355 */
127 .start = IRQ_SDIOINT,
128 .flags = IORESOURCE_IRQ,
129 },
130 /* DMA channels: RX, then TX */
131 {
132 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
133 .flags = IORESOURCE_DMA,
134 }, {
135 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
136 .flags = IORESOURCE_DMA,
137 },
138};
139
140static struct platform_device davinci_mmcsd0_device = {
141 .name = "davinci_mmc",
142 .id = 0,
143 .dev = {
144 .dma_mask = &mmcsd0_dma_mask,
145 .coherent_dma_mask = DMA_BIT_MASK(32),
146 },
147 .num_resources = ARRAY_SIZE(mmcsd0_resources),
148 .resource = mmcsd0_resources,
149};
150
151static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
152
153static struct resource mmcsd1_resources[] = {
154 {
155 .start = DM355_MMCSD1_BASE,
156 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
157 .flags = IORESOURCE_MEM,
158 },
159 /* IRQs: MMC/SD, then SDIO */
160 {
161 .start = IRQ_DM355_MMCINT1,
162 .flags = IORESOURCE_IRQ,
163 }, {
164 .start = IRQ_DM355_SDIOINT1,
165 .flags = IORESOURCE_IRQ,
166 },
167 /* DMA channels: RX, then TX */
168 {
169 .start = EDMA_CTLR_CHAN(0, 30), /* rx */
170 .flags = IORESOURCE_DMA,
171 }, {
172 .start = EDMA_CTLR_CHAN(0, 31), /* tx */
173 .flags = IORESOURCE_DMA,
174 },
175};
176
177static struct platform_device davinci_mmcsd1_device = {
178 .name = "davinci_mmc",
179 .id = 1,
180 .dev = {
181 .dma_mask = &mmcsd1_dma_mask,
182 .coherent_dma_mask = DMA_BIT_MASK(32),
183 },
184 .num_resources = ARRAY_SIZE(mmcsd1_resources),
185 .resource = mmcsd1_resources,
186};
187
188
189void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
190{
191 struct platform_device *pdev = NULL;
192
193 if (WARN_ON(cpu_is_davinci_dm646x()))
194 return;
195
196 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
197 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
198 *
199 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
200 * not handled right here ...
201 */
202 switch (module) {
203 case 1:
204 if (cpu_is_davinci_dm355()) {
205 /* REVISIT we may not need all these pins if e.g. this
206 * is a hard-wired SDIO device...
207 */
208 davinci_cfg_reg(DM355_SD1_CMD);
209 davinci_cfg_reg(DM355_SD1_CLK);
210 davinci_cfg_reg(DM355_SD1_DATA0);
211 davinci_cfg_reg(DM355_SD1_DATA1);
212 davinci_cfg_reg(DM355_SD1_DATA2);
213 davinci_cfg_reg(DM355_SD1_DATA3);
214 } else if (cpu_is_davinci_dm365()) {
215 void __iomem *pupdctl1 =
216 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
217
218 /* Configure pull down control */
219 __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
220 pupdctl1);
221
222 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
223 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
224 SZ_4K - 1;
225 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
226 } else
227 break;
228
229 pdev = &davinci_mmcsd1_device;
230 break;
231 case 0:
232 if (cpu_is_davinci_dm355()) {
233 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
234 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
235 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
236
237 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
238 davinci_cfg_reg(DM355_MMCSD0);
239
240 /* enable RX EDMA */
241 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
242 } else if (cpu_is_davinci_dm365()) {
243 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
244 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
245 SZ_4K - 1;
246 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
247 } else if (cpu_is_davinci_dm644x()) {
248 /* REVISIT: should this be in board-init code? */
249 void __iomem *base =
250 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
251
252 /* Power-on 3.3V IO cells */
253 __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
254 /*Set up the pull regiter for MMC */
255 davinci_cfg_reg(DM644X_MSTK);
256 }
257
258 pdev = &davinci_mmcsd0_device;
259 break;
260 }
261
262 if (WARN_ON(!pdev))
263 return;
264
265 pdev->dev.platform_data = config;
266 platform_device_register(pdev);
267}
268
269#else
270
271void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
272{
273}
274
275#endif
276
277/*-------------------------------------------------------------------------*/
278
279static struct resource wdt_resources[] = {
280 {
281 .start = DAVINCI_WDOG_BASE,
282 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
283 .flags = IORESOURCE_MEM,
284 },
285};
286
287struct platform_device davinci_wdt_device = {
288 .name = "watchdog",
289 .id = -1,
290 .num_resources = ARRAY_SIZE(wdt_resources),
291 .resource = wdt_resources,
292};
293
294static void davinci_init_wdt(void)
295{
296 platform_device_register(&davinci_wdt_device);
297}
298
299/*-------------------------------------------------------------------------*/
300
301static struct platform_device davinci_pcm_device = {
302 .name = "davinci-pcm-audio",
303 .id = -1,
304};
305
306static void davinci_init_pcm(void)
307{
308 platform_device_register(&davinci_pcm_device);
309}
310
311/*-------------------------------------------------------------------------*/
312
313struct davinci_timer_instance davinci_timer_instance[2] = {
314 {
315 .base = DAVINCI_TIMER0_BASE,
316 .bottom_irq = IRQ_TINT0_TINT12,
317 .top_irq = IRQ_TINT0_TINT34,
318 },
319 {
320 .base = DAVINCI_TIMER1_BASE,
321 .bottom_irq = IRQ_TINT1_TINT12,
322 .top_irq = IRQ_TINT1_TINT34,
323 },
324};
325
326/*-------------------------------------------------------------------------*/
327
328static int __init davinci_init_devices(void)
329{
330 /* please keep these calls, and their implementations above,
331 * in alphabetical order so they're easier to sort through.
332 */
333 davinci_init_pcm();
334 davinci_init_wdt();
335
336 return 0;
337}
338arch_initcall(davinci_init_devices);
339