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1/*
2 * The code contained herein is licensed under the GNU General Public
3 * License. You may obtain a copy of the GNU General Public License
4 * Version 2 or later at the following locations:
5 *
6 * http://www.opensource.org/licenses/gpl-license.html
7 * http://www.gnu.org/copyleft/gpl.html
8 */
9
10#include "imx27-phytec-phycore-som.dtsi"
11
12/ {
13 model = "Phytec pcm970";
14 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
15
16 chosen {
17 stdout-path = &uart1;
18 };
19
20 display0: LQ035Q7 {
21 model = "Sharp-LQ035Q7";
22 native-mode = <&timing0>;
23 bits-per-pixel = <16>;
24 fsl,pcr = <0xf00080c0>;
25
26 display-timings {
27 timing0: 240x320 {
28 clock-frequency = <5500000>;
29 hactive = <240>;
30 vactive = <320>;
31 hback-porch = <5>;
32 hsync-len = <7>;
33 hfront-porch = <16>;
34 vback-porch = <7>;
35 vsync-len = <1>;
36 vfront-porch = <9>;
37 pixelclk-active = <1>;
38 hsync-active = <1>;
39 vsync-active = <1>;
40 de-active = <0>;
41 };
42 };
43 };
44
45 regulators {
46 regulator@2 {
47 compatible = "regulator-fixed";
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_csien>;
50 reg = <2>;
51 regulator-name = "CSI_EN";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
55 regulator-always-on;
56 };
57 };
58
59 usbphy {
60 usbphy2: usbphy@2 {
61 compatible = "usb-nop-xceiv";
62 reg = <2>;
63 vcc-supply = <®_5v0>;
64 clocks = <&clks IMX27_CLK_DUMMY>;
65 clock-names = "main_clk";
66 #phy-cells = <0>;
67 };
68 };
69};
70
71&cspi1 {
72 pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
73 cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
74 <&gpio4 27 GPIO_ACTIVE_LOW>;
75};
76
77&fb {
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_imxfb1>;
80 display = <&display0>;
81 lcd-supply = <®_5v0>;
82 fsl,dmacr = <0x00020010>;
83 fsl,lscr1 = <0x00120300>;
84 fsl,lpccr = <0x00a903ff>;
85 status = "okay";
86};
87
88&i2c1 {
89 clock-frequency = <400000>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_i2c1>;
92 status = "okay";
93
94 camgpio: pca9536@41 {
95 compatible = "nxp,pca9536";
96 reg = <0x41>;
97 gpio-controller;
98 #gpio-cells = <2>;
99 };
100};
101
102&iomuxc {
103 imx27_phycore_rdk {
104 pinctrl_csien: csiengrp {
105 fsl,pins = <
106 MX27_PAD_USB_OC_B__GPIO2_24 0x0
107 >;
108 };
109
110 pinctrl_cspi1cs1: cspi1cs1grp {
111 fsl,pins = <
112 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
113 >;
114 };
115
116 pinctrl_imxfb1: imxfbgrp {
117 fsl,pins = <
118 MX27_PAD_LD0__LD0 0x0
119 MX27_PAD_LD1__LD1 0x0
120 MX27_PAD_LD2__LD2 0x0
121 MX27_PAD_LD3__LD3 0x0
122 MX27_PAD_LD4__LD4 0x0
123 MX27_PAD_LD5__LD5 0x0
124 MX27_PAD_LD6__LD6 0x0
125 MX27_PAD_LD7__LD7 0x0
126 MX27_PAD_LD8__LD8 0x0
127 MX27_PAD_LD9__LD9 0x0
128 MX27_PAD_LD10__LD10 0x0
129 MX27_PAD_LD11__LD11 0x0
130 MX27_PAD_LD12__LD12 0x0
131 MX27_PAD_LD13__LD13 0x0
132 MX27_PAD_LD14__LD14 0x0
133 MX27_PAD_LD15__LD15 0x0
134 MX27_PAD_LD16__LD16 0x0
135 MX27_PAD_LD17__LD17 0x0
136 MX27_PAD_CLS__CLS 0x0
137 MX27_PAD_CONTRAST__CONTRAST 0x0
138 MX27_PAD_LSCLK__LSCLK 0x0
139 MX27_PAD_OE_ACD__OE_ACD 0x0
140 MX27_PAD_PS__PS 0x0
141 MX27_PAD_REV__REV 0x0
142 MX27_PAD_SPL_SPR__SPL_SPR 0x0
143 MX27_PAD_HSYNC__HSYNC 0x0
144 MX27_PAD_VSYNC__VSYNC 0x0
145 >;
146 };
147
148 pinctrl_i2c1: i2c1grp {
149 /* Add pullup to DATA line */
150 fsl,pins = <
151 MX27_PAD_I2C_DATA__I2C_DATA 0x1
152 MX27_PAD_I2C_CLK__I2C_CLK 0x0
153 >;
154 };
155
156 pinctrl_owire1: owire1grp {
157 fsl,pins = <
158 MX27_PAD_RTCK__OWIRE 0x0
159 >;
160 };
161
162 pinctrl_sdhc2: sdhc2grp {
163 fsl,pins = <
164 MX27_PAD_SD2_CLK__SD2_CLK 0x0
165 MX27_PAD_SD2_CMD__SD2_CMD 0x0
166 MX27_PAD_SD2_D0__SD2_D0 0x0
167 MX27_PAD_SD2_D1__SD2_D1 0x0
168 MX27_PAD_SD2_D2__SD2_D2 0x0
169 MX27_PAD_SD2_D3__SD2_D3 0x0
170 MX27_PAD_SSI3_FS__GPIO3_28 0x0 /* WP */
171 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
172 >;
173 };
174
175 pinctrl_uart1: uart1grp {
176 fsl,pins = <
177 MX27_PAD_UART1_TXD__UART1_TXD 0x0
178 MX27_PAD_UART1_RXD__UART1_RXD 0x0
179 MX27_PAD_UART1_CTS__UART1_CTS 0x0
180 MX27_PAD_UART1_RTS__UART1_RTS 0x0
181 >;
182 };
183
184 pinctrl_uart2: uart2grp {
185 fsl,pins = <
186 MX27_PAD_UART2_TXD__UART2_TXD 0x0
187 MX27_PAD_UART2_RXD__UART2_RXD 0x0
188 MX27_PAD_UART2_CTS__UART2_CTS 0x0
189 MX27_PAD_UART2_RTS__UART2_RTS 0x0
190 >;
191 };
192
193 pinctrl_usbh2: usbh2grp {
194 fsl,pins = <
195 MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
196 MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
197 MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
198 MX27_PAD_USBH2_STP__USBH2_STP 0x0
199 MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
200 MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
201 MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
202 MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
203 MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
204 MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
205 MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
206 MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
207 >;
208 };
209
210 pinctrl_weim: weimgrp {
211 fsl,pins = <
212 MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
213 MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */
214 >;
215 };
216 };
217};
218
219&owire {
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_owire1>;
222 status = "okay";
223};
224
225&pmicleds {
226 ledr1: led@3 {
227 reg = <3>;
228 label = "system:red1:user";
229 };
230
231 ledg1: led@4 {
232 reg = <4>;
233 label = "system:green1:user";
234 };
235
236 ledb1: led@5 {
237 reg = <5>;
238 label = "system:blue1:user";
239 };
240
241 ledr2: led@6 {
242 reg = <6>;
243 label = "system:red2:user";
244 };
245
246 ledg2: led@7 {
247 reg = <7>;
248 label = "system:green2:user";
249 };
250
251 ledb2: led@8 {
252 reg = <8>;
253 label = "system:blue2:user";
254 };
255
256 ledr3: led@9 {
257 reg = <9>;
258 label = "system:red3:nand";
259 linux,default-trigger = "nand-disk";
260 };
261
262 ledg3: led@10 {
263 reg = <10>;
264 label = "system:green3:live";
265 linux,default-trigger = "heartbeat";
266 };
267
268 ledb3: led@11 {
269 reg = <11>;
270 label = "system:blue3:cpu";
271 linux,default-trigger = "cpu0";
272 };
273};
274
275&sdhci2 {
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_sdhc2>;
278 bus-width = <4>;
279 cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
280 wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
281 vmmc-supply = <&vmmc1_reg>;
282 status = "okay";
283};
284
285&uart1 {
286 uart-has-rtscts;
287 pinctrl-names = "default";
288 pinctrl-0 = <&pinctrl_uart1>;
289 status = "okay";
290};
291
292&uart2 {
293 uart-has-rtscts;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_uart2>;
296 status = "okay";
297};
298
299&usbh2 {
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_usbh2>;
302 dr_mode = "host";
303 phy_type = "ulpi";
304 vbus-supply = <®_5v0>;
305 fsl,usbphy = <&usbphy2>;
306 disable-over-current;
307 status = "okay";
308};
309
310&weim {
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_weim>;
313
314 can@4,0 {
315 compatible = "nxp,sja1000";
316 reg = <4 0x00000000 0x00000100>;
317 interrupt-parent = <&gpio5>;
318 interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
319 nxp,external-clock-frequency = <16000000>;
320 nxp,tx-output-config = <0x16>;
321 nxp,no-comparator-bypass;
322 fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
323 };
324};