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1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree file for the Linksys WRT1900AC (Mamba).
4 *
5 * Note: this board is shipped with a new generation boot loader that
6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
7 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
8 * used.
9 *
10 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
11 *
12 * Based on armada-xp-axpwifiap.dts:
13 *
14 * Copyright (C) 2013 Marvell
15 *
16 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
17 */
18
19/dts-v1/;
20#include <dt-bindings/gpio/gpio.h>
21#include <dt-bindings/input/input.h>
22#include "armada-xp-mv78230.dtsi"
23
24/ {
25 model = "Linksys WRT1900AC";
26 compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
27 "marvell,armadaxp", "marvell,armada-370-xp";
28
29 chosen {
30 bootargs = "console=ttyS0,115200";
31 stdout-path = &uart0;
32 };
33
34 memory@0 {
35 device_type = "memory";
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
37 };
38
39 soc {
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
45
46 internal-regs {
47
48 rtc@10300 {
49 /* No crystal connected to the internal RTC */
50 status = "disabled";
51 };
52
53 /* J10: VCC, NC, RX, NC, TX, GND */
54 serial@12000 {
55 status = "okay";
56 };
57
58 sata@a0000 {
59 nr-ports = <1>;
60 status = "okay";
61 };
62
63 ethernet@70000 {
64 pinctrl-0 = <&ge0_rgmii_pins>;
65 pinctrl-names = "default";
66 status = "okay";
67 phy-mode = "rgmii-id";
68 buffer-manager = <&bm>;
69 bm,pool-long = <0>;
70 bm,pool-short = <1>;
71 fixed-link {
72 speed = <1000>;
73 full-duplex;
74 };
75 };
76
77 ethernet@74000 {
78 pinctrl-0 = <&ge1_rgmii_pins>;
79 pinctrl-names = "default";
80 status = "okay";
81 phy-mode = "rgmii-id";
82 buffer-manager = <&bm>;
83 bm,pool-long = <2>;
84 bm,pool-short = <3>;
85 fixed-link {
86 speed = <1000>;
87 full-duplex;
88 };
89 };
90
91 /* USB part of the eSATA/USB 2.0 port */
92 usb@50000 {
93 status = "okay";
94 };
95
96 i2c@11000 {
97 status = "okay";
98 clock-frequency = <100000>;
99
100 tmp421@4c {
101 compatible = "ti,tmp421";
102 reg = <0x4c>;
103 };
104
105 tlc59116@68 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 #gpio-cells = <2>;
109 compatible = "ti,tlc59116";
110 reg = <0x68>;
111
112 wan_amber@0 {
113 label = "mamba:amber:wan";
114 reg = <0x0>;
115 };
116
117 wan_white@1 {
118 label = "mamba:white:wan";
119 reg = <0x1>;
120 };
121
122 wlan_2g@2 {
123 label = "mamba:white:wlan_2g";
124 reg = <0x2>;
125 };
126
127 wlan_5g@3 {
128 label = "mamba:white:wlan_5g";
129 reg = <0x3>;
130 };
131
132 esata@4 {
133 label = "mamba:white:esata";
134 reg = <0x4>;
135 linux,default-trigger = "disk-activity";
136 };
137
138 usb2@5 {
139 label = "mamba:white:usb2";
140 reg = <0x5>;
141 };
142
143 usb3_1@6 {
144 label = "mamba:white:usb3_1";
145 reg = <0x6>;
146 };
147
148 usb3_2@7 {
149 label = "mamba:white:usb3_2";
150 reg = <0x7>;
151 };
152
153 wps_white@8 {
154 label = "mamba:white:wps";
155 reg = <0x8>;
156 };
157
158 wps_amber@9 {
159 label = "mamba:amber:wps";
160 reg = <0x9>;
161 };
162 };
163 };
164
165 bm@c8000 {
166 status = "okay";
167 };
168
169 nand@d0000 {
170 status = "okay";
171 num-cs = <1>;
172 marvell,nand-keep-config;
173 marvell,nand-enable-arbiter;
174 nand-on-flash-bbt;
175 nand-ecc-strength = <4>;
176 nand-ecc-step-size = <512>;
177
178 partition@0 {
179 label = "u-boot";
180 reg = <0x0000000 0x100000>; /* 1MB */
181 read-only;
182 };
183
184 partition@100000 {
185 label = "u_env";
186 reg = <0x100000 0x40000>; /* 256KB */
187 };
188
189 partition@140000 {
190 label = "s_env";
191 reg = <0x140000 0x40000>; /* 256KB */
192 };
193
194 partition@900000 {
195 label = "devinfo";
196 reg = <0x900000 0x100000>; /* 1MB */
197 read-only;
198 };
199
200 /* kernel1 overlaps with rootfs1 by design */
201 partition@a00000 {
202 label = "kernel1";
203 reg = <0xa00000 0x2800000>; /* 40MB */
204 };
205
206 partition@d00000 {
207 label = "rootfs1";
208 reg = <0xd00000 0x2500000>; /* 37MB */
209 };
210
211 /* kernel2 overlaps with rootfs2 by design */
212 partition@3200000 {
213 label = "kernel2";
214 reg = <0x3200000 0x2800000>; /* 40MB */
215 };
216
217 partition@3500000 {
218 label = "rootfs2";
219 reg = <0x3500000 0x2500000>; /* 37MB */
220 };
221
222 /*
223 * 38MB, last MB is for the BBT, not writable
224 */
225 partition@5a00000 {
226 label = "syscfg";
227 reg = <0x5a00000 0x2600000>;
228 };
229
230 /*
231 * Unused area between "s_env" and "devinfo".
232 * Moved here because otherwise the renumbered
233 * partitions would break the bootloader
234 * supplied bootargs
235 */
236 partition@180000 {
237 label = "unused_area";
238 reg = <0x180000 0x780000>; /* 7.5MB */
239 };
240 };
241 };
242
243 bm-bppi {
244 status = "okay";
245 };
246 };
247
248 gpio_keys {
249 compatible = "gpio-keys";
250 #address-cells = <1>;
251 #size-cells = <0>;
252 pinctrl-0 = <&keys_pin>;
253 pinctrl-names = "default";
254
255 wps {
256 label = "WPS";
257 linux,code = <KEY_WPS_BUTTON>;
258 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
259 };
260
261 reset {
262 label = "Factory Reset Button";
263 linux,code = <KEY_RESTART>;
264 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
265 };
266 };
267
268 gpio-leds {
269 compatible = "gpio-leds";
270 pinctrl-0 = <&power_led_pin>;
271 pinctrl-names = "default";
272
273 power {
274 label = "mamba:white:power";
275 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
276 default-state = "on";
277 };
278 };
279
280 pwm_fan {
281 /* SUNON HA4010V4-0000-C99 */
282
283 compatible = "pwm-fan";
284 pwms = <&gpio0 24 4000>;
285 };
286
287 dsa {
288 status = "disabled";
289
290 compatible = "marvell,dsa";
291 #address-cells = <2>;
292 #size-cells = <0>;
293
294 dsa,ethernet = <ð0>;
295 dsa,mii-bus = <&mdio>;
296
297 switch@0 {
298 #address-cells = <1>;
299 #size-cells = <0>;
300 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
301
302 port@0 {
303 reg = <0>;
304 label = "lan4";
305 };
306
307 port@1 {
308 reg = <1>;
309 label = "lan3";
310 };
311
312 port@2 {
313 reg = <2>;
314 label = "lan2";
315 };
316
317 port@3 {
318 reg = <3>;
319 label = "lan1";
320 };
321
322 port@4 {
323 reg = <4>;
324 label = "internet";
325 };
326
327 port@5 {
328 reg = <5>;
329 label = "cpu";
330 };
331 };
332 };
333};
334
335&pciec {
336 status = "okay";
337
338 /* Etron EJ168 USB 3.0 controller */
339 pcie@1,0 {
340 /* Port 0, Lane 0 */
341 status = "okay";
342 };
343
344 /* First mini-PCIe port */
345 pcie@2,0 {
346 /* Port 0, Lane 1 */
347 status = "okay";
348 };
349
350 /* Second mini-PCIe port */
351 pcie@3,0 {
352 /* Port 0, Lane 3 */
353 status = "okay";
354 };
355};
356
357&pinctrl {
358
359 keys_pin: keys-pin {
360 marvell,pins = "mpp32", "mpp33";
361 marvell,function = "gpio";
362 };
363
364 power_led_pin: power-led-pin {
365 marvell,pins = "mpp40";
366 marvell,function = "gpio";
367 };
368
369 gpio_fan_pin: gpio-fan-pin {
370 marvell,pins = "mpp24";
371 marvell,function = "gpio";
372 };
373};
374
375&spi0 {
376 status = "okay";
377
378 spi-flash@0 {
379 #address-cells = <1>;
380 #size-cells = <1>;
381 compatible = "everspin,mr25h256";
382 reg = <0>; /* Chip select 0 */
383 spi-max-frequency = <40000000>;
384 };
385};
386
387&mdio {
388 status = "okay";
389
390 switch@0 {
391 compatible = "marvell,mv88e6085";
392 #address-cells = <1>;
393 #size-cells = <0>;
394 reg = <0>;
395
396 ports {
397 #address-cells = <1>;
398 #size-cells = <0>;
399
400 port@0 {
401 reg = <0>;
402 label = "lan4";
403 };
404
405 port@1 {
406 reg = <1>;
407 label = "lan3";
408 };
409
410 port@2 {
411 reg = <2>;
412 label = "lan2";
413 };
414
415 port@3 {
416 reg = <3>;
417 label = "lan1";
418 };
419
420 port@4 {
421 reg = <4>;
422 label = "internet";
423 };
424
425 port@5 {
426 reg = <5>;
427 label = "cpu";
428 ethernet = <ð0>;
429 fixed-link {
430 speed = <1000>;
431 full-duplex;
432 };
433 };
434 };
435 };
436};