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1/* bnx2x_mfw_req.h: Qlogic Everest network driver.
2 *
3 * Copyright (c) 2012-2013 Broadcom Corporation
4 * Copyright (c) 2014 QLogic Corporation
5 * All rights reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation.
10 */
11
12#ifndef BNX2X_MFW_REQ_H
13#define BNX2X_MFW_REQ_H
14
15#define PORT_0 0
16#define PORT_1 1
17#define PORT_MAX 2
18#define NVM_PATH_MAX 2
19
20/* FCoE capabilities required from the driver */
21struct fcoe_capabilities {
22 u32 capability1;
23 /* Maximum number of I/Os per connection */
24 #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff
25 #define FCOE_IOS_PER_CONNECTION_SHIFT 0
26 /* Maximum number of Logins per port */
27 #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000
28 #define FCOE_LOGINS_PER_PORT_SHIFT 16
29
30 u32 capability2;
31 /* Maximum number of exchanges */
32 #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff
33 #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0
34 /* Maximum NPIV WWN per port */
35 #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000
36 #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16
37
38 u32 capability3;
39 /* Maximum number of targets supported */
40 #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff
41 #define FCOE_TARGETS_SUPPORTED_SHIFT 0
42 /* Maximum number of outstanding commands across all connections */
43 #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000
44 #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16
45
46 u32 capability4;
47 #define FCOE_CAPABILITY4_STATEFUL 0x00000001
48 #define FCOE_CAPABILITY4_STATELESS 0x00000002
49 #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004
50};
51
52struct glob_ncsi_oem_data {
53 u32 driver_version;
54 u32 unused[3];
55 struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX];
56};
57
58/* current drv_info version */
59#define DRV_INFO_CUR_VER 2
60
61/* drv_info op codes supported */
62enum drv_info_opcode {
63 ETH_STATS_OPCODE,
64 FCOE_STATS_OPCODE,
65 ISCSI_STATS_OPCODE
66};
67
68#define ETH_STAT_INFO_VERSION_LEN 12
69/* Per PCI Function Ethernet Statistics required from the driver */
70struct eth_stats_info {
71 /* Function's Driver Version. padded to 12 */
72 u8 version[ETH_STAT_INFO_VERSION_LEN];
73 /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */
74 u8 mac_local[8];
75 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
76 u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
77 u32 mtu_size; /* MTU Size. Note : Negotiated MTU */
78 u32 feature_flags; /* Feature_Flags. */
79#define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01
80#define FEATURE_ETH_LSO_MASK 0x02
81#define FEATURE_ETH_BOOTMODE_MASK 0x1C
82#define FEATURE_ETH_BOOTMODE_SHIFT 2
83#define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2)
84#define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2)
85#define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2)
86#define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2)
87#define FEATURE_ETH_TOE_MASK 0x20
88 u32 lso_max_size; /* LSO MaxOffloadSize. */
89 u32 lso_min_seg_cnt; /* LSO MinSegmentCount. */
90 /* Num Offloaded Connections TCP_IPv4. */
91 u32 ipv4_ofld_cnt;
92 /* Num Offloaded Connections TCP_IPv6. */
93 u32 ipv6_ofld_cnt;
94 u32 promiscuous_mode; /* Promiscuous Mode. non-zero true */
95 u32 txq_size; /* TX Descriptors Queue Size */
96 u32 rxq_size; /* RX Descriptors Queue Size */
97 /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */
98 u32 txq_avg_depth;
99 /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */
100 u32 rxq_avg_depth;
101 /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/
102 u32 iov_offload;
103 /* Number of NetQueue/VMQ Config'd. */
104 u32 netq_cnt;
105 u32 vf_cnt; /* Num VF assigned to this PF. */
106};
107
108/* Per PCI Function FCOE Statistics required from the driver */
109struct fcoe_stats_info {
110 u8 version[12]; /* Function's Driver Version. */
111 u8 mac_local[8]; /* Locally Admin Addr. */
112 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
113 u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
114 /* QoS Priority (per 802.1p). 0-7255 */
115 u32 qos_priority;
116 u32 txq_size; /* FCoE TX Descriptors Queue Size. */
117 u32 rxq_size; /* FCoE RX Descriptors Queue Size. */
118 /* FCoE TX Descriptor Queue Avg Depth. */
119 u32 txq_avg_depth;
120 /* FCoE RX Descriptors Queue Avg Depth. */
121 u32 rxq_avg_depth;
122 u32 rx_frames_lo; /* FCoE RX Frames received. */
123 u32 rx_frames_hi; /* FCoE RX Frames received. */
124 u32 rx_bytes_lo; /* FCoE RX Bytes received. */
125 u32 rx_bytes_hi; /* FCoE RX Bytes received. */
126 u32 tx_frames_lo; /* FCoE TX Frames sent. */
127 u32 tx_frames_hi; /* FCoE TX Frames sent. */
128 u32 tx_bytes_lo; /* FCoE TX Bytes sent. */
129 u32 tx_bytes_hi; /* FCoE TX Bytes sent. */
130};
131
132/* Per PCI Function iSCSI Statistics required from the driver*/
133struct iscsi_stats_info {
134 u8 version[12]; /* Function's Driver Version. */
135 u8 mac_local[8]; /* Locally Admin iSCSI MAC Addr. */
136 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
137 /* QoS Priority (per 802.1p). 0-7255 */
138 u32 qos_priority;
139 u8 initiator_name[64]; /* iSCSI Boot Initiator Node name. */
140 u8 ww_port_name[64]; /* iSCSI World wide port name */
141 u8 boot_target_name[64];/* iSCSI Boot Target Name. */
142 u8 boot_target_ip[16]; /* iSCSI Boot Target IP. */
143 u32 boot_target_portal; /* iSCSI Boot Target Portal. */
144 u8 boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */
145 u32 max_frame_size; /* Max Frame Size. bytes */
146 u32 txq_size; /* PDU TX Descriptors Queue Size. */
147 u32 rxq_size; /* PDU RX Descriptors Queue Size. */
148 u32 txq_avg_depth; /* PDU TX Descriptor Queue Avg Depth. */
149 u32 rxq_avg_depth; /* PDU RX Descriptors Queue Avg Depth. */
150 u32 rx_pdus_lo; /* iSCSI PDUs received. */
151 u32 rx_pdus_hi; /* iSCSI PDUs received. */
152 u32 rx_bytes_lo; /* iSCSI RX Bytes received. */
153 u32 rx_bytes_hi; /* iSCSI RX Bytes received. */
154 u32 tx_pdus_lo; /* iSCSI PDUs sent. */
155 u32 tx_pdus_hi; /* iSCSI PDUs sent. */
156 u32 tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */
157 u32 tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */
158 u32 pcp_prior_map_tbl; /* C-PCP to S-PCP Priority MapTable.
159 * 9 nibbles, the position of each nibble
160 * represents the C-PCP value, the value
161 * of the nibble = S-PCP value.
162 */
163};
164
165union drv_info_to_mcp {
166 struct eth_stats_info ether_stat;
167 struct fcoe_stats_info fcoe_stat;
168 struct iscsi_stats_info iscsi_stat;
169};
170#endif /* BNX2X_MFW_REQ_H */