1#ifndef __ASM_ARM_INSN_H
 2#define __ASM_ARM_INSN_H
 3
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 4static inline unsigned long
 5arm_gen_nop(void)
 6{
 7#ifdef CONFIG_THUMB2_KERNEL
 8	return 0xf3af8000; /* nop.w */
 9#else
10	return 0xe1a00000; /* mov r0, r0 */
11#endif
12}
13
14unsigned long
15__arm_gen_branch(unsigned long pc, unsigned long addr, bool link);
16
17static inline unsigned long
18arm_gen_branch(unsigned long pc, unsigned long addr)
19{
20	return __arm_gen_branch(pc, addr, false);
21}
22
23static inline unsigned long
24arm_gen_branch_link(unsigned long pc, unsigned long addr)
25{
26	return __arm_gen_branch(pc, addr, true);
27}
28
29#endif

 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef __ASM_ARM_INSN_H
 3#define __ASM_ARM_INSN_H
 4
 5#include <linux/types.h>
 6
 7/*
 8 * Avoid a literal load by emitting a sequence of ADD/LDR instructions with the
 9 * appropriate relocations. The combined sequence has a range of -/+ 256 MiB,
10 * which should be sufficient for the core kernel as well as modules loaded
11 * into the module region. (Not supported by LLD before release 14)
12 */
13#define LOAD_SYM_ARMV6(reg, sym)					\
14	"	.globl	" #sym "				\n\t"	\
15	"	.reloc	10f, R_ARM_ALU_PC_G0_NC, " #sym "	\n\t"	\
16	"	.reloc	11f, R_ARM_ALU_PC_G1_NC, " #sym "	\n\t"	\
17	"	.reloc	12f, R_ARM_LDR_PC_G2, " #sym "		\n\t"	\
18	"10:	sub	" #reg ", pc, #8			\n\t"	\
19	"11:	sub	" #reg ", " #reg ", #4			\n\t"	\
20	"12:	ldr	" #reg ", [" #reg ", #0]		\n\t"
21
22static inline unsigned long
23arm_gen_nop(void)
24{
25#ifdef CONFIG_THUMB2_KERNEL
26	return 0xf3af8000; /* nop.w */
27#else
28	return 0xe1a00000; /* mov r0, r0 */
29#endif
30}
31
32unsigned long
33__arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn);
34
35static inline unsigned long
36arm_gen_branch(unsigned long pc, unsigned long addr)
37{
38	return __arm_gen_branch(pc, addr, false, true);
39}
40
41static inline unsigned long
42arm_gen_branch_link(unsigned long pc, unsigned long addr, bool warn)
43{
44	return __arm_gen_branch(pc, addr, true, warn);
45}
46
47#endif