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1#ifndef _ASM_X86_CPUFEATURE_H
2#define _ASM_X86_CPUFEATURE_H
3
4#include <asm/processor.h>
5
6#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
7
8#include <asm/asm.h>
9#include <linux/bitops.h>
10
11enum cpuid_leafs
12{
13 CPUID_1_EDX = 0,
14 CPUID_8000_0001_EDX,
15 CPUID_8086_0001_EDX,
16 CPUID_LNX_1,
17 CPUID_1_ECX,
18 CPUID_C000_0001_EDX,
19 CPUID_8000_0001_ECX,
20 CPUID_LNX_2,
21 CPUID_LNX_3,
22 CPUID_7_0_EBX,
23 CPUID_D_1_EAX,
24 CPUID_F_0_EDX,
25 CPUID_F_1_EDX,
26 CPUID_8000_0008_EBX,
27 CPUID_6_EAX,
28 CPUID_8000_000A_EDX,
29 CPUID_7_ECX,
30 CPUID_8000_0007_EBX,
31};
32
33#ifdef CONFIG_X86_FEATURE_NAMES
34extern const char * const x86_cap_flags[NCAPINTS*32];
35extern const char * const x86_power_flags[32];
36#define X86_CAP_FMT "%s"
37#define x86_cap_flag(flag) x86_cap_flags[flag]
38#else
39#define X86_CAP_FMT "%d:%d"
40#define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
41#endif
42
43/*
44 * In order to save room, we index into this array by doing
45 * X86_BUG_<name> - NCAPINTS*32.
46 */
47extern const char * const x86_bug_flags[NBUGINTS*32];
48
49#define test_cpu_cap(c, bit) \
50 test_bit(bit, (unsigned long *)((c)->x86_capability))
51
52/*
53 * There are 32 bits/features in each mask word. The high bits
54 * (selected with (bit>>5) give us the word number and the low 5
55 * bits give us the bit/feature number inside the word.
56 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
57 * see if it is set in the mask word.
58 */
59#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
60 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
61
62#define REQUIRED_MASK_BIT_SET(feature_bit) \
63 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
64 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
65 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
66 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
67 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
68 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
69 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
70 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
71 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
72 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
73 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
81 REQUIRED_MASK_CHECK || \
82 BUILD_BUG_ON_ZERO(NCAPINTS != 18))
83
84#define DISABLED_MASK_BIT_SET(feature_bit) \
85 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
86 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
87 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
88 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
94 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
95 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
96 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
97 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
98 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
103 DISABLED_MASK_CHECK || \
104 BUILD_BUG_ON_ZERO(NCAPINTS != 18))
105
106#define cpu_has(c, bit) \
107 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
108 test_cpu_cap(c, bit))
109
110#define this_cpu_has(bit) \
111 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
112 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
113
114/*
115 * This macro is for detection of features which need kernel
116 * infrastructure to be used. It may *not* directly test the CPU
117 * itself. Use the cpu_has() family if you want true runtime
118 * testing of CPU features, like in hypervisor code where you are
119 * supporting a possible guest feature where host support for it
120 * is not relevant.
121 */
122#define cpu_feature_enabled(bit) \
123 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
124
125#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
126
127#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
128#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
129#define setup_clear_cpu_cap(bit) do { \
130 clear_cpu_cap(&boot_cpu_data, bit); \
131 set_bit(bit, (unsigned long *)cpu_caps_cleared); \
132} while (0)
133#define setup_force_cpu_cap(bit) do { \
134 set_cpu_cap(&boot_cpu_data, bit); \
135 set_bit(bit, (unsigned long *)cpu_caps_set); \
136} while (0)
137
138#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
139/*
140 * Static testing of CPU features. Used the same as boot_cpu_has().
141 * These will statically patch the target code for additional
142 * performance.
143 */
144static __always_inline __pure bool _static_cpu_has(u16 bit)
145{
146 asm_volatile_goto("1: jmp 6f\n"
147 "2:\n"
148 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
149 "((5f-4f) - (2b-1b)),0x90\n"
150 "3:\n"
151 ".section .altinstructions,\"a\"\n"
152 " .long 1b - .\n" /* src offset */
153 " .long 4f - .\n" /* repl offset */
154 " .word %P1\n" /* always replace */
155 " .byte 3b - 1b\n" /* src len */
156 " .byte 5f - 4f\n" /* repl len */
157 " .byte 3b - 2b\n" /* pad len */
158 ".previous\n"
159 ".section .altinstr_replacement,\"ax\"\n"
160 "4: jmp %l[t_no]\n"
161 "5:\n"
162 ".previous\n"
163 ".section .altinstructions,\"a\"\n"
164 " .long 1b - .\n" /* src offset */
165 " .long 0\n" /* no replacement */
166 " .word %P0\n" /* feature bit */
167 " .byte 3b - 1b\n" /* src len */
168 " .byte 0\n" /* repl len */
169 " .byte 0\n" /* pad len */
170 ".previous\n"
171 ".section .altinstr_aux,\"ax\"\n"
172 "6:\n"
173 " testb %[bitnum],%[cap_byte]\n"
174 " jnz %l[t_yes]\n"
175 " jmp %l[t_no]\n"
176 ".previous\n"
177 : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
178 [bitnum] "i" (1 << (bit & 7)),
179 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
180 : : t_yes, t_no);
181 t_yes:
182 return true;
183 t_no:
184 return false;
185}
186
187#define static_cpu_has(bit) \
188( \
189 __builtin_constant_p(boot_cpu_has(bit)) ? \
190 boot_cpu_has(bit) : \
191 _static_cpu_has(bit) \
192)
193#else
194/*
195 * Fall back to dynamic for gcc versions which don't support asm goto. Should be
196 * a minority now anyway.
197 */
198#define static_cpu_has(bit) boot_cpu_has(bit)
199#endif
200
201#define cpu_has_bug(c, bit) cpu_has(c, (bit))
202#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
203#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
204
205#define static_cpu_has_bug(bit) static_cpu_has((bit))
206#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
207#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
208
209#define MAX_CPU_FEATURES (NCAPINTS * 32)
210#define cpu_have_feature boot_cpu_has
211
212#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
213#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
214 boot_cpu_data.x86_model
215
216#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
217#endif /* _ASM_X86_CPUFEATURE_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_CPUFEATURE_H
3#define _ASM_X86_CPUFEATURE_H
4
5#include <asm/processor.h>
6
7#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
8
9#include <asm/asm.h>
10#include <linux/bitops.h>
11#include <asm/alternative.h>
12
13enum cpuid_leafs
14{
15 CPUID_1_EDX = 0,
16 CPUID_8000_0001_EDX,
17 CPUID_8086_0001_EDX,
18 CPUID_LNX_1,
19 CPUID_1_ECX,
20 CPUID_C000_0001_EDX,
21 CPUID_8000_0001_ECX,
22 CPUID_LNX_2,
23 CPUID_LNX_3,
24 CPUID_7_0_EBX,
25 CPUID_D_1_EAX,
26 CPUID_LNX_4,
27 CPUID_7_1_EAX,
28 CPUID_8000_0008_EBX,
29 CPUID_6_EAX,
30 CPUID_8000_000A_EDX,
31 CPUID_7_ECX,
32 CPUID_8000_0007_EBX,
33 CPUID_7_EDX,
34 CPUID_8000_001F_EAX,
35};
36
37#define X86_CAP_FMT_NUM "%d:%d"
38#define x86_cap_flag_num(flag) ((flag) >> 5), ((flag) & 31)
39
40#ifdef CONFIG_X86_FEATURE_NAMES
41extern const char * const x86_cap_flags[NCAPINTS*32];
42extern const char * const x86_power_flags[32];
43#define X86_CAP_FMT "%s"
44#define x86_cap_flag(flag) x86_cap_flags[flag]
45#else
46#define X86_CAP_FMT X86_CAP_FMT_NUM
47#define x86_cap_flag x86_cap_flag_num
48#endif
49
50/*
51 * In order to save room, we index into this array by doing
52 * X86_BUG_<name> - NCAPINTS*32.
53 */
54extern const char * const x86_bug_flags[NBUGINTS*32];
55
56#define test_cpu_cap(c, bit) \
57 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
58
59/*
60 * There are 32 bits/features in each mask word. The high bits
61 * (selected with (bit>>5) give us the word number and the low 5
62 * bits give us the bit/feature number inside the word.
63 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
64 * see if it is set in the mask word.
65 */
66#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
67 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
68
69/*
70 * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the
71 * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all
72 * header macros which use NCAPINTS need to be changed. The duplicated macro
73 * use causes the compiler to issue errors for all headers so that all usage
74 * sites can be corrected.
75 */
76#define REQUIRED_MASK_BIT_SET(feature_bit) \
77 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
84 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
85 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
86 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
87 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
88 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
94 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
95 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
96 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \
97 REQUIRED_MASK_CHECK || \
98 BUILD_BUG_ON_ZERO(NCAPINTS != 20))
99
100#define DISABLED_MASK_BIT_SET(feature_bit) \
101 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
107 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
108 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
109 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
110 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
111 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
112 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
113 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
114 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
115 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
116 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
117 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
118 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
119 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
120 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \
121 DISABLED_MASK_CHECK || \
122 BUILD_BUG_ON_ZERO(NCAPINTS != 20))
123
124#define cpu_has(c, bit) \
125 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
126 test_cpu_cap(c, bit))
127
128#define this_cpu_has(bit) \
129 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
130 x86_this_cpu_test_bit(bit, \
131 (unsigned long __percpu *)&cpu_info.x86_capability))
132
133/*
134 * This macro is for detection of features which need kernel
135 * infrastructure to be used. It may *not* directly test the CPU
136 * itself. Use the cpu_has() family if you want true runtime
137 * testing of CPU features, like in hypervisor code where you are
138 * supporting a possible guest feature where host support for it
139 * is not relevant.
140 */
141#define cpu_feature_enabled(bit) \
142 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
143
144#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
145
146#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
147
148extern void setup_clear_cpu_cap(unsigned int bit);
149extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
150
151#define setup_force_cpu_cap(bit) do { \
152 set_cpu_cap(&boot_cpu_data, bit); \
153 set_bit(bit, (unsigned long *)cpu_caps_set); \
154} while (0)
155
156#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
157
158/*
159 * Static testing of CPU features. Used the same as boot_cpu_has(). It
160 * statically patches the target code for additional performance. Use
161 * static_cpu_has() only in fast paths, where every cycle counts. Which
162 * means that the boot_cpu_has() variant is already fast enough for the
163 * majority of cases and you should stick to using it as it is generally
164 * only two instructions: a RIP-relative MOV and a TEST.
165 *
166 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know
167 * that this is only used on a fallback path and will sometimes cause
168 * it to manifest the address of boot_cpu_data in a register, fouling
169 * the mainline (post-initialization) code.
170 */
171static __always_inline bool _static_cpu_has(u16 bit)
172{
173 asm_volatile_goto(
174 ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]")
175 ".pushsection .altinstr_aux,\"ax\"\n"
176 "6:\n"
177 " testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n"
178 " jnz %l[t_yes]\n"
179 " jmp %l[t_no]\n"
180 ".popsection\n"
181 : : [feature] "i" (bit),
182 [bitnum] "i" (1 << (bit & 7)),
183 [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])
184 : : t_yes, t_no);
185t_yes:
186 return true;
187t_no:
188 return false;
189}
190
191#define static_cpu_has(bit) \
192( \
193 __builtin_constant_p(boot_cpu_has(bit)) ? \
194 boot_cpu_has(bit) : \
195 _static_cpu_has(bit) \
196)
197
198#define cpu_has_bug(c, bit) cpu_has(c, (bit))
199#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
200#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
201
202#define static_cpu_has_bug(bit) static_cpu_has((bit))
203#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
204#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
205
206#define MAX_CPU_FEATURES (NCAPINTS * 32)
207#define cpu_have_feature boot_cpu_has
208
209#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
210#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
211 boot_cpu_data.x86_model
212
213#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
214#endif /* _ASM_X86_CPUFEATURE_H */