1/*
 2 * Copyright (c) 2014 MediaTek Inc.
 3 * Author: James Liao <jamesjj.liao@mediatek.com>
 4 *
 5 * This program is free software; you can redistribute it and/or modify
 6 * it under the terms of the GNU General Public License version 2 as
 7 * published by the Free Software Foundation.
 8 *
 9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __DRV_CLK_GATE_H
16#define __DRV_CLK_GATE_H
17
18#include <linux/regmap.h>
19#include <linux/clk-provider.h>
20
21struct clk;
22
23struct mtk_clk_gate {
24	struct clk_hw	hw;
25	struct regmap	*regmap;
26	int		set_ofs;
27	int		clr_ofs;
28	int		sta_ofs;
29	u8		bit;
30};
31
32static inline struct mtk_clk_gate *to_mtk_clk_gate(struct clk_hw *hw)
33{
34	return container_of(hw, struct mtk_clk_gate, hw);
35}
36
37extern const struct clk_ops mtk_clk_gate_ops_setclr;
38extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
39extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
40extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
41
42struct clk *mtk_clk_register_gate(
43		const char *name,
44		const char *parent_name,
45		struct regmap *regmap,
46		int set_ofs,
47		int clr_ofs,
48		int sta_ofs,
49		u8 bit,
50		const struct clk_ops *ops);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
51
52#endif /* __DRV_CLK_GATE_H */

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (c) 2014 MediaTek Inc.
 4 * Author: James Liao <jamesjj.liao@mediatek.com>
 
 
 
 
 
 
 
 
 
 5 */
 6
 7#ifndef __DRV_CLK_GATE_H
 8#define __DRV_CLK_GATE_H
 9
10#include <linux/types.h>
 
11
12struct clk;
13struct clk_hw_onecell_data;
14struct clk_ops;
15struct device;
16struct device_node;
 
 
 
 
 
 
 
 
 
 
17
18extern const struct clk_ops mtk_clk_gate_ops_setclr;
19extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
20extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
21extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
22
23struct mtk_gate_regs {
24	u32 sta_ofs;
25	u32 clr_ofs;
26	u32 set_ofs;
27};
28
29struct mtk_gate {
30	int id;
31	const char *name;
32	const char *parent_name;
33	const struct mtk_gate_regs *regs;
34	int shift;
35	const struct clk_ops *ops;
36	unsigned long flags;
37};
38
39#define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift,	\
40			_ops, _flags) {				\
41		.id = _id,					\
42		.name = _name,					\
43		.parent_name = _parent,				\
44		.regs = _regs,					\
45		.shift = _shift,				\
46		.ops = _ops,					\
47		.flags = _flags,				\
48	}
49
50#define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops)		\
51	GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0)
52
53int mtk_clk_register_gates(struct device_node *node,
54			   const struct mtk_gate *clks, int num,
55			   struct clk_hw_onecell_data *clk_data);
56
57int mtk_clk_register_gates_with_dev(struct device_node *node,
58				    const struct mtk_gate *clks, int num,
59				    struct clk_hw_onecell_data *clk_data,
60				    struct device *dev);
61
62void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num,
63			      struct clk_hw_onecell_data *clk_data);
64
65#endif /* __DRV_CLK_GATE_H */