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1/* tmp401.c
2 *
3 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
4 * Preliminary tmp411 support by:
5 * Gabriel Konat, Sander Leget, Wouter Willems
6 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
7 *
8 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
9 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26/*
27 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
28 *
29 * Note this IC is in some aspect similar to the LM90, but it has quite a
30 * few differences too, for example the local temp has a higher resolution
31 * and thus has 16 bits registers for its value and limit instead of 8 bits.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/bitops.h>
37#include <linux/slab.h>
38#include <linux/jiffies.h>
39#include <linux/i2c.h>
40#include <linux/hwmon.h>
41#include <linux/hwmon-sysfs.h>
42#include <linux/err.h>
43#include <linux/mutex.h>
44#include <linux/sysfs.h>
45
46/* Addresses to scan */
47static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
48 0x4e, 0x4f, I2C_CLIENT_END };
49
50enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
51
52/*
53 * The TMP401 registers, note some registers have different addresses for
54 * reading and writing
55 */
56#define TMP401_STATUS 0x02
57#define TMP401_CONFIG_READ 0x03
58#define TMP401_CONFIG_WRITE 0x09
59#define TMP401_CONVERSION_RATE_READ 0x04
60#define TMP401_CONVERSION_RATE_WRITE 0x0A
61#define TMP401_TEMP_CRIT_HYST 0x21
62#define TMP401_MANUFACTURER_ID_REG 0xFE
63#define TMP401_DEVICE_ID_REG 0xFF
64
65static const u8 TMP401_TEMP_MSB_READ[7][2] = {
66 { 0x00, 0x01 }, /* temp */
67 { 0x06, 0x08 }, /* low limit */
68 { 0x05, 0x07 }, /* high limit */
69 { 0x20, 0x19 }, /* therm (crit) limit */
70 { 0x30, 0x34 }, /* lowest */
71 { 0x32, 0x36 }, /* highest */
72 { 0, 0x11 }, /* offset */
73};
74
75static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
76 { 0, 0 }, /* temp (unused) */
77 { 0x0C, 0x0E }, /* low limit */
78 { 0x0B, 0x0D }, /* high limit */
79 { 0x20, 0x19 }, /* therm (crit) limit */
80 { 0x30, 0x34 }, /* lowest */
81 { 0x32, 0x36 }, /* highest */
82 { 0, 0x11 }, /* offset */
83};
84
85static const u8 TMP401_TEMP_LSB[7][2] = {
86 { 0x15, 0x10 }, /* temp */
87 { 0x17, 0x14 }, /* low limit */
88 { 0x16, 0x13 }, /* high limit */
89 { 0, 0 }, /* therm (crit) limit (unused) */
90 { 0x31, 0x35 }, /* lowest */
91 { 0x33, 0x37 }, /* highest */
92 { 0, 0x12 }, /* offset */
93};
94
95static const u8 TMP432_TEMP_MSB_READ[4][3] = {
96 { 0x00, 0x01, 0x23 }, /* temp */
97 { 0x06, 0x08, 0x16 }, /* low limit */
98 { 0x05, 0x07, 0x15 }, /* high limit */
99 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
100};
101
102static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
103 { 0, 0, 0 }, /* temp - unused */
104 { 0x0C, 0x0E, 0x16 }, /* low limit */
105 { 0x0B, 0x0D, 0x15 }, /* high limit */
106 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
107};
108
109static const u8 TMP432_TEMP_LSB[3][3] = {
110 { 0x29, 0x10, 0x24 }, /* temp */
111 { 0x3E, 0x14, 0x18 }, /* low limit */
112 { 0x3D, 0x13, 0x17 }, /* high limit */
113};
114
115/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
116static const u8 TMP432_STATUS_REG[] = {
117 0x1b, 0x36, 0x35, 0x37 };
118
119/* Flags */
120#define TMP401_CONFIG_RANGE BIT(2)
121#define TMP401_CONFIG_SHUTDOWN BIT(6)
122#define TMP401_STATUS_LOCAL_CRIT BIT(0)
123#define TMP401_STATUS_REMOTE_CRIT BIT(1)
124#define TMP401_STATUS_REMOTE_OPEN BIT(2)
125#define TMP401_STATUS_REMOTE_LOW BIT(3)
126#define TMP401_STATUS_REMOTE_HIGH BIT(4)
127#define TMP401_STATUS_LOCAL_LOW BIT(5)
128#define TMP401_STATUS_LOCAL_HIGH BIT(6)
129
130/* On TMP432, each status has its own register */
131#define TMP432_STATUS_LOCAL BIT(0)
132#define TMP432_STATUS_REMOTE1 BIT(1)
133#define TMP432_STATUS_REMOTE2 BIT(2)
134
135/* Manufacturer / Device ID's */
136#define TMP401_MANUFACTURER_ID 0x55
137#define TMP401_DEVICE_ID 0x11
138#define TMP411A_DEVICE_ID 0x12
139#define TMP411B_DEVICE_ID 0x13
140#define TMP411C_DEVICE_ID 0x10
141#define TMP431_DEVICE_ID 0x31
142#define TMP432_DEVICE_ID 0x32
143#define TMP435_DEVICE_ID 0x35
144
145/*
146 * Driver data (common to all clients)
147 */
148
149static const struct i2c_device_id tmp401_id[] = {
150 { "tmp401", tmp401 },
151 { "tmp411", tmp411 },
152 { "tmp431", tmp431 },
153 { "tmp432", tmp432 },
154 { "tmp435", tmp435 },
155 { "tmp461", tmp461 },
156 { }
157};
158MODULE_DEVICE_TABLE(i2c, tmp401_id);
159
160/*
161 * Client data (each client gets its own)
162 */
163
164struct tmp401_data {
165 struct i2c_client *client;
166 const struct attribute_group *groups[3];
167 struct mutex update_lock;
168 char valid; /* zero until following fields are valid */
169 unsigned long last_updated; /* in jiffies */
170 enum chips kind;
171
172 unsigned int update_interval; /* in milliseconds */
173
174 /* register values */
175 u8 status[4];
176 u8 config;
177 u16 temp[7][3];
178 u8 temp_crit_hyst;
179};
180
181/*
182 * Sysfs attr show / store functions
183 */
184
185static int tmp401_register_to_temp(u16 reg, u8 config)
186{
187 int temp = reg;
188
189 if (config & TMP401_CONFIG_RANGE)
190 temp -= 64 * 256;
191
192 return DIV_ROUND_CLOSEST(temp * 125, 32);
193}
194
195static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
196{
197 if (config & TMP401_CONFIG_RANGE) {
198 temp = clamp_val(temp, -64000, 191000);
199 temp += 64000;
200 } else
201 temp = clamp_val(temp, 0, 127000);
202
203 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
204}
205
206static int tmp401_update_device_reg16(struct i2c_client *client,
207 struct tmp401_data *data)
208{
209 int i, j, val;
210 int num_regs = data->kind == tmp411 ? 6 : 4;
211 int num_sensors = data->kind == tmp432 ? 3 : 2;
212
213 for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */
214 for (j = 0; j < num_regs; j++) { /* temp / low / ... */
215 u8 regaddr;
216 /*
217 * High byte must be read first immediately followed
218 * by the low byte
219 */
220 regaddr = data->kind == tmp432 ?
221 TMP432_TEMP_MSB_READ[j][i] :
222 TMP401_TEMP_MSB_READ[j][i];
223 val = i2c_smbus_read_byte_data(client, regaddr);
224 if (val < 0)
225 return val;
226 data->temp[j][i] = val << 8;
227 if (j == 3) /* crit is msb only */
228 continue;
229 regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
230 : TMP401_TEMP_LSB[j][i];
231 val = i2c_smbus_read_byte_data(client, regaddr);
232 if (val < 0)
233 return val;
234 data->temp[j][i] |= val;
235 }
236 }
237 return 0;
238}
239
240static struct tmp401_data *tmp401_update_device(struct device *dev)
241{
242 struct tmp401_data *data = dev_get_drvdata(dev);
243 struct i2c_client *client = data->client;
244 struct tmp401_data *ret = data;
245 int i, val;
246 unsigned long next_update;
247
248 mutex_lock(&data->update_lock);
249
250 next_update = data->last_updated +
251 msecs_to_jiffies(data->update_interval);
252 if (time_after(jiffies, next_update) || !data->valid) {
253 if (data->kind != tmp432) {
254 /*
255 * The driver uses the TMP432 status format internally.
256 * Convert status to TMP432 format for other chips.
257 */
258 val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
259 if (val < 0) {
260 ret = ERR_PTR(val);
261 goto abort;
262 }
263 data->status[0] =
264 (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
265 data->status[1] =
266 ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
267 ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
268 data->status[2] =
269 ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
270 ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
271 data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
272 | TMP401_STATUS_REMOTE_CRIT);
273 } else {
274 for (i = 0; i < ARRAY_SIZE(data->status); i++) {
275 val = i2c_smbus_read_byte_data(client,
276 TMP432_STATUS_REG[i]);
277 if (val < 0) {
278 ret = ERR_PTR(val);
279 goto abort;
280 }
281 data->status[i] = val;
282 }
283 }
284
285 val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
286 if (val < 0) {
287 ret = ERR_PTR(val);
288 goto abort;
289 }
290 data->config = val;
291 val = tmp401_update_device_reg16(client, data);
292 if (val < 0) {
293 ret = ERR_PTR(val);
294 goto abort;
295 }
296 val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
297 if (val < 0) {
298 ret = ERR_PTR(val);
299 goto abort;
300 }
301 data->temp_crit_hyst = val;
302
303 data->last_updated = jiffies;
304 data->valid = 1;
305 }
306
307abort:
308 mutex_unlock(&data->update_lock);
309 return ret;
310}
311
312static ssize_t show_temp(struct device *dev,
313 struct device_attribute *devattr, char *buf)
314{
315 int nr = to_sensor_dev_attr_2(devattr)->nr;
316 int index = to_sensor_dev_attr_2(devattr)->index;
317 struct tmp401_data *data = tmp401_update_device(dev);
318
319 if (IS_ERR(data))
320 return PTR_ERR(data);
321
322 return sprintf(buf, "%d\n",
323 tmp401_register_to_temp(data->temp[nr][index], data->config));
324}
325
326static ssize_t show_temp_crit_hyst(struct device *dev,
327 struct device_attribute *devattr, char *buf)
328{
329 int temp, index = to_sensor_dev_attr(devattr)->index;
330 struct tmp401_data *data = tmp401_update_device(dev);
331
332 if (IS_ERR(data))
333 return PTR_ERR(data);
334
335 mutex_lock(&data->update_lock);
336 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
337 temp -= data->temp_crit_hyst * 1000;
338 mutex_unlock(&data->update_lock);
339
340 return sprintf(buf, "%d\n", temp);
341}
342
343static ssize_t show_status(struct device *dev,
344 struct device_attribute *devattr, char *buf)
345{
346 int nr = to_sensor_dev_attr_2(devattr)->nr;
347 int mask = to_sensor_dev_attr_2(devattr)->index;
348 struct tmp401_data *data = tmp401_update_device(dev);
349
350 if (IS_ERR(data))
351 return PTR_ERR(data);
352
353 return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
354}
355
356static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
357 const char *buf, size_t count)
358{
359 int nr = to_sensor_dev_attr_2(devattr)->nr;
360 int index = to_sensor_dev_attr_2(devattr)->index;
361 struct tmp401_data *data = dev_get_drvdata(dev);
362 struct i2c_client *client = data->client;
363 long val;
364 u16 reg;
365 u8 regaddr;
366
367 if (kstrtol(buf, 10, &val))
368 return -EINVAL;
369
370 reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
371
372 mutex_lock(&data->update_lock);
373
374 regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
375 : TMP401_TEMP_MSB_WRITE[nr][index];
376 i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
377 if (nr != 3) {
378 regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
379 : TMP401_TEMP_LSB[nr][index];
380 i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
381 }
382 data->temp[nr][index] = reg;
383
384 mutex_unlock(&data->update_lock);
385
386 return count;
387}
388
389static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
390 *devattr, const char *buf, size_t count)
391{
392 int temp, index = to_sensor_dev_attr(devattr)->index;
393 struct tmp401_data *data = tmp401_update_device(dev);
394 long val;
395 u8 reg;
396
397 if (IS_ERR(data))
398 return PTR_ERR(data);
399
400 if (kstrtol(buf, 10, &val))
401 return -EINVAL;
402
403 if (data->config & TMP401_CONFIG_RANGE)
404 val = clamp_val(val, -64000, 191000);
405 else
406 val = clamp_val(val, 0, 127000);
407
408 mutex_lock(&data->update_lock);
409 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
410 val = clamp_val(val, temp - 255000, temp);
411 reg = ((temp - val) + 500) / 1000;
412
413 i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
414 reg);
415
416 data->temp_crit_hyst = reg;
417
418 mutex_unlock(&data->update_lock);
419
420 return count;
421}
422
423/*
424 * Resets the historical measurements of minimum and maximum temperatures.
425 * This is done by writing any value to any of the minimum/maximum registers
426 * (0x30-0x37).
427 */
428static ssize_t reset_temp_history(struct device *dev,
429 struct device_attribute *devattr, const char *buf, size_t count)
430{
431 struct tmp401_data *data = dev_get_drvdata(dev);
432 struct i2c_client *client = data->client;
433 long val;
434
435 if (kstrtol(buf, 10, &val))
436 return -EINVAL;
437
438 if (val != 1) {
439 dev_err(dev,
440 "temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
441 val);
442 return -EINVAL;
443 }
444 mutex_lock(&data->update_lock);
445 i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
446 data->valid = 0;
447 mutex_unlock(&data->update_lock);
448
449 return count;
450}
451
452static ssize_t show_update_interval(struct device *dev,
453 struct device_attribute *attr, char *buf)
454{
455 struct tmp401_data *data = dev_get_drvdata(dev);
456
457 return sprintf(buf, "%u\n", data->update_interval);
458}
459
460static ssize_t set_update_interval(struct device *dev,
461 struct device_attribute *attr,
462 const char *buf, size_t count)
463{
464 struct tmp401_data *data = dev_get_drvdata(dev);
465 struct i2c_client *client = data->client;
466 unsigned long val;
467 int err, rate;
468
469 err = kstrtoul(buf, 10, &val);
470 if (err)
471 return err;
472
473 /*
474 * For valid rates, interval can be calculated as
475 * interval = (1 << (7 - rate)) * 125;
476 * Rounded rate is therefore
477 * rate = 7 - __fls(interval * 4 / (125 * 3));
478 * Use clamp_val() to avoid overflows, and to ensure valid input
479 * for __fls.
480 */
481 val = clamp_val(val, 125, 16000);
482 rate = 7 - __fls(val * 4 / (125 * 3));
483 mutex_lock(&data->update_lock);
484 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
485 data->update_interval = (1 << (7 - rate)) * 125;
486 mutex_unlock(&data->update_lock);
487
488 return count;
489}
490
491static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
492static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
493 store_temp, 1, 0);
494static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
495 store_temp, 2, 0);
496static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
497 store_temp, 3, 0);
498static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
499 show_temp_crit_hyst, store_temp_crit_hyst, 0);
500static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
501 1, TMP432_STATUS_LOCAL);
502static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
503 2, TMP432_STATUS_LOCAL);
504static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
505 3, TMP432_STATUS_LOCAL);
506static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
507static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
508 store_temp, 1, 1);
509static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
510 store_temp, 2, 1);
511static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
512 store_temp, 3, 1);
513static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
514 NULL, 1);
515static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
516 0, TMP432_STATUS_REMOTE1);
517static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
518 1, TMP432_STATUS_REMOTE1);
519static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
520 2, TMP432_STATUS_REMOTE1);
521static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
522 3, TMP432_STATUS_REMOTE1);
523
524static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
525 set_update_interval);
526
527static struct attribute *tmp401_attributes[] = {
528 &sensor_dev_attr_temp1_input.dev_attr.attr,
529 &sensor_dev_attr_temp1_min.dev_attr.attr,
530 &sensor_dev_attr_temp1_max.dev_attr.attr,
531 &sensor_dev_attr_temp1_crit.dev_attr.attr,
532 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
533 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
534 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
535 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
536
537 &sensor_dev_attr_temp2_input.dev_attr.attr,
538 &sensor_dev_attr_temp2_min.dev_attr.attr,
539 &sensor_dev_attr_temp2_max.dev_attr.attr,
540 &sensor_dev_attr_temp2_crit.dev_attr.attr,
541 &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
542 &sensor_dev_attr_temp2_fault.dev_attr.attr,
543 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
544 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
545 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
546
547 &dev_attr_update_interval.attr,
548
549 NULL
550};
551
552static const struct attribute_group tmp401_group = {
553 .attrs = tmp401_attributes,
554};
555
556/*
557 * Additional features of the TMP411 chip.
558 * The TMP411 stores the minimum and maximum
559 * temperature measured since power-on, chip-reset, or
560 * minimum and maximum register reset for both the local
561 * and remote channels.
562 */
563static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
564static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
565static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
566static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
567static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
568 0);
569
570static struct attribute *tmp411_attributes[] = {
571 &sensor_dev_attr_temp1_highest.dev_attr.attr,
572 &sensor_dev_attr_temp1_lowest.dev_attr.attr,
573 &sensor_dev_attr_temp2_highest.dev_attr.attr,
574 &sensor_dev_attr_temp2_lowest.dev_attr.attr,
575 &sensor_dev_attr_temp_reset_history.dev_attr.attr,
576 NULL
577};
578
579static const struct attribute_group tmp411_group = {
580 .attrs = tmp411_attributes,
581};
582
583static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
584static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
585 store_temp, 1, 2);
586static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
587 store_temp, 2, 2);
588static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
589 store_temp, 3, 2);
590static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
591 NULL, 2);
592static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
593 0, TMP432_STATUS_REMOTE2);
594static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
595 1, TMP432_STATUS_REMOTE2);
596static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
597 2, TMP432_STATUS_REMOTE2);
598static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
599 3, TMP432_STATUS_REMOTE2);
600
601static struct attribute *tmp432_attributes[] = {
602 &sensor_dev_attr_temp3_input.dev_attr.attr,
603 &sensor_dev_attr_temp3_min.dev_attr.attr,
604 &sensor_dev_attr_temp3_max.dev_attr.attr,
605 &sensor_dev_attr_temp3_crit.dev_attr.attr,
606 &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
607 &sensor_dev_attr_temp3_fault.dev_attr.attr,
608 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
609 &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
610 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
611
612 NULL
613};
614
615static const struct attribute_group tmp432_group = {
616 .attrs = tmp432_attributes,
617};
618
619/*
620 * Additional features of the TMP461 chip.
621 * The TMP461 temperature offset for the remote channel.
622 */
623static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp,
624 store_temp, 6, 1);
625
626static struct attribute *tmp461_attributes[] = {
627 &sensor_dev_attr_temp2_offset.dev_attr.attr,
628 NULL
629};
630
631static const struct attribute_group tmp461_group = {
632 .attrs = tmp461_attributes,
633};
634
635/*
636 * Begin non sysfs callback code (aka Real code)
637 */
638
639static int tmp401_init_client(struct tmp401_data *data,
640 struct i2c_client *client)
641{
642 int config, config_orig, status = 0;
643
644 /* Set the conversion rate to 2 Hz */
645 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
646 data->update_interval = 500;
647
648 /* Start conversions (disable shutdown if necessary) */
649 config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
650 if (config < 0)
651 return config;
652
653 config_orig = config;
654 config &= ~TMP401_CONFIG_SHUTDOWN;
655
656 if (config != config_orig)
657 status = i2c_smbus_write_byte_data(client,
658 TMP401_CONFIG_WRITE,
659 config);
660
661 return status;
662}
663
664static int tmp401_detect(struct i2c_client *client,
665 struct i2c_board_info *info)
666{
667 enum chips kind;
668 struct i2c_adapter *adapter = client->adapter;
669 u8 reg;
670
671 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
672 return -ENODEV;
673
674 /* Detect and identify the chip */
675 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
676 if (reg != TMP401_MANUFACTURER_ID)
677 return -ENODEV;
678
679 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
680
681 switch (reg) {
682 case TMP401_DEVICE_ID:
683 if (client->addr != 0x4c)
684 return -ENODEV;
685 kind = tmp401;
686 break;
687 case TMP411A_DEVICE_ID:
688 if (client->addr != 0x4c)
689 return -ENODEV;
690 kind = tmp411;
691 break;
692 case TMP411B_DEVICE_ID:
693 if (client->addr != 0x4d)
694 return -ENODEV;
695 kind = tmp411;
696 break;
697 case TMP411C_DEVICE_ID:
698 if (client->addr != 0x4e)
699 return -ENODEV;
700 kind = tmp411;
701 break;
702 case TMP431_DEVICE_ID:
703 if (client->addr != 0x4c && client->addr != 0x4d)
704 return -ENODEV;
705 kind = tmp431;
706 break;
707 case TMP432_DEVICE_ID:
708 if (client->addr != 0x4c && client->addr != 0x4d)
709 return -ENODEV;
710 kind = tmp432;
711 break;
712 case TMP435_DEVICE_ID:
713 kind = tmp435;
714 break;
715 default:
716 return -ENODEV;
717 }
718
719 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
720 if (reg & 0x1b)
721 return -ENODEV;
722
723 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
724 /* Datasheet says: 0x1-0x6 */
725 if (reg > 15)
726 return -ENODEV;
727
728 strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
729
730 return 0;
731}
732
733static int tmp401_probe(struct i2c_client *client,
734 const struct i2c_device_id *id)
735{
736 static const char * const names[] = {
737 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
738 };
739 struct device *dev = &client->dev;
740 struct device *hwmon_dev;
741 struct tmp401_data *data;
742 int groups = 0, status;
743
744 data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
745 if (!data)
746 return -ENOMEM;
747
748 data->client = client;
749 mutex_init(&data->update_lock);
750 data->kind = id->driver_data;
751
752 /* Initialize the TMP401 chip */
753 status = tmp401_init_client(data, client);
754 if (status < 0)
755 return status;
756
757 /* Register sysfs hooks */
758 data->groups[groups++] = &tmp401_group;
759
760 /* Register additional tmp411 sysfs hooks */
761 if (data->kind == tmp411)
762 data->groups[groups++] = &tmp411_group;
763
764 /* Register additional tmp432 sysfs hooks */
765 if (data->kind == tmp432)
766 data->groups[groups++] = &tmp432_group;
767
768 if (data->kind == tmp461)
769 data->groups[groups++] = &tmp461_group;
770
771 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
772 data, data->groups);
773 if (IS_ERR(hwmon_dev))
774 return PTR_ERR(hwmon_dev);
775
776 dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
777
778 return 0;
779}
780
781static struct i2c_driver tmp401_driver = {
782 .class = I2C_CLASS_HWMON,
783 .driver = {
784 .name = "tmp401",
785 },
786 .probe = tmp401_probe,
787 .id_table = tmp401_id,
788 .detect = tmp401_detect,
789 .address_list = normal_i2c,
790};
791
792module_i2c_driver(tmp401_driver);
793
794MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
795MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
796MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/* tmp401.c
3 *
4 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
5 * Preliminary tmp411 support by:
6 * Gabriel Konat, Sander Leget, Wouter Willems
7 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
8 *
9 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
10 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
11 */
12
13/*
14 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
15 *
16 * Note this IC is in some aspect similar to the LM90, but it has quite a
17 * few differences too, for example the local temp has a higher resolution
18 * and thus has 16 bits registers for its value and limit instead of 8 bits.
19 */
20
21#include <linux/bitops.h>
22#include <linux/err.h>
23#include <linux/i2c.h>
24#include <linux/hwmon.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/mutex.h>
28#include <linux/regmap.h>
29#include <linux/slab.h>
30
31/* Addresses to scan */
32static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
33 0x4e, 0x4f, I2C_CLIENT_END };
34
35enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
36
37/*
38 * The TMP401 registers, note some registers have different addresses for
39 * reading and writing
40 */
41#define TMP401_STATUS 0x02
42#define TMP401_CONFIG 0x03
43#define TMP401_CONVERSION_RATE 0x04
44#define TMP4XX_N_FACTOR_REG 0x18
45#define TMP43X_BETA_RANGE 0x25
46#define TMP401_TEMP_CRIT_HYST 0x21
47#define TMP401_MANUFACTURER_ID_REG 0xFE
48#define TMP401_DEVICE_ID_REG 0xFF
49
50static const u8 TMP401_TEMP_MSB[7][3] = {
51 { 0x00, 0x01, 0x23 }, /* temp */
52 { 0x06, 0x08, 0x16 }, /* low limit */
53 { 0x05, 0x07, 0x15 }, /* high limit */
54 { 0x20, 0x19, 0x1a }, /* therm (crit) limit */
55 { 0x30, 0x34, 0x00 }, /* lowest */
56 { 0x32, 0xf6, 0x00 }, /* highest */
57};
58
59/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
60static const u8 TMP432_STATUS_REG[] = {
61 0x1b, 0x36, 0x35, 0x37 };
62
63/* Flags */
64#define TMP401_CONFIG_RANGE BIT(2)
65#define TMP401_CONFIG_SHUTDOWN BIT(6)
66#define TMP401_STATUS_LOCAL_CRIT BIT(0)
67#define TMP401_STATUS_REMOTE_CRIT BIT(1)
68#define TMP401_STATUS_REMOTE_OPEN BIT(2)
69#define TMP401_STATUS_REMOTE_LOW BIT(3)
70#define TMP401_STATUS_REMOTE_HIGH BIT(4)
71#define TMP401_STATUS_LOCAL_LOW BIT(5)
72#define TMP401_STATUS_LOCAL_HIGH BIT(6)
73
74/* On TMP432, each status has its own register */
75#define TMP432_STATUS_LOCAL BIT(0)
76#define TMP432_STATUS_REMOTE1 BIT(1)
77#define TMP432_STATUS_REMOTE2 BIT(2)
78
79/* Manufacturer / Device ID's */
80#define TMP401_MANUFACTURER_ID 0x55
81#define TMP401_DEVICE_ID 0x11
82#define TMP411A_DEVICE_ID 0x12
83#define TMP411B_DEVICE_ID 0x13
84#define TMP411C_DEVICE_ID 0x10
85#define TMP431_DEVICE_ID 0x31
86#define TMP432_DEVICE_ID 0x32
87#define TMP435_DEVICE_ID 0x35
88
89/*
90 * Driver data (common to all clients)
91 */
92
93static const struct i2c_device_id tmp401_id[] = {
94 { "tmp401", tmp401 },
95 { "tmp411", tmp411 },
96 { "tmp431", tmp431 },
97 { "tmp432", tmp432 },
98 { "tmp435", tmp435 },
99 { }
100};
101MODULE_DEVICE_TABLE(i2c, tmp401_id);
102
103/*
104 * Client data (each client gets its own)
105 */
106
107struct tmp401_data {
108 struct i2c_client *client;
109 struct regmap *regmap;
110 struct mutex update_lock;
111 enum chips kind;
112
113 bool extended_range;
114
115 /* hwmon API configuration data */
116 u32 chip_channel_config[4];
117 struct hwmon_channel_info chip_info;
118 u32 temp_channel_config[4];
119 struct hwmon_channel_info temp_info;
120 const struct hwmon_channel_info *info[3];
121 struct hwmon_chip_info chip;
122};
123
124/* regmap */
125
126static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg)
127{
128 switch (reg) {
129 case 0: /* local temp msb */
130 case 1: /* remote temp msb */
131 case 2: /* status */
132 case 0x10: /* remote temp lsb */
133 case 0x15: /* local temp lsb */
134 case 0x1b: /* status (tmp432) */
135 case 0x23 ... 0x24: /* remote temp 2 msb / lsb */
136 case 0x30 ... 0x37: /* lowest/highest temp; status (tmp432) */
137 return true;
138 default:
139 return false;
140 }
141}
142
143static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val)
144{
145 struct tmp401_data *data = context;
146 struct i2c_client *client = data->client;
147 int regval;
148
149 switch (reg) {
150 case 0: /* local temp msb */
151 case 1: /* remote temp msb */
152 case 5: /* local temp high limit msb */
153 case 6: /* local temp low limit msb */
154 case 7: /* remote temp ligh limit msb */
155 case 8: /* remote temp low limit msb */
156 case 0x15: /* remote temp 2 high limit msb */
157 case 0x16: /* remote temp 2 low limit msb */
158 case 0x23: /* remote temp 2 msb */
159 case 0x30: /* local temp minimum, tmp411 */
160 case 0x32: /* local temp maximum, tmp411 */
161 case 0x34: /* remote temp minimum, tmp411 */
162 case 0xf6: /* remote temp maximum, tmp411 (really 0x36) */
163 /* work around register overlap between TMP411 and TMP432 */
164 if (reg == 0xf6)
165 reg = 0x36;
166 regval = i2c_smbus_read_word_swapped(client, reg);
167 if (regval < 0)
168 return regval;
169 *val = regval;
170 break;
171 case 0x19: /* critical limits, 8-bit registers */
172 case 0x1a:
173 case 0x20:
174 regval = i2c_smbus_read_byte_data(client, reg);
175 if (regval < 0)
176 return regval;
177 *val = regval << 8;
178 break;
179 case 0x1b:
180 case 0x35 ... 0x37:
181 if (data->kind == tmp432) {
182 regval = i2c_smbus_read_byte_data(client, reg);
183 if (regval < 0)
184 return regval;
185 *val = regval;
186 break;
187 }
188 /* simulate TMP432 status registers */
189 regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);
190 if (regval < 0)
191 return regval;
192 *val = 0;
193 switch (reg) {
194 case 0x1b: /* open / fault */
195 if (regval & TMP401_STATUS_REMOTE_OPEN)
196 *val |= BIT(1);
197 break;
198 case 0x35: /* high limit */
199 if (regval & TMP401_STATUS_LOCAL_HIGH)
200 *val |= BIT(0);
201 if (regval & TMP401_STATUS_REMOTE_HIGH)
202 *val |= BIT(1);
203 break;
204 case 0x36: /* low limit */
205 if (regval & TMP401_STATUS_LOCAL_LOW)
206 *val |= BIT(0);
207 if (regval & TMP401_STATUS_REMOTE_LOW)
208 *val |= BIT(1);
209 break;
210 case 0x37: /* therm / crit limit */
211 if (regval & TMP401_STATUS_LOCAL_CRIT)
212 *val |= BIT(0);
213 if (regval & TMP401_STATUS_REMOTE_CRIT)
214 *val |= BIT(1);
215 break;
216 }
217 break;
218 default:
219 regval = i2c_smbus_read_byte_data(client, reg);
220 if (regval < 0)
221 return regval;
222 *val = regval;
223 break;
224 }
225 return 0;
226}
227
228static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val)
229{
230 struct tmp401_data *data = context;
231 struct i2c_client *client = data->client;
232
233 switch (reg) {
234 case 0x05: /* local temp high limit msb */
235 case 0x06: /* local temp low limit msb */
236 case 0x07: /* remote temp ligh limit msb */
237 case 0x08: /* remote temp low limit msb */
238 reg += 6; /* adjust for register write address */
239 fallthrough;
240 case 0x15: /* remote temp 2 high limit msb */
241 case 0x16: /* remote temp 2 low limit msb */
242 return i2c_smbus_write_word_swapped(client, reg, val);
243 case 0x19: /* critical limits, 8-bit registers */
244 case 0x1a:
245 case 0x20:
246 return i2c_smbus_write_byte_data(client, reg, val >> 8);
247 case TMP401_CONVERSION_RATE:
248 case TMP401_CONFIG:
249 reg += 6; /* adjust for register write address */
250 fallthrough;
251 default:
252 return i2c_smbus_write_byte_data(client, reg, val);
253 }
254}
255
256static const struct regmap_config tmp401_regmap_config = {
257 .reg_bits = 8,
258 .val_bits = 16,
259 .cache_type = REGCACHE_MAPLE,
260 .volatile_reg = tmp401_regmap_is_volatile,
261 .reg_read = tmp401_reg_read,
262 .reg_write = tmp401_reg_write,
263};
264
265/* temperature conversion */
266
267static int tmp401_register_to_temp(u16 reg, bool extended)
268{
269 int temp = reg;
270
271 if (extended)
272 temp -= 64 * 256;
273
274 return DIV_ROUND_CLOSEST(temp * 125, 32);
275}
276
277static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)
278{
279 if (extended) {
280 temp = clamp_val(temp, -64000, 191000);
281 temp += 64000;
282 } else {
283 temp = clamp_val(temp, 0, 127000);
284 }
285
286 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
287}
288
289/* hwmon API functions */
290
291static const u8 tmp401_temp_reg_index[] = {
292 [hwmon_temp_input] = 0,
293 [hwmon_temp_min] = 1,
294 [hwmon_temp_max] = 2,
295 [hwmon_temp_crit] = 3,
296 [hwmon_temp_lowest] = 4,
297 [hwmon_temp_highest] = 5,
298};
299
300static const u8 tmp401_status_reg_index[] = {
301 [hwmon_temp_fault] = 0,
302 [hwmon_temp_min_alarm] = 1,
303 [hwmon_temp_max_alarm] = 2,
304 [hwmon_temp_crit_alarm] = 3,
305};
306
307static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)
308{
309 struct tmp401_data *data = dev_get_drvdata(dev);
310 struct regmap *regmap = data->regmap;
311 unsigned int regs[2] = { TMP401_TEMP_MSB[3][channel], TMP401_TEMP_CRIT_HYST };
312 unsigned int regval;
313 u16 regvals[2];
314 int reg, ret;
315
316 switch (attr) {
317 case hwmon_temp_input:
318 case hwmon_temp_min:
319 case hwmon_temp_max:
320 case hwmon_temp_crit:
321 case hwmon_temp_lowest:
322 case hwmon_temp_highest:
323 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
324 ret = regmap_read(regmap, reg, ®val);
325 if (ret < 0)
326 return ret;
327 *val = tmp401_register_to_temp(regval, data->extended_range);
328 break;
329 case hwmon_temp_crit_hyst:
330 ret = regmap_multi_reg_read(regmap, regs, regvals, 2);
331 if (ret < 0)
332 return ret;
333 *val = tmp401_register_to_temp(regvals[0], data->extended_range) -
334 (regvals[1] * 1000);
335 break;
336 case hwmon_temp_fault:
337 case hwmon_temp_min_alarm:
338 case hwmon_temp_max_alarm:
339 case hwmon_temp_crit_alarm:
340 reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];
341 ret = regmap_read(regmap, reg, ®val);
342 if (ret < 0)
343 return ret;
344 *val = !!(regval & BIT(channel));
345 break;
346 default:
347 return -EOPNOTSUPP;
348 }
349 return 0;
350}
351
352static int tmp401_temp_write(struct device *dev, u32 attr, int channel,
353 long val)
354{
355 struct tmp401_data *data = dev_get_drvdata(dev);
356 struct regmap *regmap = data->regmap;
357 unsigned int regval;
358 int reg, ret, temp;
359
360 mutex_lock(&data->update_lock);
361 switch (attr) {
362 case hwmon_temp_min:
363 case hwmon_temp_max:
364 case hwmon_temp_crit:
365 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
366 regval = tmp401_temp_to_register(val, data->extended_range,
367 attr == hwmon_temp_crit ? 8 : 4);
368 ret = regmap_write(regmap, reg, regval);
369 break;
370 case hwmon_temp_crit_hyst:
371 if (data->extended_range)
372 val = clamp_val(val, -64000, 191000);
373 else
374 val = clamp_val(val, 0, 127000);
375
376 reg = TMP401_TEMP_MSB[3][channel];
377 ret = regmap_read(regmap, reg, ®val);
378 if (ret < 0)
379 break;
380 temp = tmp401_register_to_temp(regval, data->extended_range);
381 val = clamp_val(val, temp - 255000, temp);
382 regval = ((temp - val) + 500) / 1000;
383 ret = regmap_write(regmap, TMP401_TEMP_CRIT_HYST, regval);
384 break;
385 default:
386 ret = -EOPNOTSUPP;
387 break;
388 }
389 mutex_unlock(&data->update_lock);
390 return ret;
391}
392
393static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)
394{
395 struct tmp401_data *data = dev_get_drvdata(dev);
396 u32 regval;
397 int ret;
398
399 switch (attr) {
400 case hwmon_chip_update_interval:
401 ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, ®val);
402 if (ret < 0)
403 return ret;
404 *val = (1 << (7 - regval)) * 125;
405 break;
406 case hwmon_chip_temp_reset_history:
407 *val = 0;
408 break;
409 default:
410 return -EOPNOTSUPP;
411 }
412
413 return 0;
414}
415
416static int tmp401_set_convrate(struct regmap *regmap, long val)
417{
418 int rate;
419
420 /*
421 * For valid rates, interval can be calculated as
422 * interval = (1 << (7 - rate)) * 125;
423 * Rounded rate is therefore
424 * rate = 7 - __fls(interval * 4 / (125 * 3));
425 * Use clamp_val() to avoid overflows, and to ensure valid input
426 * for __fls.
427 */
428 val = clamp_val(val, 125, 16000);
429 rate = 7 - __fls(val * 4 / (125 * 3));
430 return regmap_write(regmap, TMP401_CONVERSION_RATE, rate);
431}
432
433static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)
434{
435 struct tmp401_data *data = dev_get_drvdata(dev);
436 struct regmap *regmap = data->regmap;
437 int err;
438
439 mutex_lock(&data->update_lock);
440 switch (attr) {
441 case hwmon_chip_update_interval:
442 err = tmp401_set_convrate(regmap, val);
443 break;
444 case hwmon_chip_temp_reset_history:
445 if (val != 1) {
446 err = -EINVAL;
447 break;
448 }
449 /*
450 * Reset history by writing any value to any of the
451 * minimum/maximum registers (0x30-0x37).
452 */
453 err = regmap_write(regmap, 0x30, 0);
454 break;
455 default:
456 err = -EOPNOTSUPP;
457 break;
458 }
459 mutex_unlock(&data->update_lock);
460
461 return err;
462}
463
464static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,
465 u32 attr, int channel, long *val)
466{
467 switch (type) {
468 case hwmon_chip:
469 return tmp401_chip_read(dev, attr, channel, val);
470 case hwmon_temp:
471 return tmp401_temp_read(dev, attr, channel, val);
472 default:
473 return -EOPNOTSUPP;
474 }
475}
476
477static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,
478 u32 attr, int channel, long val)
479{
480 switch (type) {
481 case hwmon_chip:
482 return tmp401_chip_write(dev, attr, channel, val);
483 case hwmon_temp:
484 return tmp401_temp_write(dev, attr, channel, val);
485 default:
486 return -EOPNOTSUPP;
487 }
488}
489
490static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,
491 u32 attr, int channel)
492{
493 switch (type) {
494 case hwmon_chip:
495 switch (attr) {
496 case hwmon_chip_update_interval:
497 case hwmon_chip_temp_reset_history:
498 return 0644;
499 default:
500 break;
501 }
502 break;
503 case hwmon_temp:
504 switch (attr) {
505 case hwmon_temp_input:
506 case hwmon_temp_min_alarm:
507 case hwmon_temp_max_alarm:
508 case hwmon_temp_crit_alarm:
509 case hwmon_temp_fault:
510 case hwmon_temp_lowest:
511 case hwmon_temp_highest:
512 return 0444;
513 case hwmon_temp_min:
514 case hwmon_temp_max:
515 case hwmon_temp_crit:
516 case hwmon_temp_crit_hyst:
517 return 0644;
518 default:
519 break;
520 }
521 break;
522 default:
523 break;
524 }
525 return 0;
526}
527
528static const struct hwmon_ops tmp401_ops = {
529 .is_visible = tmp401_is_visible,
530 .read = tmp401_read,
531 .write = tmp401_write,
532};
533
534/* chip initialization, detect, probe */
535
536static int tmp401_init_client(struct tmp401_data *data)
537{
538 struct regmap *regmap = data->regmap;
539 u32 config, config_orig;
540 int ret;
541 u32 val = 0;
542 s32 nfactor = 0;
543
544 /* Set conversion rate to 2 Hz */
545 ret = regmap_write(regmap, TMP401_CONVERSION_RATE, 5);
546 if (ret < 0)
547 return ret;
548
549 /* Start conversions (disable shutdown if necessary) */
550 ret = regmap_read(regmap, TMP401_CONFIG, &config);
551 if (ret < 0)
552 return ret;
553
554 config_orig = config;
555 config &= ~TMP401_CONFIG_SHUTDOWN;
556
557 if (of_property_read_bool(data->client->dev.of_node, "ti,extended-range-enable")) {
558 /* Enable measurement over extended temperature range */
559 config |= TMP401_CONFIG_RANGE;
560 }
561
562 data->extended_range = !!(config & TMP401_CONFIG_RANGE);
563
564 if (config != config_orig) {
565 ret = regmap_write(regmap, TMP401_CONFIG, config);
566 if (ret < 0)
567 return ret;
568 }
569
570 ret = of_property_read_u32(data->client->dev.of_node, "ti,n-factor", &nfactor);
571 if (!ret) {
572 if (data->kind == tmp401) {
573 dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n");
574 return -EINVAL;
575 }
576 if (nfactor < -128 || nfactor > 127) {
577 dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor);
578 return -EINVAL;
579 }
580 ret = regmap_write(regmap, TMP4XX_N_FACTOR_REG, (unsigned int)nfactor);
581 if (ret < 0)
582 return ret;
583 }
584
585 ret = of_property_read_u32(data->client->dev.of_node, "ti,beta-compensation", &val);
586 if (!ret) {
587 if (data->kind == tmp401 || data->kind == tmp411) {
588 dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n");
589 return -EINVAL;
590 }
591 if (val > 15) {
592 dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val);
593 return -EINVAL;
594 }
595 ret = regmap_write(regmap, TMP43X_BETA_RANGE, val);
596 if (ret < 0)
597 return ret;
598 }
599
600 return 0;
601}
602
603static int tmp401_detect(struct i2c_client *client,
604 struct i2c_board_info *info)
605{
606 enum chips kind;
607 struct i2c_adapter *adapter = client->adapter;
608 u8 reg;
609
610 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
611 return -ENODEV;
612
613 /* Detect and identify the chip */
614 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
615 if (reg != TMP401_MANUFACTURER_ID)
616 return -ENODEV;
617
618 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
619
620 switch (reg) {
621 case TMP401_DEVICE_ID:
622 if (client->addr != 0x4c)
623 return -ENODEV;
624 kind = tmp401;
625 break;
626 case TMP411A_DEVICE_ID:
627 if (client->addr != 0x4c)
628 return -ENODEV;
629 kind = tmp411;
630 break;
631 case TMP411B_DEVICE_ID:
632 if (client->addr != 0x4d)
633 return -ENODEV;
634 kind = tmp411;
635 break;
636 case TMP411C_DEVICE_ID:
637 if (client->addr != 0x4e)
638 return -ENODEV;
639 kind = tmp411;
640 break;
641 case TMP431_DEVICE_ID:
642 if (client->addr != 0x4c && client->addr != 0x4d)
643 return -ENODEV;
644 kind = tmp431;
645 break;
646 case TMP432_DEVICE_ID:
647 if (client->addr != 0x4c && client->addr != 0x4d)
648 return -ENODEV;
649 kind = tmp432;
650 break;
651 case TMP435_DEVICE_ID:
652 kind = tmp435;
653 break;
654 default:
655 return -ENODEV;
656 }
657
658 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG);
659 if (reg & 0x1b)
660 return -ENODEV;
661
662 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE);
663 /* Datasheet says: 0x1-0x6 */
664 if (reg > 15)
665 return -ENODEV;
666
667 strscpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
668
669 return 0;
670}
671
672static int tmp401_probe(struct i2c_client *client)
673{
674 static const char * const names[] = {
675 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
676 };
677 struct device *dev = &client->dev;
678 struct hwmon_channel_info *info;
679 struct device *hwmon_dev;
680 struct tmp401_data *data;
681 int status;
682
683 data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
684 if (!data)
685 return -ENOMEM;
686
687 data->client = client;
688 mutex_init(&data->update_lock);
689 data->kind = (uintptr_t)i2c_get_match_data(client);
690
691 data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config);
692 if (IS_ERR(data->regmap))
693 return PTR_ERR(data->regmap);
694
695 /* initialize configuration data */
696 data->chip.ops = &tmp401_ops;
697 data->chip.info = data->info;
698
699 data->info[0] = &data->chip_info;
700 data->info[1] = &data->temp_info;
701
702 info = &data->chip_info;
703 info->type = hwmon_chip;
704 info->config = data->chip_channel_config;
705
706 data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;
707
708 info = &data->temp_info;
709 info->type = hwmon_temp;
710 info->config = data->temp_channel_config;
711
712 data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
713 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
714 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
715 data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
716 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
717 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
718
719 if (data->kind == tmp411) {
720 data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
721 data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
722 data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;
723 }
724
725 if (data->kind == tmp432) {
726 data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
727 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
728 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
729 }
730
731 /* Initialize the TMP401 chip */
732 status = tmp401_init_client(data);
733 if (status < 0)
734 return status;
735
736 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
737 &data->chip, NULL);
738 if (IS_ERR(hwmon_dev))
739 return PTR_ERR(hwmon_dev);
740
741 dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
742
743 return 0;
744}
745
746static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {
747 { .compatible = "ti,tmp401", },
748 { .compatible = "ti,tmp411", },
749 { .compatible = "ti,tmp431", },
750 { .compatible = "ti,tmp432", },
751 { .compatible = "ti,tmp435", },
752 { },
753};
754MODULE_DEVICE_TABLE(of, tmp4xx_of_match);
755
756static struct i2c_driver tmp401_driver = {
757 .class = I2C_CLASS_HWMON,
758 .driver = {
759 .name = "tmp401",
760 .of_match_table = of_match_ptr(tmp4xx_of_match),
761 },
762 .probe = tmp401_probe,
763 .id_table = tmp401_id,
764 .detect = tmp401_detect,
765 .address_list = normal_i2c,
766};
767
768module_i2c_driver(tmp401_driver);
769
770MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
771MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
772MODULE_LICENSE("GPL");