1/*
 2 * Queued spinlock
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License as published by
 6 * the Free Software Foundation; either version 2 of the License, or
 7 * (at your option) any later version.
 8 *
 9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
15 *
16 * Authors: Waiman Long <waiman.long@hp.com>
17 */
18#ifndef __ASM_GENERIC_QSPINLOCK_TYPES_H
19#define __ASM_GENERIC_QSPINLOCK_TYPES_H
20
21/*
22 * Including atomic.h with PARAVIRT on will cause compilation errors because
23 * of recursive header file incluson via paravirt_types.h. So don't include
24 * it if PARAVIRT is on.
25 */
26#ifndef CONFIG_PARAVIRT
27#include <linux/types.h>
28#include <linux/atomic.h>
29#endif
30
31typedef struct qspinlock {
32	atomic_t	val;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
33} arch_spinlock_t;
34
35/*
36 * Initializier
37 */
38#define	__ARCH_SPIN_LOCK_UNLOCKED	{ ATOMIC_INIT(0) }
39
40/*
41 * Bitfields in the atomic value:
42 *
43 * When NR_CPUS < 16K
44 *  0- 7: locked byte
45 *     8: pending
46 *  9-15: not used
47 * 16-17: tail index
48 * 18-31: tail cpu (+1)
49 *
50 * When NR_CPUS >= 16K
51 *  0- 7: locked byte
52 *     8: pending
53 *  9-10: tail index
54 * 11-31: tail cpu (+1)
55 */
56#define	_Q_SET_MASK(type)	(((1U << _Q_ ## type ## _BITS) - 1)\
57				      << _Q_ ## type ## _OFFSET)
58#define _Q_LOCKED_OFFSET	0
59#define _Q_LOCKED_BITS		8
60#define _Q_LOCKED_MASK		_Q_SET_MASK(LOCKED)
61
62#define _Q_PENDING_OFFSET	(_Q_LOCKED_OFFSET + _Q_LOCKED_BITS)
63#if CONFIG_NR_CPUS < (1U << 14)
64#define _Q_PENDING_BITS		8
65#else
66#define _Q_PENDING_BITS		1
67#endif
68#define _Q_PENDING_MASK		_Q_SET_MASK(PENDING)
69
70#define _Q_TAIL_IDX_OFFSET	(_Q_PENDING_OFFSET + _Q_PENDING_BITS)
71#define _Q_TAIL_IDX_BITS	2
72#define _Q_TAIL_IDX_MASK	_Q_SET_MASK(TAIL_IDX)
73
74#define _Q_TAIL_CPU_OFFSET	(_Q_TAIL_IDX_OFFSET + _Q_TAIL_IDX_BITS)
75#define _Q_TAIL_CPU_BITS	(32 - _Q_TAIL_CPU_OFFSET)
76#define _Q_TAIL_CPU_MASK	_Q_SET_MASK(TAIL_CPU)
77
78#define _Q_TAIL_OFFSET		_Q_TAIL_IDX_OFFSET
79#define _Q_TAIL_MASK		(_Q_TAIL_IDX_MASK | _Q_TAIL_CPU_MASK)
80
81#define _Q_LOCKED_VAL		(1U << _Q_LOCKED_OFFSET)
82#define _Q_PENDING_VAL		(1U << _Q_PENDING_OFFSET)
83
84#endif /* __ASM_GENERIC_QSPINLOCK_TYPES_H */

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 * Queued spinlock
 4 *
 
 
 
 
 
 
 
 
 
 
 5 * (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
 6 *
 7 * Authors: Waiman Long <waiman.long@hp.com>
 8 */
 9#ifndef __ASM_GENERIC_QSPINLOCK_TYPES_H
10#define __ASM_GENERIC_QSPINLOCK_TYPES_H
11
 
 
 
 
 
 
12#include <linux/types.h>
 
 
13
14typedef struct qspinlock {
15	union {
16		atomic_t val;
17
18		/*
19		 * By using the whole 2nd least significant byte for the
20		 * pending bit, we can allow better optimization of the lock
21		 * acquisition for the pending bit holder.
22		 */
23#ifdef __LITTLE_ENDIAN
24		struct {
25			u8	locked;
26			u8	pending;
27		};
28		struct {
29			u16	locked_pending;
30			u16	tail;
31		};
32#else
33		struct {
34			u16	tail;
35			u16	locked_pending;
36		};
37		struct {
38			u8	reserved[2];
39			u8	pending;
40			u8	locked;
41		};
42#endif
43	};
44} arch_spinlock_t;
45
46/*
47 * Initializier
48 */
49#define	__ARCH_SPIN_LOCK_UNLOCKED	{ { .val = ATOMIC_INIT(0) } }
50
51/*
52 * Bitfields in the atomic value:
53 *
54 * When NR_CPUS < 16K
55 *  0- 7: locked byte
56 *     8: pending
57 *  9-15: not used
58 * 16-17: tail index
59 * 18-31: tail cpu (+1)
60 *
61 * When NR_CPUS >= 16K
62 *  0- 7: locked byte
63 *     8: pending
64 *  9-10: tail index
65 * 11-31: tail cpu (+1)
66 */
67#define	_Q_SET_MASK(type)	(((1U << _Q_ ## type ## _BITS) - 1)\
68				      << _Q_ ## type ## _OFFSET)
69#define _Q_LOCKED_OFFSET	0
70#define _Q_LOCKED_BITS		8
71#define _Q_LOCKED_MASK		_Q_SET_MASK(LOCKED)
72
73#define _Q_PENDING_OFFSET	(_Q_LOCKED_OFFSET + _Q_LOCKED_BITS)
74#if CONFIG_NR_CPUS < (1U << 14)
75#define _Q_PENDING_BITS		8
76#else
77#define _Q_PENDING_BITS		1
78#endif
79#define _Q_PENDING_MASK		_Q_SET_MASK(PENDING)
80
81#define _Q_TAIL_IDX_OFFSET	(_Q_PENDING_OFFSET + _Q_PENDING_BITS)
82#define _Q_TAIL_IDX_BITS	2
83#define _Q_TAIL_IDX_MASK	_Q_SET_MASK(TAIL_IDX)
84
85#define _Q_TAIL_CPU_OFFSET	(_Q_TAIL_IDX_OFFSET + _Q_TAIL_IDX_BITS)
86#define _Q_TAIL_CPU_BITS	(32 - _Q_TAIL_CPU_OFFSET)
87#define _Q_TAIL_CPU_MASK	_Q_SET_MASK(TAIL_CPU)
88
89#define _Q_TAIL_OFFSET		_Q_TAIL_IDX_OFFSET
90#define _Q_TAIL_MASK		(_Q_TAIL_IDX_MASK | _Q_TAIL_CPU_MASK)
91
92#define _Q_LOCKED_VAL		(1U << _Q_LOCKED_OFFSET)
93#define _Q_PENDING_VAL		(1U << _Q_PENDING_OFFSET)
94
95#endif /* __ASM_GENERIC_QSPINLOCK_TYPES_H */