1/*
  2 * OMAP2/3 Power Management Routines
  3 *
  4 * Copyright (C) 2008 Nokia Corporation
  5 * Jouni Hogander
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 */
 11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
 12#define __ARCH_ARM_MACH_OMAP2_PM_H
 13
 14#include <linux/err.h>
 15
 16#include "powerdomain.h"
 17
 18#ifdef CONFIG_CPU_IDLE
 19extern int __init omap3_idle_init(void);
 20extern int __init omap4_idle_init(void);
 21#else
 22static inline int omap3_idle_init(void)
 23{
 24	return 0;
 25}
 26
 27static inline int omap4_idle_init(void)
 28{
 29	return 0;
 30}
 31#endif
 32
 33extern void *omap3_secure_ram_storage;
 34extern void omap3_pm_off_mode_enable(int);
 35extern void omap_sram_idle(void);
 36extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
 37
 38#if defined(CONFIG_PM_OPP)
 39extern int omap3_opp_init(void);
 40extern int omap4_opp_init(void);
 41#else
 42static inline int omap3_opp_init(void)
 43{
 44	return -EINVAL;
 45}
 46static inline int omap4_opp_init(void)
 47{
 48	return -EINVAL;
 49}
 50#endif
 51
 52extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
 53extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
 54
 55#ifdef CONFIG_PM_DEBUG
 56extern u32 enable_off_mode;
 57#else
 58#define enable_off_mode 0
 59#endif
 60
 61#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 62extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
 63#else
 64#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
 65#endif /* CONFIG_PM_DEBUG */
 66
 67/* 24xx */
 68extern void omap24xx_idle_loop_suspend(void);
 69extern unsigned int omap24xx_idle_loop_suspend_sz;
 70
 71extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
 72					void __iomem *sdrc_power);
 73extern unsigned int omap24xx_cpu_suspend_sz;
 74
 75/* 3xxx */
 76extern void omap34xx_cpu_suspend(int save_state);
 77
 78/* omap3_do_wfi function pointer and size, for copy to SRAM */
 79extern void omap3_do_wfi(void);
 80extern unsigned int omap3_do_wfi_sz;
 81/* ... and its pointer from SRAM after copy */
 82extern void (*omap3_do_wfi_sram)(void);
 83
 84/* save_secure_ram_context function pointer and size, for copy to SRAM */
 85extern int save_secure_ram_context(u32 *addr);
 86extern unsigned int save_secure_ram_context_sz;
 87
 88extern void omap3_save_scratchpad_contents(void);
 89
 90#define PM_RTA_ERRATUM_i608		(1 << 0)
 91#define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
 92#define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
 93
 94#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 95extern u16 pm34xx_errata;
 96#define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
 97extern void enable_omap3630_toggle_l2_on_restore(void);
 98#else
 99#define IS_PM34XX_ERRATUM(id)		0
100static inline void enable_omap3630_toggle_l2_on_restore(void) { }
101#endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
102
103#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
104#define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
105
106#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
107	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
108extern u16 pm44xx_errata;
109#define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
110#else
111#define IS_PM44XX_ERRATUM(id)		0
112#endif
113
 
 
 
 
 
114#ifdef CONFIG_POWER_AVS_OMAP
115extern int omap_devinit_smartreflex(void);
116extern void omap_enable_smartreflex_on_init(void);
117#else
118static inline int omap_devinit_smartreflex(void)
119{
120	return -EINVAL;
121}
122
123static inline void omap_enable_smartreflex_on_init(void) {}
124#endif
125
126#ifdef CONFIG_TWL4030_CORE
127extern int omap3_twl_init(void);
128extern int omap4_twl_init(void);
129extern int omap3_twl_set_sr_bit(bool enable);
130#else
131static inline int omap3_twl_init(void)
132{
133	return -EINVAL;
134}
135static inline int omap4_twl_init(void)
 
 
 
 
 
 
 
 
 
136{
137	return -EINVAL;
138}
139#endif
140
141#ifdef CONFIG_PM
142extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
143extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
144extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
145#else
146static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
147static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
148static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
149#endif
150
151#ifdef CONFIG_SUSPEND
152void omap_common_suspend_init(void *pm_suspend);
153#else
154static inline void omap_common_suspend_init(void *pm_suspend)
155{
156}
157#endif /* CONFIG_SUSPEND */
158#endif

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * OMAP2/3 Power Management Routines
  4 *
  5 * Copyright (C) 2008 Nokia Corporation
  6 * Jouni Hogander
 
 
 
 
  7 */
  8#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  9#define __ARCH_ARM_MACH_OMAP2_PM_H
 10
 11#include <linux/err.h>
 12
 13#include "powerdomain.h"
 14
 15#ifdef CONFIG_CPU_IDLE
 16extern int __init omap3_idle_init(void);
 17extern int __init omap4_idle_init(void);
 18#else
 19static inline int omap3_idle_init(void)
 20{
 21	return 0;
 22}
 23
 24static inline int omap4_idle_init(void)
 25{
 26	return 0;
 27}
 28#endif
 29
 30extern void *omap3_secure_ram_storage;
 31extern void omap3_pm_off_mode_enable(int);
 32extern void omap_sram_idle(void);
 33extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
 34
 35#if defined(CONFIG_PM_OPP)
 36extern int omap3_opp_init(void);
 37extern int omap4_opp_init(void);
 38#else
 39static inline int omap3_opp_init(void)
 40{
 41	return -EINVAL;
 42}
 43static inline int omap4_opp_init(void)
 44{
 45	return -EINVAL;
 46}
 47#endif
 48
 49extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
 50extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
 51
 52#ifdef CONFIG_PM_DEBUG
 53extern u32 enable_off_mode;
 54#else
 55#define enable_off_mode 0
 56#endif
 57
 58#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 59extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
 60#else
 61#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
 62#endif /* CONFIG_PM_DEBUG */
 63
 64/* 24xx */
 65extern void omap24xx_idle_loop_suspend(void);
 66extern unsigned int omap24xx_idle_loop_suspend_sz;
 67
 68extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
 69					void __iomem *sdrc_power);
 70extern unsigned int omap24xx_cpu_suspend_sz;
 71
 72/* 3xxx */
 73extern void omap34xx_cpu_suspend(int save_state);
 74
 75/* omap3_do_wfi function pointer and size, for copy to SRAM */
 76extern void omap3_do_wfi(void);
 77extern unsigned int omap3_do_wfi_sz;
 78/* ... and its pointer from SRAM after copy */
 79extern void (*omap3_do_wfi_sram)(void);
 80
 81extern struct am33xx_pm_sram_addr am33xx_pm_sram;
 82extern struct am33xx_pm_sram_addr am43xx_pm_sram;
 
 83
 84extern void omap3_save_scratchpad_contents(void);
 85
 86#define PM_RTA_ERRATUM_i608		(1 << 0)
 87#define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
 88#define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
 89
 90#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 91extern u16 pm34xx_errata;
 92#define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
 93extern void enable_omap3630_toggle_l2_on_restore(void);
 94#else
 95#define IS_PM34XX_ERRATUM(id)		0
 96static inline void enable_omap3630_toggle_l2_on_restore(void) { }
 97#endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
 98
 99#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
100#define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
101
102#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
103	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
104extern u16 pm44xx_errata;
105#define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
106#else
107#define IS_PM44XX_ERRATUM(id)		0
108#endif
109
110#define OMAP4_VP_CONFIG_ERROROFFSET	0x00
111#define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
112#define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
113#define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
114
115#ifdef CONFIG_POWER_AVS_OMAP
116extern int omap_devinit_smartreflex(void);
117extern void omap_enable_smartreflex_on_init(void);
118#else
119static inline int omap_devinit_smartreflex(void)
120{
121	return -EINVAL;
122}
123
124static inline void omap_enable_smartreflex_on_init(void) {}
125#endif
126
127#ifdef CONFIG_TWL4030_CORE
128extern int omap3_twl_init(void);
129extern int omap4_twl_init(void);
130extern int omap3_twl_set_sr_bit(bool enable);
131#else
132static inline int omap3_twl_init(void)
133{
134	return -EINVAL;
135}
136static inline int omap4_twl_init(void)
137{
138	return -EINVAL;
139}
140#endif
141
142#if IS_ENABLED(CONFIG_MFD_CPCAP)
143extern int omap4_cpcap_init(void);
144#else
145static inline int omap4_cpcap_init(void)
146{
147	return -EINVAL;
148}
149#endif
150
151#ifdef CONFIG_PM
152extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
153extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
154extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
155#else
156static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
157static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
158static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
159#endif
160
161#ifdef CONFIG_SUSPEND
162void omap_common_suspend_init(void *pm_suspend);
163#else
164static inline void omap_common_suspend_init(void *pm_suspend)
165{
166}
167#endif /* CONFIG_SUSPEND */
168#endif