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1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/export.h>
9#include <linux/pci.h>
10
11#include <asm/bios_ebda.h>
12#include <asm/paravirt.h>
13#include <asm/pci_x86.h>
14#include <asm/mpspec.h>
15#include <asm/setup.h>
16#include <asm/apic.h>
17#include <asm/e820.h>
18#include <asm/time.h>
19#include <asm/irq.h>
20#include <asm/io_apic.h>
21#include <asm/hpet.h>
22#include <asm/pat.h>
23#include <asm/tsc.h>
24#include <asm/iommu.h>
25#include <asm/mach_traps.h>
26
27void x86_init_noop(void) { }
28void __init x86_init_uint_noop(unsigned int unused) { }
29int __init iommu_init_noop(void) { return 0; }
30void iommu_shutdown_noop(void) { }
31
32/*
33 * The platform setup functions are preset with the default functions
34 * for standard PC hardware.
35 */
36struct x86_init_ops x86_init __initdata = {
37
38 .resources = {
39 .probe_roms = probe_roms,
40 .reserve_resources = reserve_standard_io_resources,
41 .memory_setup = default_machine_specific_memory_setup,
42 },
43
44 .mpparse = {
45 .mpc_record = x86_init_uint_noop,
46 .setup_ioapic_ids = x86_init_noop,
47 .mpc_apic_id = default_mpc_apic_id,
48 .smp_read_mpc_oem = default_smp_read_mpc_oem,
49 .mpc_oem_bus_info = default_mpc_oem_bus_info,
50 .find_smp_config = default_find_smp_config,
51 .get_smp_config = default_get_smp_config,
52 },
53
54 .irqs = {
55 .pre_vector_init = init_ISA_irqs,
56 .intr_init = native_init_IRQ,
57 .trap_init = x86_init_noop,
58 },
59
60 .oem = {
61 .arch_setup = x86_init_noop,
62 .banner = default_banner,
63 },
64
65 .paging = {
66 .pagetable_init = native_pagetable_init,
67 },
68
69 .timers = {
70 .setup_percpu_clockev = setup_boot_APIC_clock,
71 .timer_init = hpet_time_init,
72 .wallclock_init = x86_init_noop,
73 },
74
75 .iommu = {
76 .iommu_init = iommu_init_noop,
77 },
78
79 .pci = {
80 .init = x86_default_pci_init,
81 .init_irq = x86_default_pci_init_irq,
82 .fixup_irqs = x86_default_pci_fixup_irqs,
83 },
84};
85
86struct x86_cpuinit_ops x86_cpuinit = {
87 .early_percpu_clock_init = x86_init_noop,
88 .setup_percpu_clockev = setup_secondary_APIC_clock,
89};
90
91static void default_nmi_init(void) { };
92
93struct x86_platform_ops x86_platform __ro_after_init = {
94 .calibrate_cpu = native_calibrate_cpu,
95 .calibrate_tsc = native_calibrate_tsc,
96 .get_wallclock = mach_get_cmos_time,
97 .set_wallclock = mach_set_rtc_mmss,
98 .iommu_shutdown = iommu_shutdown_noop,
99 .is_untracked_pat_range = is_ISA_range,
100 .nmi_init = default_nmi_init,
101 .get_nmi_reason = default_get_nmi_reason,
102 .save_sched_clock_state = tsc_save_sched_clock_state,
103 .restore_sched_clock_state = tsc_restore_sched_clock_state,
104};
105
106EXPORT_SYMBOL_GPL(x86_platform);
107
108#if defined(CONFIG_PCI_MSI)
109struct x86_msi_ops x86_msi __ro_after_init = {
110 .setup_msi_irqs = native_setup_msi_irqs,
111 .teardown_msi_irq = native_teardown_msi_irq,
112 .teardown_msi_irqs = default_teardown_msi_irqs,
113 .restore_msi_irqs = default_restore_msi_irqs,
114};
115
116/* MSI arch specific hooks */
117int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
118{
119 return x86_msi.setup_msi_irqs(dev, nvec, type);
120}
121
122void arch_teardown_msi_irqs(struct pci_dev *dev)
123{
124 x86_msi.teardown_msi_irqs(dev);
125}
126
127void arch_teardown_msi_irq(unsigned int irq)
128{
129 x86_msi.teardown_msi_irq(irq);
130}
131
132void arch_restore_msi_irqs(struct pci_dev *dev)
133{
134 x86_msi.restore_msi_irqs(dev);
135}
136#endif
137
138struct x86_io_apic_ops x86_io_apic_ops __ro_after_init = {
139 .read = native_io_apic_read,
140 .disable = native_disable_io_apic,
141};
1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/export.h>
9#include <linux/pci.h>
10
11#include <asm/acpi.h>
12#include <asm/bios_ebda.h>
13#include <asm/paravirt.h>
14#include <asm/pci_x86.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820/api.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/hpet.h>
23#include <asm/memtype.h>
24#include <asm/tsc.h>
25#include <asm/iommu.h>
26#include <asm/mach_traps.h>
27
28void x86_init_noop(void) { }
29void __init x86_init_uint_noop(unsigned int unused) { }
30static int __init iommu_init_noop(void) { return 0; }
31static void iommu_shutdown_noop(void) { }
32bool __init bool_x86_init_noop(void) { return false; }
33void x86_op_int_noop(int cpu) { }
34static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
35static __init void get_rtc_noop(struct timespec64 *now) { }
36
37static __initconst const struct of_device_id of_cmos_match[] = {
38 { .compatible = "motorola,mc146818" },
39 {}
40};
41
42/*
43 * Allow devicetree configured systems to disable the RTC by setting the
44 * corresponding DT node's status property to disabled. Code is optimized
45 * out for CONFIG_OF=n builds.
46 */
47static __init void x86_wallclock_init(void)
48{
49 struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
50
51 if (node && !of_device_is_available(node)) {
52 x86_platform.get_wallclock = get_rtc_noop;
53 x86_platform.set_wallclock = set_rtc_noop;
54 }
55}
56
57/*
58 * The platform setup functions are preset with the default functions
59 * for standard PC hardware.
60 */
61struct x86_init_ops x86_init __initdata = {
62
63 .resources = {
64 .probe_roms = probe_roms,
65 .reserve_resources = reserve_standard_io_resources,
66 .memory_setup = e820__memory_setup_default,
67 },
68
69 .mpparse = {
70 .mpc_record = x86_init_uint_noop,
71 .setup_ioapic_ids = x86_init_noop,
72 .mpc_apic_id = default_mpc_apic_id,
73 .smp_read_mpc_oem = default_smp_read_mpc_oem,
74 .mpc_oem_bus_info = default_mpc_oem_bus_info,
75 .find_smp_config = default_find_smp_config,
76 .get_smp_config = default_get_smp_config,
77 },
78
79 .irqs = {
80 .pre_vector_init = init_ISA_irqs,
81 .intr_init = native_init_IRQ,
82 .intr_mode_select = apic_intr_mode_select,
83 .intr_mode_init = apic_intr_mode_init
84 },
85
86 .oem = {
87 .arch_setup = x86_init_noop,
88 .banner = default_banner,
89 },
90
91 .paging = {
92 .pagetable_init = native_pagetable_init,
93 },
94
95 .timers = {
96 .setup_percpu_clockev = setup_boot_APIC_clock,
97 .timer_init = hpet_time_init,
98 .wallclock_init = x86_wallclock_init,
99 },
100
101 .iommu = {
102 .iommu_init = iommu_init_noop,
103 },
104
105 .pci = {
106 .init = x86_default_pci_init,
107 .init_irq = x86_default_pci_init_irq,
108 .fixup_irqs = x86_default_pci_fixup_irqs,
109 },
110
111 .hyper = {
112 .init_platform = x86_init_noop,
113 .guest_late_init = x86_init_noop,
114 .x2apic_available = bool_x86_init_noop,
115 .init_mem_mapping = x86_init_noop,
116 .init_after_bootmem = x86_init_noop,
117 },
118
119 .acpi = {
120 .set_root_pointer = x86_default_set_root_pointer,
121 .get_root_pointer = x86_default_get_root_pointer,
122 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
123 },
124};
125
126struct x86_cpuinit_ops x86_cpuinit = {
127 .early_percpu_clock_init = x86_init_noop,
128 .setup_percpu_clockev = setup_secondary_APIC_clock,
129};
130
131static void default_nmi_init(void) { };
132
133struct x86_platform_ops x86_platform __ro_after_init = {
134 .calibrate_cpu = native_calibrate_cpu_early,
135 .calibrate_tsc = native_calibrate_tsc,
136 .get_wallclock = mach_get_cmos_time,
137 .set_wallclock = mach_set_rtc_mmss,
138 .iommu_shutdown = iommu_shutdown_noop,
139 .is_untracked_pat_range = is_ISA_range,
140 .nmi_init = default_nmi_init,
141 .get_nmi_reason = default_get_nmi_reason,
142 .save_sched_clock_state = tsc_save_sched_clock_state,
143 .restore_sched_clock_state = tsc_restore_sched_clock_state,
144 .hyper.pin_vcpu = x86_op_int_noop,
145};
146
147EXPORT_SYMBOL_GPL(x86_platform);
148
149#if defined(CONFIG_PCI_MSI)
150struct x86_msi_ops x86_msi __ro_after_init = {
151 .setup_msi_irqs = native_setup_msi_irqs,
152 .teardown_msi_irq = native_teardown_msi_irq,
153 .teardown_msi_irqs = default_teardown_msi_irqs,
154 .restore_msi_irqs = default_restore_msi_irqs,
155};
156
157/* MSI arch specific hooks */
158int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
159{
160 return x86_msi.setup_msi_irqs(dev, nvec, type);
161}
162
163void arch_teardown_msi_irqs(struct pci_dev *dev)
164{
165 x86_msi.teardown_msi_irqs(dev);
166}
167
168void arch_teardown_msi_irq(unsigned int irq)
169{
170 x86_msi.teardown_msi_irq(irq);
171}
172
173void arch_restore_msi_irqs(struct pci_dev *dev)
174{
175 x86_msi.restore_msi_irqs(dev);
176}
177#endif
178
179struct x86_apic_ops x86_apic_ops __ro_after_init = {
180 .io_apic_read = native_io_apic_read,
181 .restore = native_restore_boot_irq_mode,
182};