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1/*
2 * Copyright (C) 2016 BayLibre, SAS
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 * Copyright (C) 2014 Endless Mobile
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 * Written by:
20 * Jasper St. Pierre <jstpierre@mecheye.net>
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/mutex.h>
26#include <linux/platform_device.h>
27#include <linux/of_graph.h>
28
29#include <drm/drmP.h>
30#include <drm/drm_atomic.h>
31#include <drm/drm_atomic_helper.h>
32#include <drm/drm_flip_work.h>
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_plane_helper.h>
35#include <drm/drm_gem_cma_helper.h>
36#include <drm/drm_fb_cma_helper.h>
37#include <drm/drm_rect.h>
38#include <drm/drm_fb_helper.h>
39
40#include "meson_drv.h"
41#include "meson_plane.h"
42#include "meson_crtc.h"
43#include "meson_venc_cvbs.h"
44
45#include "meson_vpp.h"
46#include "meson_viu.h"
47#include "meson_venc.h"
48#include "meson_canvas.h"
49#include "meson_registers.h"
50
51#define DRIVER_NAME "meson"
52#define DRIVER_DESC "Amlogic Meson DRM driver"
53
54/*
55 * Video Processing Unit
56 *
57 * VPU Handles the Global Video Processing, it includes management of the
58 * clocks gates, blocks reset lines and power domains.
59 *
60 * What is missing :
61 * - Full reset of entire video processing HW blocks
62 * - Scaling and setup of the VPU clock
63 * - Bus clock gates
64 * - Powering up video processing HW blocks
65 * - Powering Up HDMI controller and PHY
66 */
67
68static void meson_fb_output_poll_changed(struct drm_device *dev)
69{
70 struct meson_drm *priv = dev->dev_private;
71
72 drm_fbdev_cma_hotplug_event(priv->fbdev);
73}
74
75static const struct drm_mode_config_funcs meson_mode_config_funcs = {
76 .output_poll_changed = meson_fb_output_poll_changed,
77 .atomic_check = drm_atomic_helper_check,
78 .atomic_commit = drm_atomic_helper_commit,
79 .fb_create = drm_fb_cma_create,
80};
81
82static int meson_enable_vblank(struct drm_device *dev, unsigned int crtc)
83{
84 struct meson_drm *priv = dev->dev_private;
85
86 meson_venc_enable_vsync(priv);
87
88 return 0;
89}
90
91static void meson_disable_vblank(struct drm_device *dev, unsigned int crtc)
92{
93 struct meson_drm *priv = dev->dev_private;
94
95 meson_venc_disable_vsync(priv);
96}
97
98static irqreturn_t meson_irq(int irq, void *arg)
99{
100 struct drm_device *dev = arg;
101 struct meson_drm *priv = dev->dev_private;
102
103 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
104
105 meson_crtc_irq(priv);
106
107 return IRQ_HANDLED;
108}
109
110static const struct file_operations fops = {
111 .owner = THIS_MODULE,
112 .open = drm_open,
113 .release = drm_release,
114 .unlocked_ioctl = drm_ioctl,
115#ifdef CONFIG_COMPAT
116 .compat_ioctl = drm_compat_ioctl,
117#endif
118 .poll = drm_poll,
119 .read = drm_read,
120 .llseek = no_llseek,
121 .mmap = drm_gem_cma_mmap,
122};
123
124static struct drm_driver meson_driver = {
125 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
126 DRIVER_MODESET | DRIVER_PRIME |
127 DRIVER_ATOMIC,
128
129 /* Vblank */
130 .enable_vblank = meson_enable_vblank,
131 .disable_vblank = meson_disable_vblank,
132 .get_vblank_counter = drm_vblank_no_hw_counter,
133
134 /* IRQ */
135 .irq_handler = meson_irq,
136
137 /* PRIME Ops */
138 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
139 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
140 .gem_prime_import = drm_gem_prime_import,
141 .gem_prime_export = drm_gem_prime_export,
142 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
143 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
144 .gem_prime_vmap = drm_gem_cma_prime_vmap,
145 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
146 .gem_prime_mmap = drm_gem_cma_prime_mmap,
147
148 /* GEM Ops */
149 .dumb_create = drm_gem_cma_dumb_create,
150 .dumb_destroy = drm_gem_dumb_destroy,
151 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
152 .gem_free_object_unlocked = drm_gem_cma_free_object,
153 .gem_vm_ops = &drm_gem_cma_vm_ops,
154
155 /* Misc */
156 .fops = &fops,
157 .name = DRIVER_NAME,
158 .desc = DRIVER_DESC,
159 .date = "20161109",
160 .major = 1,
161 .minor = 0,
162};
163
164static bool meson_vpu_has_available_connectors(struct device *dev)
165{
166 struct device_node *ep, *remote;
167
168 /* Parses each endpoint and check if remote exists */
169 for_each_endpoint_of_node(dev->of_node, ep) {
170 /* If the endpoint node exists, consider it enabled */
171 remote = of_graph_get_remote_port(ep);
172 if (remote)
173 return true;
174 }
175
176 return false;
177}
178
179static struct regmap_config meson_regmap_config = {
180 .reg_bits = 32,
181 .val_bits = 32,
182 .reg_stride = 4,
183 .max_register = 0x1000,
184};
185
186static int meson_drv_probe(struct platform_device *pdev)
187{
188 struct device *dev = &pdev->dev;
189 struct meson_drm *priv;
190 struct drm_device *drm;
191 struct resource *res;
192 void __iomem *regs;
193 int ret;
194
195 /* Checks if an output connector is available */
196 if (!meson_vpu_has_available_connectors(dev)) {
197 dev_err(dev, "No output connector available\n");
198 return -ENODEV;
199 }
200
201 drm = drm_dev_alloc(&meson_driver, dev);
202 if (IS_ERR(drm))
203 return PTR_ERR(drm);
204
205 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
206 if (!priv) {
207 ret = -ENOMEM;
208 goto free_drm;
209 }
210 drm->dev_private = priv;
211 priv->drm = drm;
212 priv->dev = dev;
213
214 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
215 regs = devm_ioremap_resource(dev, res);
216 if (IS_ERR(regs))
217 return PTR_ERR(regs);
218
219 priv->io_base = regs;
220
221 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
222 /* Simply ioremap since it may be a shared register zone */
223 regs = devm_ioremap(dev, res->start, resource_size(res));
224 if (!regs)
225 return -EADDRNOTAVAIL;
226
227 priv->hhi = devm_regmap_init_mmio(dev, regs,
228 &meson_regmap_config);
229 if (IS_ERR(priv->hhi)) {
230 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
231 return PTR_ERR(priv->hhi);
232 }
233
234 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
235 /* Simply ioremap since it may be a shared register zone */
236 regs = devm_ioremap(dev, res->start, resource_size(res));
237 if (!regs)
238 return -EADDRNOTAVAIL;
239
240 priv->dmc = devm_regmap_init_mmio(dev, regs,
241 &meson_regmap_config);
242 if (IS_ERR(priv->dmc)) {
243 dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
244 return PTR_ERR(priv->dmc);
245 }
246
247 priv->vsync_irq = platform_get_irq(pdev, 0);
248
249 drm_vblank_init(drm, 1);
250 drm_mode_config_init(drm);
251
252 /* Encoder Initialization */
253
254 ret = meson_venc_cvbs_create(priv);
255 if (ret)
256 goto free_drm;
257
258 /* Hardware Initialization */
259
260 meson_venc_init(priv);
261 meson_vpp_init(priv);
262 meson_viu_init(priv);
263
264 ret = meson_plane_create(priv);
265 if (ret)
266 goto free_drm;
267
268 ret = meson_crtc_create(priv);
269 if (ret)
270 goto free_drm;
271
272 ret = drm_irq_install(drm, priv->vsync_irq);
273 if (ret)
274 goto free_drm;
275
276 drm_mode_config_reset(drm);
277 drm->mode_config.max_width = 8192;
278 drm->mode_config.max_height = 8192;
279 drm->mode_config.funcs = &meson_mode_config_funcs;
280
281 priv->fbdev = drm_fbdev_cma_init(drm, 32,
282 drm->mode_config.num_crtc,
283 drm->mode_config.num_connector);
284 if (IS_ERR(priv->fbdev)) {
285 ret = PTR_ERR(priv->fbdev);
286 goto free_drm;
287 }
288
289 drm_kms_helper_poll_init(drm);
290
291 platform_set_drvdata(pdev, priv);
292
293 ret = drm_dev_register(drm, 0);
294 if (ret)
295 goto free_drm;
296
297 return 0;
298
299free_drm:
300 drm_dev_unref(drm);
301
302 return ret;
303}
304
305static int meson_drv_remove(struct platform_device *pdev)
306{
307 struct drm_device *drm = dev_get_drvdata(&pdev->dev);
308 struct meson_drm *priv = drm->dev_private;
309
310 drm_dev_unregister(drm);
311 drm_kms_helper_poll_fini(drm);
312 drm_fbdev_cma_fini(priv->fbdev);
313 drm_mode_config_cleanup(drm);
314 drm_vblank_cleanup(drm);
315 drm_dev_unref(drm);
316
317 return 0;
318}
319
320static const struct of_device_id dt_match[] = {
321 { .compatible = "amlogic,meson-gxbb-vpu" },
322 { .compatible = "amlogic,meson-gxl-vpu" },
323 { .compatible = "amlogic,meson-gxm-vpu" },
324 {}
325};
326MODULE_DEVICE_TABLE(of, dt_match);
327
328static struct platform_driver meson_drm_platform_driver = {
329 .probe = meson_drv_probe,
330 .remove = meson_drv_remove,
331 .driver = {
332 .owner = THIS_MODULE,
333 .name = DRIVER_NAME,
334 .of_match_table = dt_match,
335 },
336};
337
338module_platform_driver(meson_drm_platform_driver);
339
340MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
341MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
342MODULE_DESCRIPTION(DRIVER_DESC);
343MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
6 *
7 * Written by:
8 * Jasper St. Pierre <jstpierre@mecheye.net>
9 */
10
11#include <linux/component.h>
12#include <linux/module.h>
13#include <linux/of_graph.h>
14#include <linux/sys_soc.h>
15#include <linux/platform_device.h>
16#include <linux/soc/amlogic/meson-canvas.h>
17
18#include <drm/drm_aperture.h>
19#include <drm/drm_atomic_helper.h>
20#include <drm/drm_drv.h>
21#include <drm/drm_fb_helper.h>
22#include <drm/drm_gem_cma_helper.h>
23#include <drm/drm_gem_framebuffer_helper.h>
24#include <drm/drm_irq.h>
25#include <drm/drm_modeset_helper_vtables.h>
26#include <drm/drm_probe_helper.h>
27#include <drm/drm_vblank.h>
28
29#include "meson_crtc.h"
30#include "meson_drv.h"
31#include "meson_overlay.h"
32#include "meson_plane.h"
33#include "meson_osd_afbcd.h"
34#include "meson_registers.h"
35#include "meson_venc_cvbs.h"
36#include "meson_viu.h"
37#include "meson_vpp.h"
38#include "meson_rdma.h"
39
40#define DRIVER_NAME "meson"
41#define DRIVER_DESC "Amlogic Meson DRM driver"
42
43/**
44 * DOC: Video Processing Unit
45 *
46 * VPU Handles the Global Video Processing, it includes management of the
47 * clocks gates, blocks reset lines and power domains.
48 *
49 * What is missing :
50 *
51 * - Full reset of entire video processing HW blocks
52 * - Scaling and setup of the VPU clock
53 * - Bus clock gates
54 * - Powering up video processing HW blocks
55 * - Powering Up HDMI controller and PHY
56 */
57
58static const struct drm_mode_config_funcs meson_mode_config_funcs = {
59 .atomic_check = drm_atomic_helper_check,
60 .atomic_commit = drm_atomic_helper_commit,
61 .fb_create = drm_gem_fb_create,
62};
63
64static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
65 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
66};
67
68static irqreturn_t meson_irq(int irq, void *arg)
69{
70 struct drm_device *dev = arg;
71 struct meson_drm *priv = dev->dev_private;
72
73 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
74
75 meson_crtc_irq(priv);
76
77 return IRQ_HANDLED;
78}
79
80static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
81 struct drm_mode_create_dumb *args)
82{
83 /*
84 * We need 64bytes aligned stride, and PAGE aligned size
85 */
86 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
87 args->size = PAGE_ALIGN(args->pitch * args->height);
88
89 return drm_gem_cma_dumb_create_internal(file, dev, args);
90}
91
92DEFINE_DRM_GEM_CMA_FOPS(fops);
93
94static const struct drm_driver meson_driver = {
95 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
96
97 /* IRQ */
98 .irq_handler = meson_irq,
99
100 /* CMA Ops */
101 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
102
103 /* Misc */
104 .fops = &fops,
105 .name = DRIVER_NAME,
106 .desc = DRIVER_DESC,
107 .date = "20161109",
108 .major = 1,
109 .minor = 0,
110};
111
112static bool meson_vpu_has_available_connectors(struct device *dev)
113{
114 struct device_node *ep, *remote;
115
116 /* Parses each endpoint and check if remote exists */
117 for_each_endpoint_of_node(dev->of_node, ep) {
118 /* If the endpoint node exists, consider it enabled */
119 remote = of_graph_get_remote_port(ep);
120 if (remote)
121 return true;
122 }
123
124 return false;
125}
126
127static struct regmap_config meson_regmap_config = {
128 .reg_bits = 32,
129 .val_bits = 32,
130 .reg_stride = 4,
131 .max_register = 0x1000,
132};
133
134static void meson_vpu_init(struct meson_drm *priv)
135{
136 u32 value;
137
138 /*
139 * Slave dc0 and dc5 connected to master port 1.
140 * By default other slaves are connected to master port 0.
141 */
142 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
143 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
145
146 /* Slave dc0 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
148 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
149
150 /* Slave dc4 and dc7 connected to master port 1 */
151 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
152 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
154
155 /* Slave dc1 connected to master port 1 */
156 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
157 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
158}
159
160struct meson_drm_soc_attr {
161 struct meson_drm_soc_limits limits;
162 const struct soc_device_attribute *attrs;
163};
164
165static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
166 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
167 {
168 .limits = {
169 .max_hdmi_phy_freq = 1650000,
170 },
171 .attrs = (const struct soc_device_attribute []) {
172 { .soc_id = "GXL (S805*)", },
173 { /* sentinel */ },
174 }
175 },
176};
177
178static int meson_drv_bind_master(struct device *dev, bool has_components)
179{
180 struct platform_device *pdev = to_platform_device(dev);
181 const struct meson_drm_match_data *match;
182 struct meson_drm *priv;
183 struct drm_device *drm;
184 struct resource *res;
185 void __iomem *regs;
186 int ret, i;
187
188 /* Checks if an output connector is available */
189 if (!meson_vpu_has_available_connectors(dev)) {
190 dev_err(dev, "No output connector available\n");
191 return -ENODEV;
192 }
193
194 match = of_device_get_match_data(dev);
195 if (!match)
196 return -ENODEV;
197
198 drm = drm_dev_alloc(&meson_driver, dev);
199 if (IS_ERR(drm))
200 return PTR_ERR(drm);
201
202 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
203 if (!priv) {
204 ret = -ENOMEM;
205 goto free_drm;
206 }
207 drm->dev_private = priv;
208 priv->drm = drm;
209 priv->dev = dev;
210 priv->compat = match->compat;
211 priv->afbcd.ops = match->afbcd_ops;
212
213 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
214 regs = devm_ioremap_resource(dev, res);
215 if (IS_ERR(regs)) {
216 ret = PTR_ERR(regs);
217 goto free_drm;
218 }
219
220 priv->io_base = regs;
221
222 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
223 if (!res) {
224 ret = -EINVAL;
225 goto free_drm;
226 }
227 /* Simply ioremap since it may be a shared register zone */
228 regs = devm_ioremap(dev, res->start, resource_size(res));
229 if (!regs) {
230 ret = -EADDRNOTAVAIL;
231 goto free_drm;
232 }
233
234 priv->hhi = devm_regmap_init_mmio(dev, regs,
235 &meson_regmap_config);
236 if (IS_ERR(priv->hhi)) {
237 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
238 ret = PTR_ERR(priv->hhi);
239 goto free_drm;
240 }
241
242 priv->canvas = meson_canvas_get(dev);
243 if (IS_ERR(priv->canvas)) {
244 ret = PTR_ERR(priv->canvas);
245 goto free_drm;
246 }
247
248 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
249 if (ret)
250 goto free_drm;
251 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
252 if (ret) {
253 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
254 goto free_drm;
255 }
256 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
257 if (ret) {
258 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
259 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
260 goto free_drm;
261 }
262 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
263 if (ret) {
264 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
265 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
266 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
267 goto free_drm;
268 }
269
270 priv->vsync_irq = platform_get_irq(pdev, 0);
271
272 ret = drm_vblank_init(drm, 1);
273 if (ret)
274 goto free_drm;
275
276 /* Assign limits per soc revision/package */
277 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
278 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
279 priv->limits = &meson_drm_soc_attrs[i].limits;
280 break;
281 }
282 }
283
284 /*
285 * Remove early framebuffers (ie. simplefb). The framebuffer can be
286 * located anywhere in RAM
287 */
288 ret = drm_aperture_remove_framebuffers(false, "meson-drm-fb");
289 if (ret)
290 goto free_drm;
291
292 ret = drmm_mode_config_init(drm);
293 if (ret)
294 goto free_drm;
295 drm->mode_config.max_width = 3840;
296 drm->mode_config.max_height = 2160;
297 drm->mode_config.funcs = &meson_mode_config_funcs;
298 drm->mode_config.helper_private = &meson_mode_config_helpers;
299
300 /* Hardware Initialization */
301
302 meson_vpu_init(priv);
303 meson_venc_init(priv);
304 meson_vpp_init(priv);
305 meson_viu_init(priv);
306 if (priv->afbcd.ops) {
307 ret = priv->afbcd.ops->init(priv);
308 if (ret)
309 return ret;
310 }
311
312 /* Encoder Initialization */
313
314 ret = meson_venc_cvbs_create(priv);
315 if (ret)
316 goto free_drm;
317
318 if (has_components) {
319 ret = component_bind_all(drm->dev, drm);
320 if (ret) {
321 dev_err(drm->dev, "Couldn't bind all components\n");
322 goto free_drm;
323 }
324 }
325
326 ret = meson_plane_create(priv);
327 if (ret)
328 goto free_drm;
329
330 ret = meson_overlay_create(priv);
331 if (ret)
332 goto free_drm;
333
334 ret = meson_crtc_create(priv);
335 if (ret)
336 goto free_drm;
337
338 ret = drm_irq_install(drm, priv->vsync_irq);
339 if (ret)
340 goto free_drm;
341
342 drm_mode_config_reset(drm);
343
344 drm_kms_helper_poll_init(drm);
345
346 platform_set_drvdata(pdev, priv);
347
348 ret = drm_dev_register(drm, 0);
349 if (ret)
350 goto uninstall_irq;
351
352 drm_fbdev_generic_setup(drm, 32);
353
354 return 0;
355
356uninstall_irq:
357 drm_irq_uninstall(drm);
358free_drm:
359 drm_dev_put(drm);
360
361 return ret;
362}
363
364static int meson_drv_bind(struct device *dev)
365{
366 return meson_drv_bind_master(dev, true);
367}
368
369static void meson_drv_unbind(struct device *dev)
370{
371 struct meson_drm *priv = dev_get_drvdata(dev);
372 struct drm_device *drm = priv->drm;
373
374 if (priv->canvas) {
375 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
376 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
377 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
378 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
379 }
380
381 drm_dev_unregister(drm);
382 drm_kms_helper_poll_fini(drm);
383 drm_atomic_helper_shutdown(drm);
384 component_unbind_all(dev, drm);
385 drm_irq_uninstall(drm);
386 drm_dev_put(drm);
387
388 if (priv->afbcd.ops) {
389 priv->afbcd.ops->reset(priv);
390 meson_rdma_free(priv);
391 }
392}
393
394static const struct component_master_ops meson_drv_master_ops = {
395 .bind = meson_drv_bind,
396 .unbind = meson_drv_unbind,
397};
398
399static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
400{
401 struct meson_drm *priv = dev_get_drvdata(dev);
402
403 if (!priv)
404 return 0;
405
406 return drm_mode_config_helper_suspend(priv->drm);
407}
408
409static int __maybe_unused meson_drv_pm_resume(struct device *dev)
410{
411 struct meson_drm *priv = dev_get_drvdata(dev);
412
413 if (!priv)
414 return 0;
415
416 meson_vpu_init(priv);
417 meson_venc_init(priv);
418 meson_vpp_init(priv);
419 meson_viu_init(priv);
420 if (priv->afbcd.ops)
421 priv->afbcd.ops->init(priv);
422
423 return drm_mode_config_helper_resume(priv->drm);
424}
425
426static int compare_of(struct device *dev, void *data)
427{
428 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
429 dev->of_node, data);
430
431 return dev->of_node == data;
432}
433
434/* Possible connectors nodes to ignore */
435static const struct of_device_id connectors_match[] = {
436 { .compatible = "composite-video-connector" },
437 { .compatible = "svideo-connector" },
438 { .compatible = "hdmi-connector" },
439 { .compatible = "dvi-connector" },
440 {}
441};
442
443static int meson_probe_remote(struct platform_device *pdev,
444 struct component_match **match,
445 struct device_node *parent,
446 struct device_node *remote)
447{
448 struct device_node *ep, *remote_node;
449 int count = 1;
450
451 /* If node is a connector, return and do not add to match table */
452 if (of_match_node(connectors_match, remote))
453 return 1;
454
455 component_match_add(&pdev->dev, match, compare_of, remote);
456
457 for_each_endpoint_of_node(remote, ep) {
458 remote_node = of_graph_get_remote_port_parent(ep);
459 if (!remote_node ||
460 remote_node == parent || /* Ignore parent endpoint */
461 !of_device_is_available(remote_node)) {
462 of_node_put(remote_node);
463 continue;
464 }
465
466 count += meson_probe_remote(pdev, match, remote, remote_node);
467
468 of_node_put(remote_node);
469 }
470
471 return count;
472}
473
474static void meson_drv_shutdown(struct platform_device *pdev)
475{
476 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
477
478 if (!priv)
479 return;
480
481 drm_kms_helper_poll_fini(priv->drm);
482 drm_atomic_helper_shutdown(priv->drm);
483}
484
485static int meson_drv_probe(struct platform_device *pdev)
486{
487 struct component_match *match = NULL;
488 struct device_node *np = pdev->dev.of_node;
489 struct device_node *ep, *remote;
490 int count = 0;
491
492 for_each_endpoint_of_node(np, ep) {
493 remote = of_graph_get_remote_port_parent(ep);
494 if (!remote || !of_device_is_available(remote)) {
495 of_node_put(remote);
496 continue;
497 }
498
499 count += meson_probe_remote(pdev, &match, np, remote);
500 of_node_put(remote);
501 }
502
503 if (count && !match)
504 return meson_drv_bind_master(&pdev->dev, false);
505
506 /* If some endpoints were found, initialize the nodes */
507 if (count) {
508 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
509
510 return component_master_add_with_match(&pdev->dev,
511 &meson_drv_master_ops,
512 match);
513 }
514
515 /* If no output endpoints were available, simply bail out */
516 return 0;
517};
518
519static struct meson_drm_match_data meson_drm_gxbb_data = {
520 .compat = VPU_COMPATIBLE_GXBB,
521};
522
523static struct meson_drm_match_data meson_drm_gxl_data = {
524 .compat = VPU_COMPATIBLE_GXL,
525};
526
527static struct meson_drm_match_data meson_drm_gxm_data = {
528 .compat = VPU_COMPATIBLE_GXM,
529 .afbcd_ops = &meson_afbcd_gxm_ops,
530};
531
532static struct meson_drm_match_data meson_drm_g12a_data = {
533 .compat = VPU_COMPATIBLE_G12A,
534 .afbcd_ops = &meson_afbcd_g12a_ops,
535};
536
537static const struct of_device_id dt_match[] = {
538 { .compatible = "amlogic,meson-gxbb-vpu",
539 .data = (void *)&meson_drm_gxbb_data },
540 { .compatible = "amlogic,meson-gxl-vpu",
541 .data = (void *)&meson_drm_gxl_data },
542 { .compatible = "amlogic,meson-gxm-vpu",
543 .data = (void *)&meson_drm_gxm_data },
544 { .compatible = "amlogic,meson-g12a-vpu",
545 .data = (void *)&meson_drm_g12a_data },
546 {}
547};
548MODULE_DEVICE_TABLE(of, dt_match);
549
550static const struct dev_pm_ops meson_drv_pm_ops = {
551 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
552};
553
554static struct platform_driver meson_drm_platform_driver = {
555 .probe = meson_drv_probe,
556 .shutdown = meson_drv_shutdown,
557 .driver = {
558 .name = "meson-drm",
559 .of_match_table = dt_match,
560 .pm = &meson_drv_pm_ops,
561 },
562};
563
564module_platform_driver(meson_drm_platform_driver);
565
566MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
567MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
568MODULE_DESCRIPTION(DRIVER_DESC);
569MODULE_LICENSE("GPL");