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v4.10.11
  1/*
  2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
  3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
  4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
  5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
  6 * 0xcf8 PCI configuration read/write.
  7 *
  8 *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  9 *           Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
 10 *           Stefano Stabellini <stefano.stabellini@eu.citrix.com>
 11 */
 12#include <linux/export.h>
 13#include <linux/init.h>
 14#include <linux/pci.h>
 15#include <linux/acpi.h>
 16
 17#include <linux/io.h>
 18#include <asm/io_apic.h>
 19#include <asm/pci_x86.h>
 20
 21#include <asm/xen/hypervisor.h>
 22
 23#include <xen/features.h>
 24#include <xen/events.h>
 25#include <asm/xen/pci.h>
 26#include <asm/xen/cpuid.h>
 27#include <asm/apic.h>
 28#include <asm/i8259.h>
 29
 30static int xen_pcifront_enable_irq(struct pci_dev *dev)
 31{
 32	int rc;
 33	int share = 1;
 34	int pirq;
 35	u8 gsi;
 36
 37	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
 38	if (rc < 0) {
 39		dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
 40			 rc);
 41		return rc;
 42	}
 43	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
 44	pirq = gsi;
 45
 46	if (gsi < nr_legacy_irqs())
 47		share = 0;
 48
 49	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
 50	if (rc < 0) {
 51		dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
 52			 gsi, pirq, rc);
 53		return rc;
 54	}
 55
 56	dev->irq = rc;
 57	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
 58	return 0;
 59}
 60
 61#ifdef CONFIG_ACPI
 62static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
 63			     bool set_pirq)
 64{
 65	int rc, pirq = -1, irq = -1;
 66	struct physdev_map_pirq map_irq;
 67	int shareable = 0;
 68	char *name;
 69
 70	irq = xen_irq_from_gsi(gsi);
 71	if (irq > 0)
 72		return irq;
 73
 74	if (set_pirq)
 75		pirq = gsi;
 76
 77	map_irq.domid = DOMID_SELF;
 78	map_irq.type = MAP_PIRQ_TYPE_GSI;
 79	map_irq.index = gsi;
 80	map_irq.pirq = pirq;
 81
 82	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
 83	if (rc) {
 84		printk(KERN_WARNING "xen map irq failed %d\n", rc);
 85		return -1;
 86	}
 87
 88	if (triggering == ACPI_EDGE_SENSITIVE) {
 89		shareable = 0;
 90		name = "ioapic-edge";
 91	} else {
 92		shareable = 1;
 93		name = "ioapic-level";
 94	}
 95
 96	if (gsi_override >= 0)
 97		gsi = gsi_override;
 98
 99	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
100	if (irq < 0)
101		goto out;
102
103	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
104out:
105	return irq;
106}
107
108static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
109				     int trigger, int polarity)
110{
111	if (!xen_hvm_domain())
112		return -1;
113
114	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
115				 false /* no mapping of GSI to PIRQ */);
116}
117
118#ifdef CONFIG_XEN_DOM0
119static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
120{
121	int rc, irq;
122	struct physdev_setup_gsi setup_gsi;
123
124	if (!xen_pv_domain())
125		return -1;
126
127	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
128			gsi, triggering, polarity);
129
130	irq = xen_register_pirq(gsi, gsi_override, triggering, true);
131
132	setup_gsi.gsi = gsi;
133	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
134	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
135
136	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
137	if (rc == -EEXIST)
138		printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
139	else if (rc) {
140		printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
141				gsi, rc);
142	}
143
144	return irq;
145}
146
147static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
148				 int trigger, int polarity)
149{
150	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
151}
152#endif
153#endif
154
155#if defined(CONFIG_PCI_MSI)
156#include <linux/msi.h>
157#include <asm/msidef.h>
158
159struct xen_pci_frontend_ops *xen_pci_frontend;
160EXPORT_SYMBOL_GPL(xen_pci_frontend);
161
162static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
163{
164	int irq, ret, i;
165	struct msi_desc *msidesc;
166	int *v;
167
168	if (type == PCI_CAP_ID_MSI && nvec > 1)
169		return 1;
170
171	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
172	if (!v)
173		return -ENOMEM;
174
175	if (type == PCI_CAP_ID_MSIX)
176		ret = xen_pci_frontend_enable_msix(dev, v, nvec);
177	else
178		ret = xen_pci_frontend_enable_msi(dev, v);
179	if (ret)
180		goto error;
181	i = 0;
182	for_each_pci_msi_entry(msidesc, dev) {
183		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
184					       (type == PCI_CAP_ID_MSI) ? nvec : 1,
185					       (type == PCI_CAP_ID_MSIX) ?
186					       "pcifront-msi-x" :
187					       "pcifront-msi",
188						DOMID_SELF);
189		if (irq < 0) {
190			ret = irq;
191			goto free;
192		}
193		i++;
194	}
195	kfree(v);
196	return 0;
197
198error:
199	if (ret == -ENOSYS)
200		dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
201	else if (ret)
202		dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
203free:
204	kfree(v);
205	return ret;
206}
207
208#define XEN_PIRQ_MSI_DATA  (MSI_DATA_TRIGGER_EDGE | \
209		MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
210
211static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
212		struct msi_msg *msg)
213{
214	/* We set vector == 0 to tell the hypervisor we don't care about it,
215	 * but we want a pirq setup instead.
216	 * We use the dest_id field to pass the pirq that we want. */
217	msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
218	msg->address_lo =
219		MSI_ADDR_BASE_LO |
220		MSI_ADDR_DEST_MODE_PHYSICAL |
221		MSI_ADDR_REDIRECTION_CPU |
222		MSI_ADDR_DEST_ID(pirq);
223
224	msg->data = XEN_PIRQ_MSI_DATA;
225}
226
227static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
228{
229	int irq, pirq;
230	struct msi_desc *msidesc;
231	struct msi_msg msg;
232
233	if (type == PCI_CAP_ID_MSI && nvec > 1)
234		return 1;
235
236	for_each_pci_msi_entry(msidesc, dev) {
237		pirq = xen_allocate_pirq_msi(dev, msidesc);
238		if (pirq < 0) {
239			irq = -ENODEV;
240			goto error;
 
 
 
 
 
 
 
 
 
241		}
242		xen_msi_compose_msg(dev, pirq, &msg);
243		__pci_write_msi_msg(msidesc, &msg);
244		dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
245		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
246					       (type == PCI_CAP_ID_MSI) ? nvec : 1,
247					       (type == PCI_CAP_ID_MSIX) ?
248					       "msi-x" : "msi",
249					       DOMID_SELF);
250		if (irq < 0)
251			goto error;
252		dev_dbg(&dev->dev,
253			"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
254	}
255	return 0;
256
257error:
258	dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
259		type == PCI_CAP_ID_MSI ? "" : "-X", irq);
260	return irq;
261}
262
263#ifdef CONFIG_XEN_DOM0
264static bool __read_mostly pci_seg_supported = true;
265
266static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
267{
268	int ret = 0;
269	struct msi_desc *msidesc;
270
271	for_each_pci_msi_entry(msidesc, dev) {
272		struct physdev_map_pirq map_irq;
273		domid_t domid;
274
275		domid = ret = xen_find_device_domain_owner(dev);
276		/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
277		 * hence check ret value for < 0. */
278		if (ret < 0)
279			domid = DOMID_SELF;
280
281		memset(&map_irq, 0, sizeof(map_irq));
282		map_irq.domid = domid;
283		map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
284		map_irq.index = -1;
285		map_irq.pirq = -1;
286		map_irq.bus = dev->bus->number |
287			      (pci_domain_nr(dev->bus) << 16);
288		map_irq.devfn = dev->devfn;
289
290		if (type == PCI_CAP_ID_MSI && nvec > 1) {
291			map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
292			map_irq.entry_nr = nvec;
293		} else if (type == PCI_CAP_ID_MSIX) {
294			int pos;
295			unsigned long flags;
296			u32 table_offset, bir;
297
298			pos = dev->msix_cap;
 
299			pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
300					      &table_offset);
301			bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
302			flags = pci_resource_flags(dev, bir);
303			if (!flags || (flags & IORESOURCE_UNSET))
304				return -EINVAL;
305
306			map_irq.table_base = pci_resource_start(dev, bir);
307			map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
308		}
309
310		ret = -EINVAL;
311		if (pci_seg_supported)
312			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
313						    &map_irq);
314		if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
315			/*
316			 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
317			 * there's nothing else we can do in this case.
318			 * Just set ret > 0 so driver can retry with
319			 * single MSI.
320			 */
321			ret = 1;
322			goto out;
323		}
324		if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
325			map_irq.type = MAP_PIRQ_TYPE_MSI;
326			map_irq.index = -1;
327			map_irq.pirq = -1;
328			map_irq.bus = dev->bus->number;
329			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
330						    &map_irq);
331			if (ret != -EINVAL)
332				pci_seg_supported = false;
333		}
334		if (ret) {
335			dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
336				 ret, domid);
337			goto out;
338		}
339
340		ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
341		                               (type == PCI_CAP_ID_MSI) ? nvec : 1,
342		                               (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
343		                               domid);
 
344		if (ret < 0)
345			goto out;
346	}
347	ret = 0;
348out:
349	return ret;
350}
351
352static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
353{
354	int ret = 0;
355
356	if (pci_seg_supported) {
357		struct physdev_pci_device restore_ext;
358
359		restore_ext.seg = pci_domain_nr(dev->bus);
360		restore_ext.bus = dev->bus->number;
361		restore_ext.devfn = dev->devfn;
362		ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
363					&restore_ext);
364		if (ret == -ENOSYS)
365			pci_seg_supported = false;
366		WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
367	}
368	if (!pci_seg_supported) {
369		struct physdev_restore_msi restore;
370
371		restore.bus = dev->bus->number;
372		restore.devfn = dev->devfn;
373		ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
374		WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
375	}
376}
377#endif
378
379static void xen_teardown_msi_irqs(struct pci_dev *dev)
380{
381	struct msi_desc *msidesc;
382
383	msidesc = first_pci_msi_entry(dev);
384	if (msidesc->msi_attrib.is_msix)
385		xen_pci_frontend_disable_msix(dev);
386	else
387		xen_pci_frontend_disable_msi(dev);
388
389	/* Free the IRQ's and the msidesc using the generic code. */
390	default_teardown_msi_irqs(dev);
391}
392
393static void xen_teardown_msi_irq(unsigned int irq)
394{
395	xen_destroy_irq(irq);
396}
397
398#endif
399
400int __init pci_xen_init(void)
401{
402	if (!xen_pv_domain() || xen_initial_domain())
403		return -ENODEV;
404
405	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
406
407	pcibios_set_cache_line_size();
408
409	pcibios_enable_irq = xen_pcifront_enable_irq;
410	pcibios_disable_irq = NULL;
411
412#ifdef CONFIG_ACPI
413	/* Keep ACPI out of the picture */
414	acpi_noirq = 1;
415#endif
416
417#ifdef CONFIG_PCI_MSI
418	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
419	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
420	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
421	pci_msi_ignore_mask = 1;
422#endif
423	return 0;
424}
425
426#ifdef CONFIG_PCI_MSI
427void __init xen_msi_init(void)
428{
429	if (!disable_apic) {
430		/*
431		 * If hardware supports (x2)APIC virtualization (as indicated
432		 * by hypervisor's leaf 4) then we don't need to use pirqs/
433		 * event channels for MSI handling and instead use regular
434		 * APIC processing
435		 */
436		uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
437
438		if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
439		    ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
440			return;
441	}
442
443	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
444	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
445}
446#endif
447
448int __init pci_xen_hvm_init(void)
449{
450	if (!xen_feature(XENFEAT_hvm_pirqs))
451		return 0;
452
453#ifdef CONFIG_ACPI
454	/*
455	 * We don't want to change the actual ACPI delivery model,
456	 * just how GSIs get registered.
457	 */
458	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
459	__acpi_unregister_gsi = NULL;
460#endif
461
462#ifdef CONFIG_PCI_MSI
463	/*
464	 * We need to wait until after x2apic is initialized
465	 * before we can set MSI IRQ ops.
466	 */
467	x86_platform.apic_post_init = xen_msi_init;
468#endif
469	return 0;
470}
471
472#ifdef CONFIG_XEN_DOM0
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
473int __init pci_xen_initial_domain(void)
474{
475	int irq;
476
477#ifdef CONFIG_PCI_MSI
478	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
479	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
480	x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
481	pci_msi_ignore_mask = 1;
482#endif
 
483	__acpi_register_gsi = acpi_register_gsi_xen;
484	__acpi_unregister_gsi = NULL;
485	/*
486	 * Pre-allocate the legacy IRQs.  Use NR_LEGACY_IRQS here
487	 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
488	 */
489	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
490		int trigger, polarity;
491
492		if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
493			continue;
494
495		xen_register_pirq(irq, -1 /* no GSI override */,
496			trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
497			true /* Map GSI to PIRQ */);
498	}
499	if (0 == nr_ioapics) {
500		for (irq = 0; irq < nr_legacy_irqs(); irq++)
501			xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
502	}
503	return 0;
504}
505
506struct xen_device_domain_owner {
507	domid_t domain;
508	struct pci_dev *dev;
509	struct list_head list;
510};
511
512static DEFINE_SPINLOCK(dev_domain_list_spinlock);
513static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
514
515static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
516{
517	struct xen_device_domain_owner *owner;
518
519	list_for_each_entry(owner, &dev_domain_list, list) {
520		if (owner->dev == dev)
521			return owner;
522	}
523	return NULL;
524}
525
526int xen_find_device_domain_owner(struct pci_dev *dev)
527{
528	struct xen_device_domain_owner *owner;
529	int domain = -ENODEV;
530
531	spin_lock(&dev_domain_list_spinlock);
532	owner = find_device(dev);
533	if (owner)
534		domain = owner->domain;
535	spin_unlock(&dev_domain_list_spinlock);
536	return domain;
537}
538EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
539
540int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
541{
542	struct xen_device_domain_owner *owner;
543
544	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
545	if (!owner)
546		return -ENODEV;
547
548	spin_lock(&dev_domain_list_spinlock);
549	if (find_device(dev)) {
550		spin_unlock(&dev_domain_list_spinlock);
551		kfree(owner);
552		return -EEXIST;
553	}
554	owner->domain = domain;
555	owner->dev = dev;
556	list_add_tail(&owner->list, &dev_domain_list);
557	spin_unlock(&dev_domain_list_spinlock);
558	return 0;
559}
560EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
561
562int xen_unregister_device_domain_owner(struct pci_dev *dev)
563{
564	struct xen_device_domain_owner *owner;
565
566	spin_lock(&dev_domain_list_spinlock);
567	owner = find_device(dev);
568	if (!owner) {
569		spin_unlock(&dev_domain_list_spinlock);
570		return -ENODEV;
571	}
572	list_del(&owner->list);
573	spin_unlock(&dev_domain_list_spinlock);
574	kfree(owner);
575	return 0;
576}
577EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
578#endif
v3.5.6
  1/*
  2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
  3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
  4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
  5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
  6 * 0xcf8 PCI configuration read/write.
  7 *
  8 *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  9 *           Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
 10 *           Stefano Stabellini <stefano.stabellini@eu.citrix.com>
 11 */
 12#include <linux/module.h>
 13#include <linux/init.h>
 14#include <linux/pci.h>
 15#include <linux/acpi.h>
 16
 17#include <linux/io.h>
 18#include <asm/io_apic.h>
 19#include <asm/pci_x86.h>
 20
 21#include <asm/xen/hypervisor.h>
 22
 23#include <xen/features.h>
 24#include <xen/events.h>
 25#include <asm/xen/pci.h>
 
 
 
 26
 27static int xen_pcifront_enable_irq(struct pci_dev *dev)
 28{
 29	int rc;
 30	int share = 1;
 31	int pirq;
 32	u8 gsi;
 33
 34	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
 35	if (rc < 0) {
 36		dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
 37			 rc);
 38		return rc;
 39	}
 40	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
 41	pirq = gsi;
 42
 43	if (gsi < NR_IRQS_LEGACY)
 44		share = 0;
 45
 46	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
 47	if (rc < 0) {
 48		dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
 49			 gsi, pirq, rc);
 50		return rc;
 51	}
 52
 53	dev->irq = rc;
 54	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
 55	return 0;
 56}
 57
 58#ifdef CONFIG_ACPI
 59static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
 60			     bool set_pirq)
 61{
 62	int rc, pirq = -1, irq = -1;
 63	struct physdev_map_pirq map_irq;
 64	int shareable = 0;
 65	char *name;
 66
 67	irq = xen_irq_from_gsi(gsi);
 68	if (irq > 0)
 69		return irq;
 70
 71	if (set_pirq)
 72		pirq = gsi;
 73
 74	map_irq.domid = DOMID_SELF;
 75	map_irq.type = MAP_PIRQ_TYPE_GSI;
 76	map_irq.index = gsi;
 77	map_irq.pirq = pirq;
 78
 79	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
 80	if (rc) {
 81		printk(KERN_WARNING "xen map irq failed %d\n", rc);
 82		return -1;
 83	}
 84
 85	if (triggering == ACPI_EDGE_SENSITIVE) {
 86		shareable = 0;
 87		name = "ioapic-edge";
 88	} else {
 89		shareable = 1;
 90		name = "ioapic-level";
 91	}
 92
 93	if (gsi_override >= 0)
 94		gsi = gsi_override;
 95
 96	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
 97	if (irq < 0)
 98		goto out;
 99
100	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
101out:
102	return irq;
103}
104
105static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
106				     int trigger, int polarity)
107{
108	if (!xen_hvm_domain())
109		return -1;
110
111	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
112				 false /* no mapping of GSI to PIRQ */);
113}
114
115#ifdef CONFIG_XEN_DOM0
116static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
117{
118	int rc, irq;
119	struct physdev_setup_gsi setup_gsi;
120
121	if (!xen_pv_domain())
122		return -1;
123
124	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
125			gsi, triggering, polarity);
126
127	irq = xen_register_pirq(gsi, gsi_override, triggering, true);
128
129	setup_gsi.gsi = gsi;
130	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
131	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
132
133	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
134	if (rc == -EEXIST)
135		printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
136	else if (rc) {
137		printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
138				gsi, rc);
139	}
140
141	return irq;
142}
143
144static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
145				 int trigger, int polarity)
146{
147	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
148}
149#endif
150#endif
151
152#if defined(CONFIG_PCI_MSI)
153#include <linux/msi.h>
154#include <asm/msidef.h>
155
156struct xen_pci_frontend_ops *xen_pci_frontend;
157EXPORT_SYMBOL_GPL(xen_pci_frontend);
158
159static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
160{
161	int irq, ret, i;
162	struct msi_desc *msidesc;
163	int *v;
164
 
 
 
165	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
166	if (!v)
167		return -ENOMEM;
168
169	if (type == PCI_CAP_ID_MSIX)
170		ret = xen_pci_frontend_enable_msix(dev, v, nvec);
171	else
172		ret = xen_pci_frontend_enable_msi(dev, v);
173	if (ret)
174		goto error;
175	i = 0;
176	list_for_each_entry(msidesc, &dev->msi_list, list) {
177		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
 
178					       (type == PCI_CAP_ID_MSIX) ?
179					       "pcifront-msi-x" :
180					       "pcifront-msi",
181						DOMID_SELF);
182		if (irq < 0) {
183			ret = irq;
184			goto free;
185		}
186		i++;
187	}
188	kfree(v);
189	return 0;
190
191error:
192	dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
 
 
 
193free:
194	kfree(v);
195	return ret;
196}
197
198#define XEN_PIRQ_MSI_DATA  (MSI_DATA_TRIGGER_EDGE | \
199		MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
200
201static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
202		struct msi_msg *msg)
203{
204	/* We set vector == 0 to tell the hypervisor we don't care about it,
205	 * but we want a pirq setup instead.
206	 * We use the dest_id field to pass the pirq that we want. */
207	msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
208	msg->address_lo =
209		MSI_ADDR_BASE_LO |
210		MSI_ADDR_DEST_MODE_PHYSICAL |
211		MSI_ADDR_REDIRECTION_CPU |
212		MSI_ADDR_DEST_ID(pirq);
213
214	msg->data = XEN_PIRQ_MSI_DATA;
215}
216
217static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
218{
219	int irq, pirq;
220	struct msi_desc *msidesc;
221	struct msi_msg msg;
222
223	list_for_each_entry(msidesc, &dev->msi_list, list) {
224		__read_msi_msg(msidesc, &msg);
225		pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
226			((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
227		if (msg.data != XEN_PIRQ_MSI_DATA ||
228		    xen_irq_from_pirq(pirq) < 0) {
229			pirq = xen_allocate_pirq_msi(dev, msidesc);
230			if (pirq < 0) {
231				irq = -ENODEV;
232				goto error;
233			}
234			xen_msi_compose_msg(dev, pirq, &msg);
235			__write_msi_msg(msidesc, &msg);
236			dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
237		} else {
238			dev_dbg(&dev->dev,
239				"xen: msi already bound to pirq=%d\n", pirq);
240		}
241		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
 
 
 
 
242					       (type == PCI_CAP_ID_MSIX) ?
243					       "msi-x" : "msi",
244					       DOMID_SELF);
245		if (irq < 0)
246			goto error;
247		dev_dbg(&dev->dev,
248			"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
249	}
250	return 0;
251
252error:
253	dev_err(&dev->dev,
254		"Xen PCI frontend has not registered MSI/MSI-X support!\n");
255	return irq;
256}
257
258#ifdef CONFIG_XEN_DOM0
259static bool __read_mostly pci_seg_supported = true;
260
261static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
262{
263	int ret = 0;
264	struct msi_desc *msidesc;
265
266	list_for_each_entry(msidesc, &dev->msi_list, list) {
267		struct physdev_map_pirq map_irq;
268		domid_t domid;
269
270		domid = ret = xen_find_device_domain_owner(dev);
271		/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
272		 * hence check ret value for < 0. */
273		if (ret < 0)
274			domid = DOMID_SELF;
275
276		memset(&map_irq, 0, sizeof(map_irq));
277		map_irq.domid = domid;
278		map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
279		map_irq.index = -1;
280		map_irq.pirq = -1;
281		map_irq.bus = dev->bus->number |
282			      (pci_domain_nr(dev->bus) << 16);
283		map_irq.devfn = dev->devfn;
284
285		if (type == PCI_CAP_ID_MSIX) {
 
 
 
286			int pos;
 
287			u32 table_offset, bir;
288
289			pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
290
291			pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
292					      &table_offset);
293			bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
 
 
 
294
295			map_irq.table_base = pci_resource_start(dev, bir);
296			map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
297		}
298
299		ret = -EINVAL;
300		if (pci_seg_supported)
301			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
302						    &map_irq);
 
 
 
 
 
 
 
 
 
 
303		if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
304			map_irq.type = MAP_PIRQ_TYPE_MSI;
305			map_irq.index = -1;
306			map_irq.pirq = -1;
307			map_irq.bus = dev->bus->number;
308			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
309						    &map_irq);
310			if (ret != -EINVAL)
311				pci_seg_supported = false;
312		}
313		if (ret) {
314			dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
315				 ret, domid);
316			goto out;
317		}
318
319		ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
320					       map_irq.pirq, map_irq.index,
321					       (type == PCI_CAP_ID_MSIX) ?
322					       "msi-x" : "msi",
323						domid);
324		if (ret < 0)
325			goto out;
326	}
327	ret = 0;
328out:
329	return ret;
330}
331
332static void xen_initdom_restore_msi_irqs(struct pci_dev *dev, int irq)
333{
334	int ret = 0;
335
336	if (pci_seg_supported) {
337		struct physdev_pci_device restore_ext;
338
339		restore_ext.seg = pci_domain_nr(dev->bus);
340		restore_ext.bus = dev->bus->number;
341		restore_ext.devfn = dev->devfn;
342		ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
343					&restore_ext);
344		if (ret == -ENOSYS)
345			pci_seg_supported = false;
346		WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
347	}
348	if (!pci_seg_supported) {
349		struct physdev_restore_msi restore;
350
351		restore.bus = dev->bus->number;
352		restore.devfn = dev->devfn;
353		ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
354		WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
355	}
356}
357#endif
358
359static void xen_teardown_msi_irqs(struct pci_dev *dev)
360{
361	struct msi_desc *msidesc;
362
363	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
364	if (msidesc->msi_attrib.is_msix)
365		xen_pci_frontend_disable_msix(dev);
366	else
367		xen_pci_frontend_disable_msi(dev);
368
369	/* Free the IRQ's and the msidesc using the generic code. */
370	default_teardown_msi_irqs(dev);
371}
372
373static void xen_teardown_msi_irq(unsigned int irq)
374{
375	xen_destroy_irq(irq);
376}
377
378#endif
379
380int __init pci_xen_init(void)
381{
382	if (!xen_pv_domain() || xen_initial_domain())
383		return -ENODEV;
384
385	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
386
387	pcibios_set_cache_line_size();
388
389	pcibios_enable_irq = xen_pcifront_enable_irq;
390	pcibios_disable_irq = NULL;
391
392#ifdef CONFIG_ACPI
393	/* Keep ACPI out of the picture */
394	acpi_noirq = 1;
395#endif
396
397#ifdef CONFIG_PCI_MSI
398	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
399	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
400	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
 
401#endif
402	return 0;
403}
404
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
405int __init pci_xen_hvm_init(void)
406{
407	if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
408		return 0;
409
410#ifdef CONFIG_ACPI
411	/*
412	 * We don't want to change the actual ACPI delivery model,
413	 * just how GSIs get registered.
414	 */
415	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
 
416#endif
417
418#ifdef CONFIG_PCI_MSI
419	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
420	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
 
 
 
421#endif
422	return 0;
423}
424
425#ifdef CONFIG_XEN_DOM0
426static __init void xen_setup_acpi_sci(void)
427{
428	int rc;
429	int trigger, polarity;
430	int gsi = acpi_sci_override_gsi;
431	int irq = -1;
432	int gsi_override = -1;
433
434	if (!gsi)
435		return;
436
437	rc = acpi_get_override_irq(gsi, &trigger, &polarity);
438	if (rc) {
439		printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
440				" sci, rc=%d\n", rc);
441		return;
442	}
443	trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
444	polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
445
446	printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
447			"polarity=%d\n", gsi, trigger, polarity);
448
449	/* Before we bind the GSI to a Linux IRQ, check whether
450	 * we need to override it with bus_irq (IRQ) value. Usually for
451	 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
452	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
453	 * but there are oddballs where the IRQ != GSI:
454	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
455	 * which ends up being: gsi_to_irq[9] == 20
456	 * (which is what acpi_gsi_to_irq ends up calling when starting the
457	 * the ACPI interpreter and keels over since IRQ 9 has not been
458	 * setup as we had setup IRQ 20 for it).
459	 */
460	if (acpi_gsi_to_irq(gsi, &irq) == 0) {
461		/* Use the provided value if it's valid. */
462		if (irq >= 0)
463			gsi_override = irq;
464	}
465
466	gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
467	printk(KERN_INFO "xen: acpi sci %d\n", gsi);
468
469	return;
470}
471
472int __init pci_xen_initial_domain(void)
473{
474	int irq;
475
476#ifdef CONFIG_PCI_MSI
477	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
478	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
479	x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
 
480#endif
481	xen_setup_acpi_sci();
482	__acpi_register_gsi = acpi_register_gsi_xen;
483	/* Pre-allocate legacy irqs */
 
 
 
 
484	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
485		int trigger, polarity;
486
487		if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
488			continue;
489
490		xen_register_pirq(irq, -1 /* no GSI override */,
491			trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
492			true /* Map GSI to PIRQ */);
493	}
494	if (0 == nr_ioapics) {
495		for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
496			xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
497	}
498	return 0;
499}
500
501struct xen_device_domain_owner {
502	domid_t domain;
503	struct pci_dev *dev;
504	struct list_head list;
505};
506
507static DEFINE_SPINLOCK(dev_domain_list_spinlock);
508static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
509
510static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
511{
512	struct xen_device_domain_owner *owner;
513
514	list_for_each_entry(owner, &dev_domain_list, list) {
515		if (owner->dev == dev)
516			return owner;
517	}
518	return NULL;
519}
520
521int xen_find_device_domain_owner(struct pci_dev *dev)
522{
523	struct xen_device_domain_owner *owner;
524	int domain = -ENODEV;
525
526	spin_lock(&dev_domain_list_spinlock);
527	owner = find_device(dev);
528	if (owner)
529		domain = owner->domain;
530	spin_unlock(&dev_domain_list_spinlock);
531	return domain;
532}
533EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
534
535int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
536{
537	struct xen_device_domain_owner *owner;
538
539	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
540	if (!owner)
541		return -ENODEV;
542
543	spin_lock(&dev_domain_list_spinlock);
544	if (find_device(dev)) {
545		spin_unlock(&dev_domain_list_spinlock);
546		kfree(owner);
547		return -EEXIST;
548	}
549	owner->domain = domain;
550	owner->dev = dev;
551	list_add_tail(&owner->list, &dev_domain_list);
552	spin_unlock(&dev_domain_list_spinlock);
553	return 0;
554}
555EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
556
557int xen_unregister_device_domain_owner(struct pci_dev *dev)
558{
559	struct xen_device_domain_owner *owner;
560
561	spin_lock(&dev_domain_list_spinlock);
562	owner = find_device(dev);
563	if (!owner) {
564		spin_unlock(&dev_domain_list_spinlock);
565		return -ENODEV;
566	}
567	list_del(&owner->list);
568	spin_unlock(&dev_domain_list_spinlock);
569	kfree(owner);
570	return 0;
571}
572EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
573#endif