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1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
37#include <linux/smp.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <asm/msr.h>
41#include <asm/processor.h>
42#include <asm/cpu_device_id.h>
43
44#define DRVNAME "coretemp"
45
46/*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50static int force_tjmax;
51module_param_named(tjmax, force_tjmax, int, 0444);
52MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
54#define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */
55#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
56#define NUM_REAL_CORES 128 /* Number of Real cores per cpu */
57#define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
58#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
59#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
60#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
61
62#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65#ifdef CONFIG_SMP
66#define for_each_sibling(i, cpu) \
67 for_each_cpu(i, topology_sibling_cpumask(cpu))
68#else
69#define for_each_sibling(i, cpu) for (i = 0; false; )
70#endif
71
72/*
73 * Per-Core Temperature Data
74 * @last_updated: The time when the current temperature value was updated
75 * earlier (in jiffies).
76 * @cpu_core_id: The CPU Core from which temperature values should be read
77 * This value is passed as "id" field to rdmsr/wrmsr functions.
78 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
79 * from where the temperature values should be read.
80 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
81 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
82 * Otherwise, temp_data holds coretemp data.
83 * @valid: If this is 1, the current temperature is valid.
84 */
85struct temp_data {
86 int temp;
87 int ttarget;
88 int tjmax;
89 unsigned long last_updated;
90 unsigned int cpu;
91 u32 cpu_core_id;
92 u32 status_reg;
93 int attr_size;
94 bool is_pkg_data;
95 bool valid;
96 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
97 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
98 struct attribute *attrs[TOTAL_ATTRS + 1];
99 struct attribute_group attr_group;
100 struct mutex update_lock;
101};
102
103/* Platform Data per Physical CPU */
104struct platform_data {
105 struct device *hwmon_dev;
106 u16 pkg_id;
107 struct cpumask cpumask;
108 struct temp_data *core_data[MAX_CORE_DATA];
109 struct device_attribute name_attr;
110};
111
112/* Keep track of how many package pointers we allocated in init() */
113static int max_packages __read_mostly;
114/* Array of package pointers. Serialized by cpu hotplug lock */
115static struct platform_device **pkg_devices;
116
117static ssize_t show_label(struct device *dev,
118 struct device_attribute *devattr, char *buf)
119{
120 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
121 struct platform_data *pdata = dev_get_drvdata(dev);
122 struct temp_data *tdata = pdata->core_data[attr->index];
123
124 if (tdata->is_pkg_data)
125 return sprintf(buf, "Package id %u\n", pdata->pkg_id);
126
127 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
128}
129
130static ssize_t show_crit_alarm(struct device *dev,
131 struct device_attribute *devattr, char *buf)
132{
133 u32 eax, edx;
134 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
135 struct platform_data *pdata = dev_get_drvdata(dev);
136 struct temp_data *tdata = pdata->core_data[attr->index];
137
138 mutex_lock(&tdata->update_lock);
139 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
140 mutex_unlock(&tdata->update_lock);
141
142 return sprintf(buf, "%d\n", (eax >> 5) & 1);
143}
144
145static ssize_t show_tjmax(struct device *dev,
146 struct device_attribute *devattr, char *buf)
147{
148 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
149 struct platform_data *pdata = dev_get_drvdata(dev);
150
151 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
152}
153
154static ssize_t show_ttarget(struct device *dev,
155 struct device_attribute *devattr, char *buf)
156{
157 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
158 struct platform_data *pdata = dev_get_drvdata(dev);
159
160 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
161}
162
163static ssize_t show_temp(struct device *dev,
164 struct device_attribute *devattr, char *buf)
165{
166 u32 eax, edx;
167 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
168 struct platform_data *pdata = dev_get_drvdata(dev);
169 struct temp_data *tdata = pdata->core_data[attr->index];
170
171 mutex_lock(&tdata->update_lock);
172
173 /* Check whether the time interval has elapsed */
174 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
175 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
176 /*
177 * Ignore the valid bit. In all observed cases the register
178 * value is either low or zero if the valid bit is 0.
179 * Return it instead of reporting an error which doesn't
180 * really help at all.
181 */
182 tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
183 tdata->valid = 1;
184 tdata->last_updated = jiffies;
185 }
186
187 mutex_unlock(&tdata->update_lock);
188 return sprintf(buf, "%d\n", tdata->temp);
189}
190
191struct tjmax_pci {
192 unsigned int device;
193 int tjmax;
194};
195
196static const struct tjmax_pci tjmax_pci_table[] = {
197 { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
198 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
199 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
200 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
201};
202
203struct tjmax {
204 char const *id;
205 int tjmax;
206};
207
208static const struct tjmax tjmax_table[] = {
209 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
210 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
211};
212
213struct tjmax_model {
214 u8 model;
215 u8 mask;
216 int tjmax;
217};
218
219#define ANY 0xff
220
221static const struct tjmax_model tjmax_model_table[] = {
222 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
223 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
224 * Note: Also matches 230 and 330,
225 * which are covered by tjmax_table
226 */
227 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
228 * Note: TjMax for E6xxT is 110C, but CPU type
229 * is undetectable by software
230 */
231 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
232 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
233 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
234 * Also matches S12x0 (stepping 9), covered by
235 * PCI table
236 */
237};
238
239static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
240{
241 /* The 100C is default for both mobile and non mobile CPUs */
242
243 int tjmax = 100000;
244 int tjmax_ee = 85000;
245 int usemsr_ee = 1;
246 int err;
247 u32 eax, edx;
248 int i;
249 struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
250
251 /*
252 * Explicit tjmax table entries override heuristics.
253 * First try PCI host bridge IDs, followed by model ID strings
254 * and model/stepping information.
255 */
256 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
257 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
258 if (host_bridge->device == tjmax_pci_table[i].device)
259 return tjmax_pci_table[i].tjmax;
260 }
261 }
262
263 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
264 if (strstr(c->x86_model_id, tjmax_table[i].id))
265 return tjmax_table[i].tjmax;
266 }
267
268 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
269 const struct tjmax_model *tm = &tjmax_model_table[i];
270 if (c->x86_model == tm->model &&
271 (tm->mask == ANY || c->x86_mask == tm->mask))
272 return tm->tjmax;
273 }
274
275 /* Early chips have no MSR for TjMax */
276
277 if (c->x86_model == 0xf && c->x86_mask < 4)
278 usemsr_ee = 0;
279
280 if (c->x86_model > 0xe && usemsr_ee) {
281 u8 platform_id;
282
283 /*
284 * Now we can detect the mobile CPU using Intel provided table
285 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
286 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
287 */
288 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
289 if (err) {
290 dev_warn(dev,
291 "Unable to access MSR 0x17, assuming desktop"
292 " CPU\n");
293 usemsr_ee = 0;
294 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
295 /*
296 * Trust bit 28 up to Penryn, I could not find any
297 * documentation on that; if you happen to know
298 * someone at Intel please ask
299 */
300 usemsr_ee = 0;
301 } else {
302 /* Platform ID bits 52:50 (EDX starts at bit 32) */
303 platform_id = (edx >> 18) & 0x7;
304
305 /*
306 * Mobile Penryn CPU seems to be platform ID 7 or 5
307 * (guesswork)
308 */
309 if (c->x86_model == 0x17 &&
310 (platform_id == 5 || platform_id == 7)) {
311 /*
312 * If MSR EE bit is set, set it to 90 degrees C,
313 * otherwise 105 degrees C
314 */
315 tjmax_ee = 90000;
316 tjmax = 105000;
317 }
318 }
319 }
320
321 if (usemsr_ee) {
322 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
323 if (err) {
324 dev_warn(dev,
325 "Unable to access MSR 0xEE, for Tjmax, left"
326 " at default\n");
327 } else if (eax & 0x40000000) {
328 tjmax = tjmax_ee;
329 }
330 } else if (tjmax == 100000) {
331 /*
332 * If we don't use msr EE it means we are desktop CPU
333 * (with exeception of Atom)
334 */
335 dev_warn(dev, "Using relative temperature scale!\n");
336 }
337
338 return tjmax;
339}
340
341static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
342{
343 u8 model = c->x86_model;
344
345 return model > 0xe &&
346 model != 0x1c &&
347 model != 0x26 &&
348 model != 0x27 &&
349 model != 0x35 &&
350 model != 0x36;
351}
352
353static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
354{
355 int err;
356 u32 eax, edx;
357 u32 val;
358
359 /*
360 * A new feature of current Intel(R) processors, the
361 * IA32_TEMPERATURE_TARGET contains the TjMax value
362 */
363 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
364 if (err) {
365 if (cpu_has_tjmax(c))
366 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
367 } else {
368 val = (eax >> 16) & 0xff;
369 /*
370 * If the TjMax is not plausible, an assumption
371 * will be used
372 */
373 if (val) {
374 dev_dbg(dev, "TjMax is %d degrees C\n", val);
375 return val * 1000;
376 }
377 }
378
379 if (force_tjmax) {
380 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
381 force_tjmax);
382 return force_tjmax * 1000;
383 }
384
385 /*
386 * An assumption is made for early CPUs and unreadable MSR.
387 * NOTE: the calculated value may not be correct.
388 */
389 return adjust_tjmax(c, id, dev);
390}
391
392static int create_core_attrs(struct temp_data *tdata, struct device *dev,
393 int attr_no)
394{
395 int i;
396 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
397 struct device_attribute *devattr, char *buf) = {
398 show_label, show_crit_alarm, show_temp, show_tjmax,
399 show_ttarget };
400 static const char *const suffixes[TOTAL_ATTRS] = {
401 "label", "crit_alarm", "input", "crit", "max"
402 };
403
404 for (i = 0; i < tdata->attr_size; i++) {
405 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
406 "temp%d_%s", attr_no, suffixes[i]);
407 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
408 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
409 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
410 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
411 tdata->sd_attrs[i].index = attr_no;
412 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
413 }
414 tdata->attr_group.attrs = tdata->attrs;
415 return sysfs_create_group(&dev->kobj, &tdata->attr_group);
416}
417
418
419static int chk_ucode_version(unsigned int cpu)
420{
421 struct cpuinfo_x86 *c = &cpu_data(cpu);
422
423 /*
424 * Check if we have problem with errata AE18 of Core processors:
425 * Readings might stop update when processor visited too deep sleep,
426 * fixed for stepping D0 (6EC).
427 */
428 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
429 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
430 return -ENODEV;
431 }
432 return 0;
433}
434
435static struct platform_device *coretemp_get_pdev(unsigned int cpu)
436{
437 int pkgid = topology_logical_package_id(cpu);
438
439 if (pkgid >= 0 && pkgid < max_packages)
440 return pkg_devices[pkgid];
441 return NULL;
442}
443
444static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
445{
446 struct temp_data *tdata;
447
448 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
449 if (!tdata)
450 return NULL;
451
452 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
453 MSR_IA32_THERM_STATUS;
454 tdata->is_pkg_data = pkg_flag;
455 tdata->cpu = cpu;
456 tdata->cpu_core_id = TO_CORE_ID(cpu);
457 tdata->attr_size = MAX_CORE_ATTRS;
458 mutex_init(&tdata->update_lock);
459 return tdata;
460}
461
462static int create_core_data(struct platform_device *pdev, unsigned int cpu,
463 int pkg_flag)
464{
465 struct temp_data *tdata;
466 struct platform_data *pdata = platform_get_drvdata(pdev);
467 struct cpuinfo_x86 *c = &cpu_data(cpu);
468 u32 eax, edx;
469 int err, attr_no;
470
471 /*
472 * Find attr number for sysfs:
473 * We map the attr number to core id of the CPU
474 * The attr number is always core id + 2
475 * The Pkgtemp will always show up as temp1_*, if available
476 */
477 attr_no = pkg_flag ? PKG_SYSFS_ATTR_NO : TO_ATTR_NO(cpu);
478
479 if (attr_no > MAX_CORE_DATA - 1)
480 return -ERANGE;
481
482 tdata = init_temp_data(cpu, pkg_flag);
483 if (!tdata)
484 return -ENOMEM;
485
486 /* Test if we can access the status register */
487 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
488 if (err)
489 goto exit_free;
490
491 /* We can access status register. Get Critical Temperature */
492 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
493
494 /*
495 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
496 * The target temperature is available on older CPUs but not in this
497 * register. Atoms don't have the register at all.
498 */
499 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
500 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
501 &eax, &edx);
502 if (!err) {
503 tdata->ttarget
504 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
505 tdata->attr_size++;
506 }
507 }
508
509 pdata->core_data[attr_no] = tdata;
510
511 /* Create sysfs interfaces */
512 err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
513 if (err)
514 goto exit_free;
515
516 return 0;
517exit_free:
518 pdata->core_data[attr_no] = NULL;
519 kfree(tdata);
520 return err;
521}
522
523static void
524coretemp_add_core(struct platform_device *pdev, unsigned int cpu, int pkg_flag)
525{
526 if (create_core_data(pdev, cpu, pkg_flag))
527 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
528}
529
530static void coretemp_remove_core(struct platform_data *pdata, int indx)
531{
532 struct temp_data *tdata = pdata->core_data[indx];
533
534 /* Remove the sysfs attributes */
535 sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
536
537 kfree(pdata->core_data[indx]);
538 pdata->core_data[indx] = NULL;
539}
540
541static int coretemp_probe(struct platform_device *pdev)
542{
543 struct device *dev = &pdev->dev;
544 struct platform_data *pdata;
545
546 /* Initialize the per-package data structures */
547 pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL);
548 if (!pdata)
549 return -ENOMEM;
550
551 pdata->pkg_id = pdev->id;
552 platform_set_drvdata(pdev, pdata);
553
554 pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME,
555 pdata, NULL);
556 return PTR_ERR_OR_ZERO(pdata->hwmon_dev);
557}
558
559static int coretemp_remove(struct platform_device *pdev)
560{
561 struct platform_data *pdata = platform_get_drvdata(pdev);
562 int i;
563
564 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
565 if (pdata->core_data[i])
566 coretemp_remove_core(pdata, i);
567
568 return 0;
569}
570
571static struct platform_driver coretemp_driver = {
572 .driver = {
573 .name = DRVNAME,
574 },
575 .probe = coretemp_probe,
576 .remove = coretemp_remove,
577};
578
579static struct platform_device *coretemp_device_add(unsigned int cpu)
580{
581 int err, pkgid = topology_logical_package_id(cpu);
582 struct platform_device *pdev;
583
584 if (pkgid < 0)
585 return ERR_PTR(-ENOMEM);
586
587 pdev = platform_device_alloc(DRVNAME, pkgid);
588 if (!pdev)
589 return ERR_PTR(-ENOMEM);
590
591 err = platform_device_add(pdev);
592 if (err) {
593 platform_device_put(pdev);
594 return ERR_PTR(err);
595 }
596
597 pkg_devices[pkgid] = pdev;
598 return pdev;
599}
600
601static int coretemp_cpu_online(unsigned int cpu)
602{
603 struct platform_device *pdev = coretemp_get_pdev(cpu);
604 struct cpuinfo_x86 *c = &cpu_data(cpu);
605 struct platform_data *pdata;
606
607 /*
608 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
609 * sensors. We check this bit only, all the early CPUs
610 * without thermal sensors will be filtered out.
611 */
612 if (!cpu_has(c, X86_FEATURE_DTHERM))
613 return -ENODEV;
614
615 if (!pdev) {
616 /* Check the microcode version of the CPU */
617 if (chk_ucode_version(cpu))
618 return -EINVAL;
619
620 /*
621 * Alright, we have DTS support.
622 * We are bringing the _first_ core in this pkg
623 * online. So, initialize per-pkg data structures and
624 * then bring this core online.
625 */
626 pdev = coretemp_device_add(cpu);
627 if (IS_ERR(pdev))
628 return PTR_ERR(pdev);
629
630 /*
631 * Check whether pkgtemp support is available.
632 * If so, add interfaces for pkgtemp.
633 */
634 if (cpu_has(c, X86_FEATURE_PTS))
635 coretemp_add_core(pdev, cpu, 1);
636 }
637
638 pdata = platform_get_drvdata(pdev);
639 /*
640 * Check whether a thread sibling is already online. If not add the
641 * interface for this CPU core.
642 */
643 if (!cpumask_intersects(&pdata->cpumask, topology_sibling_cpumask(cpu)))
644 coretemp_add_core(pdev, cpu, 0);
645
646 cpumask_set_cpu(cpu, &pdata->cpumask);
647 return 0;
648}
649
650static int coretemp_cpu_offline(unsigned int cpu)
651{
652 struct platform_device *pdev = coretemp_get_pdev(cpu);
653 struct platform_data *pd;
654 struct temp_data *tdata;
655 int indx, target;
656
657 /* If the physical CPU device does not exist, just return */
658 if (!pdev)
659 return 0;
660
661 /* The core id is too big, just return */
662 indx = TO_ATTR_NO(cpu);
663 if (indx > MAX_CORE_DATA - 1)
664 return 0;
665
666 pd = platform_get_drvdata(pdev);
667 tdata = pd->core_data[indx];
668
669 cpumask_clear_cpu(cpu, &pd->cpumask);
670
671 /*
672 * If this is the last thread sibling, remove the CPU core
673 * interface, If there is still a sibling online, transfer the
674 * target cpu of that core interface to it.
675 */
676 target = cpumask_any_and(&pd->cpumask, topology_sibling_cpumask(cpu));
677 if (target >= nr_cpu_ids) {
678 coretemp_remove_core(pd, indx);
679 } else if (tdata && tdata->cpu == cpu) {
680 mutex_lock(&tdata->update_lock);
681 tdata->cpu = target;
682 mutex_unlock(&tdata->update_lock);
683 }
684
685 /*
686 * If all cores in this pkg are offline, remove the device. This
687 * will invoke the platform driver remove function, which cleans up
688 * the rest.
689 */
690 if (cpumask_empty(&pd->cpumask)) {
691 pkg_devices[topology_logical_package_id(cpu)] = NULL;
692 platform_device_unregister(pdev);
693 return 0;
694 }
695
696 /*
697 * Check whether this core is the target for the package
698 * interface. We need to assign it to some other cpu.
699 */
700 tdata = pd->core_data[PKG_SYSFS_ATTR_NO];
701 if (tdata && tdata->cpu == cpu) {
702 target = cpumask_first(&pd->cpumask);
703 mutex_lock(&tdata->update_lock);
704 tdata->cpu = target;
705 mutex_unlock(&tdata->update_lock);
706 }
707 return 0;
708}
709static const struct x86_cpu_id __initconst coretemp_ids[] = {
710 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
711 {}
712};
713MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
714
715static enum cpuhp_state coretemp_hp_online;
716
717static int __init coretemp_init(void)
718{
719 int err;
720
721 /*
722 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
723 * sensors. We check this bit only, all the early CPUs
724 * without thermal sensors will be filtered out.
725 */
726 if (!x86_match_cpu(coretemp_ids))
727 return -ENODEV;
728
729 max_packages = topology_max_packages();
730 pkg_devices = kzalloc(max_packages * sizeof(struct platform_device *),
731 GFP_KERNEL);
732 if (!pkg_devices)
733 return -ENOMEM;
734
735 err = platform_driver_register(&coretemp_driver);
736 if (err)
737 return err;
738
739 err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "hwmon/coretemp:online",
740 coretemp_cpu_online, coretemp_cpu_offline);
741 if (err < 0)
742 goto outdrv;
743 coretemp_hp_online = err;
744 return 0;
745
746outdrv:
747 platform_driver_unregister(&coretemp_driver);
748 kfree(pkg_devices);
749 return err;
750}
751module_init(coretemp_init)
752
753static void __exit coretemp_exit(void)
754{
755 cpuhp_remove_state(coretemp_hp_online);
756 platform_driver_unregister(&coretemp_driver);
757 kfree(pkg_devices);
758}
759module_exit(coretemp_exit)
760
761MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
762MODULE_DESCRIPTION("Intel Core temperature monitor");
763MODULE_LICENSE("GPL");
1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
37#include <linux/pci.h>
38#include <linux/smp.h>
39#include <linux/moduleparam.h>
40#include <asm/msr.h>
41#include <asm/processor.h>
42#include <asm/cpu_device_id.h>
43
44#define DRVNAME "coretemp"
45
46/*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50static int force_tjmax;
51module_param_named(tjmax, force_tjmax, int, 0444);
52MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
54#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55#define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
56#define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
57#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60
61#define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65#ifdef CONFIG_SMP
66#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
67#else
68#define for_each_sibling(i, cpu) for (i = 0; false; )
69#endif
70
71/*
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
83 */
84struct temp_data {
85 int temp;
86 int ttarget;
87 int tjmax;
88 unsigned long last_updated;
89 unsigned int cpu;
90 u32 cpu_core_id;
91 u32 status_reg;
92 int attr_size;
93 bool is_pkg_data;
94 bool valid;
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 struct mutex update_lock;
98};
99
100/* Platform Data per Physical CPU */
101struct platform_data {
102 struct device *hwmon_dev;
103 u16 phys_proc_id;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
106};
107
108struct pdev_entry {
109 struct list_head list;
110 struct platform_device *pdev;
111 u16 phys_proc_id;
112};
113
114static LIST_HEAD(pdev_list);
115static DEFINE_MUTEX(pdev_list_mutex);
116
117static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
119{
120 return sprintf(buf, "%s\n", DRVNAME);
121}
122
123static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
125{
126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
129
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
132
133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
134}
135
136static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
138{
139 u32 eax, edx;
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
143
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
147}
148
149static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
151{
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 struct platform_data *pdata = dev_get_drvdata(dev);
154
155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
156}
157
158static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
160{
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
163
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
165}
166
167static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
169{
170 u32 eax, edx;
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
174
175 mutex_lock(&tdata->update_lock);
176
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 tdata->valid = 0;
181 /* Check whether the data is valid */
182 if (eax & 0x80000000) {
183 tdata->temp = tdata->tjmax -
184 ((eax >> 16) & 0x7f) * 1000;
185 tdata->valid = 1;
186 }
187 tdata->last_updated = jiffies;
188 }
189
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
192}
193
194struct tjmax {
195 char const *id;
196 int tjmax;
197};
198
199static struct tjmax __cpuinitconst tjmax_table[] = {
200 { "CPU D410", 100000 },
201 { "CPU D425", 100000 },
202 { "CPU D510", 100000 },
203 { "CPU D525", 100000 },
204 { "CPU N450", 100000 },
205 { "CPU N455", 100000 },
206 { "CPU N470", 100000 },
207 { "CPU N475", 100000 },
208 { "CPU 230", 100000 },
209 { "CPU 330", 125000 },
210};
211
212static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
213 struct device *dev)
214{
215 /* The 100C is default for both mobile and non mobile CPUs */
216
217 int tjmax = 100000;
218 int tjmax_ee = 85000;
219 int usemsr_ee = 1;
220 int err;
221 u32 eax, edx;
222 struct pci_dev *host_bridge;
223 int i;
224
225 /* explicit tjmax table entries override heuristics */
226 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
227 if (strstr(c->x86_model_id, tjmax_table[i].id))
228 return tjmax_table[i].tjmax;
229 }
230
231 /* Early chips have no MSR for TjMax */
232
233 if (c->x86_model == 0xf && c->x86_mask < 4)
234 usemsr_ee = 0;
235
236 /* Atom CPUs */
237
238 if (c->x86_model == 0x1c || c->x86_model == 0x26
239 || c->x86_model == 0x27) {
240 usemsr_ee = 0;
241
242 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
243
244 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
245 && (host_bridge->device == 0xa000 /* NM10 based nettop */
246 || host_bridge->device == 0xa010)) /* NM10 based netbook */
247 tjmax = 100000;
248 else
249 tjmax = 90000;
250
251 pci_dev_put(host_bridge);
252 } else if (c->x86_model == 0x36) {
253 usemsr_ee = 0;
254 tjmax = 100000;
255 }
256
257 if (c->x86_model > 0xe && usemsr_ee) {
258 u8 platform_id;
259
260 /*
261 * Now we can detect the mobile CPU using Intel provided table
262 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
263 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
264 */
265 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
266 if (err) {
267 dev_warn(dev,
268 "Unable to access MSR 0x17, assuming desktop"
269 " CPU\n");
270 usemsr_ee = 0;
271 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
272 /*
273 * Trust bit 28 up to Penryn, I could not find any
274 * documentation on that; if you happen to know
275 * someone at Intel please ask
276 */
277 usemsr_ee = 0;
278 } else {
279 /* Platform ID bits 52:50 (EDX starts at bit 32) */
280 platform_id = (edx >> 18) & 0x7;
281
282 /*
283 * Mobile Penryn CPU seems to be platform ID 7 or 5
284 * (guesswork)
285 */
286 if (c->x86_model == 0x17 &&
287 (platform_id == 5 || platform_id == 7)) {
288 /*
289 * If MSR EE bit is set, set it to 90 degrees C,
290 * otherwise 105 degrees C
291 */
292 tjmax_ee = 90000;
293 tjmax = 105000;
294 }
295 }
296 }
297
298 if (usemsr_ee) {
299 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
300 if (err) {
301 dev_warn(dev,
302 "Unable to access MSR 0xEE, for Tjmax, left"
303 " at default\n");
304 } else if (eax & 0x40000000) {
305 tjmax = tjmax_ee;
306 }
307 } else if (tjmax == 100000) {
308 /*
309 * If we don't use msr EE it means we are desktop CPU
310 * (with exeception of Atom)
311 */
312 dev_warn(dev, "Using relative temperature scale!\n");
313 }
314
315 return tjmax;
316}
317
318static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
319 struct device *dev)
320{
321 int err;
322 u32 eax, edx;
323 u32 val;
324
325 /*
326 * A new feature of current Intel(R) processors, the
327 * IA32_TEMPERATURE_TARGET contains the TjMax value
328 */
329 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
330 if (err) {
331 if (c->x86_model > 0xe && c->x86_model != 0x1c)
332 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
333 } else {
334 val = (eax >> 16) & 0xff;
335 /*
336 * If the TjMax is not plausible, an assumption
337 * will be used
338 */
339 if (val) {
340 dev_dbg(dev, "TjMax is %d degrees C\n", val);
341 return val * 1000;
342 }
343 }
344
345 if (force_tjmax) {
346 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
347 force_tjmax);
348 return force_tjmax * 1000;
349 }
350
351 /*
352 * An assumption is made for early CPUs and unreadable MSR.
353 * NOTE: the calculated value may not be correct.
354 */
355 return adjust_tjmax(c, id, dev);
356}
357
358static int __devinit create_name_attr(struct platform_data *pdata,
359 struct device *dev)
360{
361 sysfs_attr_init(&pdata->name_attr.attr);
362 pdata->name_attr.attr.name = "name";
363 pdata->name_attr.attr.mode = S_IRUGO;
364 pdata->name_attr.show = show_name;
365 return device_create_file(dev, &pdata->name_attr);
366}
367
368static int __cpuinit create_core_attrs(struct temp_data *tdata,
369 struct device *dev, int attr_no)
370{
371 int err, i;
372 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
373 struct device_attribute *devattr, char *buf) = {
374 show_label, show_crit_alarm, show_temp, show_tjmax,
375 show_ttarget };
376 static const char *const names[TOTAL_ATTRS] = {
377 "temp%d_label", "temp%d_crit_alarm",
378 "temp%d_input", "temp%d_crit",
379 "temp%d_max" };
380
381 for (i = 0; i < tdata->attr_size; i++) {
382 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
383 attr_no);
384 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
385 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
386 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
387 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
388 tdata->sd_attrs[i].index = attr_no;
389 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
390 if (err)
391 goto exit_free;
392 }
393 return 0;
394
395exit_free:
396 while (--i >= 0)
397 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
398 return err;
399}
400
401
402static int __cpuinit chk_ucode_version(unsigned int cpu)
403{
404 struct cpuinfo_x86 *c = &cpu_data(cpu);
405
406 /*
407 * Check if we have problem with errata AE18 of Core processors:
408 * Readings might stop update when processor visited too deep sleep,
409 * fixed for stepping D0 (6EC).
410 */
411 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
412 pr_err("Errata AE18 not fixed, update BIOS or "
413 "microcode of the CPU!\n");
414 return -ENODEV;
415 }
416 return 0;
417}
418
419static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
420{
421 u16 phys_proc_id = TO_PHYS_ID(cpu);
422 struct pdev_entry *p;
423
424 mutex_lock(&pdev_list_mutex);
425
426 list_for_each_entry(p, &pdev_list, list)
427 if (p->phys_proc_id == phys_proc_id) {
428 mutex_unlock(&pdev_list_mutex);
429 return p->pdev;
430 }
431
432 mutex_unlock(&pdev_list_mutex);
433 return NULL;
434}
435
436static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
437 int pkg_flag)
438{
439 struct temp_data *tdata;
440
441 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
442 if (!tdata)
443 return NULL;
444
445 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
446 MSR_IA32_THERM_STATUS;
447 tdata->is_pkg_data = pkg_flag;
448 tdata->cpu = cpu;
449 tdata->cpu_core_id = TO_CORE_ID(cpu);
450 tdata->attr_size = MAX_CORE_ATTRS;
451 mutex_init(&tdata->update_lock);
452 return tdata;
453}
454
455static int __cpuinit create_core_data(struct platform_device *pdev,
456 unsigned int cpu, int pkg_flag)
457{
458 struct temp_data *tdata;
459 struct platform_data *pdata = platform_get_drvdata(pdev);
460 struct cpuinfo_x86 *c = &cpu_data(cpu);
461 u32 eax, edx;
462 int err, attr_no;
463
464 /*
465 * Find attr number for sysfs:
466 * We map the attr number to core id of the CPU
467 * The attr number is always core id + 2
468 * The Pkgtemp will always show up as temp1_*, if available
469 */
470 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
471
472 if (attr_no > MAX_CORE_DATA - 1)
473 return -ERANGE;
474
475 /*
476 * Provide a single set of attributes for all HT siblings of a core
477 * to avoid duplicate sensors (the processor ID and core ID of all
478 * HT siblings of a core are the same).
479 * Skip if a HT sibling of this core is already registered.
480 * This is not an error.
481 */
482 if (pdata->core_data[attr_no] != NULL)
483 return 0;
484
485 tdata = init_temp_data(cpu, pkg_flag);
486 if (!tdata)
487 return -ENOMEM;
488
489 /* Test if we can access the status register */
490 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
491 if (err)
492 goto exit_free;
493
494 /* We can access status register. Get Critical Temperature */
495 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
496
497 /*
498 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
499 * The target temperature is available on older CPUs but not in this
500 * register. Atoms don't have the register at all.
501 */
502 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
503 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
504 &eax, &edx);
505 if (!err) {
506 tdata->ttarget
507 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
508 tdata->attr_size++;
509 }
510 }
511
512 pdata->core_data[attr_no] = tdata;
513
514 /* Create sysfs interfaces */
515 err = create_core_attrs(tdata, &pdev->dev, attr_no);
516 if (err)
517 goto exit_free;
518
519 return 0;
520exit_free:
521 pdata->core_data[attr_no] = NULL;
522 kfree(tdata);
523 return err;
524}
525
526static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
527{
528 struct platform_device *pdev = coretemp_get_pdev(cpu);
529 int err;
530
531 if (!pdev)
532 return;
533
534 err = create_core_data(pdev, cpu, pkg_flag);
535 if (err)
536 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
537}
538
539static void coretemp_remove_core(struct platform_data *pdata,
540 struct device *dev, int indx)
541{
542 int i;
543 struct temp_data *tdata = pdata->core_data[indx];
544
545 /* Remove the sysfs attributes */
546 for (i = 0; i < tdata->attr_size; i++)
547 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
548
549 kfree(pdata->core_data[indx]);
550 pdata->core_data[indx] = NULL;
551}
552
553static int __devinit coretemp_probe(struct platform_device *pdev)
554{
555 struct platform_data *pdata;
556 int err;
557
558 /* Initialize the per-package data structures */
559 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
560 if (!pdata)
561 return -ENOMEM;
562
563 err = create_name_attr(pdata, &pdev->dev);
564 if (err)
565 goto exit_free;
566
567 pdata->phys_proc_id = pdev->id;
568 platform_set_drvdata(pdev, pdata);
569
570 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
571 if (IS_ERR(pdata->hwmon_dev)) {
572 err = PTR_ERR(pdata->hwmon_dev);
573 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
574 goto exit_name;
575 }
576 return 0;
577
578exit_name:
579 device_remove_file(&pdev->dev, &pdata->name_attr);
580 platform_set_drvdata(pdev, NULL);
581exit_free:
582 kfree(pdata);
583 return err;
584}
585
586static int __devexit coretemp_remove(struct platform_device *pdev)
587{
588 struct platform_data *pdata = platform_get_drvdata(pdev);
589 int i;
590
591 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
592 if (pdata->core_data[i])
593 coretemp_remove_core(pdata, &pdev->dev, i);
594
595 device_remove_file(&pdev->dev, &pdata->name_attr);
596 hwmon_device_unregister(pdata->hwmon_dev);
597 platform_set_drvdata(pdev, NULL);
598 kfree(pdata);
599 return 0;
600}
601
602static struct platform_driver coretemp_driver = {
603 .driver = {
604 .owner = THIS_MODULE,
605 .name = DRVNAME,
606 },
607 .probe = coretemp_probe,
608 .remove = __devexit_p(coretemp_remove),
609};
610
611static int __cpuinit coretemp_device_add(unsigned int cpu)
612{
613 int err;
614 struct platform_device *pdev;
615 struct pdev_entry *pdev_entry;
616
617 mutex_lock(&pdev_list_mutex);
618
619 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
620 if (!pdev) {
621 err = -ENOMEM;
622 pr_err("Device allocation failed\n");
623 goto exit;
624 }
625
626 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
627 if (!pdev_entry) {
628 err = -ENOMEM;
629 goto exit_device_put;
630 }
631
632 err = platform_device_add(pdev);
633 if (err) {
634 pr_err("Device addition failed (%d)\n", err);
635 goto exit_device_free;
636 }
637
638 pdev_entry->pdev = pdev;
639 pdev_entry->phys_proc_id = pdev->id;
640
641 list_add_tail(&pdev_entry->list, &pdev_list);
642 mutex_unlock(&pdev_list_mutex);
643
644 return 0;
645
646exit_device_free:
647 kfree(pdev_entry);
648exit_device_put:
649 platform_device_put(pdev);
650exit:
651 mutex_unlock(&pdev_list_mutex);
652 return err;
653}
654
655static void __cpuinit coretemp_device_remove(unsigned int cpu)
656{
657 struct pdev_entry *p, *n;
658 u16 phys_proc_id = TO_PHYS_ID(cpu);
659
660 mutex_lock(&pdev_list_mutex);
661 list_for_each_entry_safe(p, n, &pdev_list, list) {
662 if (p->phys_proc_id != phys_proc_id)
663 continue;
664 platform_device_unregister(p->pdev);
665 list_del(&p->list);
666 kfree(p);
667 }
668 mutex_unlock(&pdev_list_mutex);
669}
670
671static bool __cpuinit is_any_core_online(struct platform_data *pdata)
672{
673 int i;
674
675 /* Find online cores, except pkgtemp data */
676 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
677 if (pdata->core_data[i] &&
678 !pdata->core_data[i]->is_pkg_data) {
679 return true;
680 }
681 }
682 return false;
683}
684
685static void __cpuinit get_core_online(unsigned int cpu)
686{
687 struct cpuinfo_x86 *c = &cpu_data(cpu);
688 struct platform_device *pdev = coretemp_get_pdev(cpu);
689 int err;
690
691 /*
692 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
693 * sensors. We check this bit only, all the early CPUs
694 * without thermal sensors will be filtered out.
695 */
696 if (!cpu_has(c, X86_FEATURE_DTHERM))
697 return;
698
699 if (!pdev) {
700 /* Check the microcode version of the CPU */
701 if (chk_ucode_version(cpu))
702 return;
703
704 /*
705 * Alright, we have DTS support.
706 * We are bringing the _first_ core in this pkg
707 * online. So, initialize per-pkg data structures and
708 * then bring this core online.
709 */
710 err = coretemp_device_add(cpu);
711 if (err)
712 return;
713 /*
714 * Check whether pkgtemp support is available.
715 * If so, add interfaces for pkgtemp.
716 */
717 if (cpu_has(c, X86_FEATURE_PTS))
718 coretemp_add_core(cpu, 1);
719 }
720 /*
721 * Physical CPU device already exists.
722 * So, just add interfaces for this core.
723 */
724 coretemp_add_core(cpu, 0);
725}
726
727static void __cpuinit put_core_offline(unsigned int cpu)
728{
729 int i, indx;
730 struct platform_data *pdata;
731 struct platform_device *pdev = coretemp_get_pdev(cpu);
732
733 /* If the physical CPU device does not exist, just return */
734 if (!pdev)
735 return;
736
737 pdata = platform_get_drvdata(pdev);
738
739 indx = TO_ATTR_NO(cpu);
740
741 /* The core id is too big, just return */
742 if (indx > MAX_CORE_DATA - 1)
743 return;
744
745 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
746 coretemp_remove_core(pdata, &pdev->dev, indx);
747
748 /*
749 * If a HT sibling of a core is taken offline, but another HT sibling
750 * of the same core is still online, register the alternate sibling.
751 * This ensures that exactly one set of attributes is provided as long
752 * as at least one HT sibling of a core is online.
753 */
754 for_each_sibling(i, cpu) {
755 if (i != cpu) {
756 get_core_online(i);
757 /*
758 * Display temperature sensor data for one HT sibling
759 * per core only, so abort the loop after one such
760 * sibling has been found.
761 */
762 break;
763 }
764 }
765 /*
766 * If all cores in this pkg are offline, remove the device.
767 * coretemp_device_remove calls unregister_platform_device,
768 * which in turn calls coretemp_remove. This removes the
769 * pkgtemp entry and does other clean ups.
770 */
771 if (!is_any_core_online(pdata))
772 coretemp_device_remove(cpu);
773}
774
775static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
776 unsigned long action, void *hcpu)
777{
778 unsigned int cpu = (unsigned long) hcpu;
779
780 switch (action) {
781 case CPU_ONLINE:
782 case CPU_DOWN_FAILED:
783 get_core_online(cpu);
784 break;
785 case CPU_DOWN_PREPARE:
786 put_core_offline(cpu);
787 break;
788 }
789 return NOTIFY_OK;
790}
791
792static struct notifier_block coretemp_cpu_notifier __refdata = {
793 .notifier_call = coretemp_cpu_callback,
794};
795
796static const struct x86_cpu_id coretemp_ids[] = {
797 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
798 {}
799};
800MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
801
802static int __init coretemp_init(void)
803{
804 int i, err;
805
806 /*
807 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
808 * sensors. We check this bit only, all the early CPUs
809 * without thermal sensors will be filtered out.
810 */
811 if (!x86_match_cpu(coretemp_ids))
812 return -ENODEV;
813
814 err = platform_driver_register(&coretemp_driver);
815 if (err)
816 goto exit;
817
818 for_each_online_cpu(i)
819 get_core_online(i);
820
821#ifndef CONFIG_HOTPLUG_CPU
822 if (list_empty(&pdev_list)) {
823 err = -ENODEV;
824 goto exit_driver_unreg;
825 }
826#endif
827
828 register_hotcpu_notifier(&coretemp_cpu_notifier);
829 return 0;
830
831#ifndef CONFIG_HOTPLUG_CPU
832exit_driver_unreg:
833 platform_driver_unregister(&coretemp_driver);
834#endif
835exit:
836 return err;
837}
838
839static void __exit coretemp_exit(void)
840{
841 struct pdev_entry *p, *n;
842
843 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
844 mutex_lock(&pdev_list_mutex);
845 list_for_each_entry_safe(p, n, &pdev_list, list) {
846 platform_device_unregister(p->pdev);
847 list_del(&p->list);
848 kfree(p);
849 }
850 mutex_unlock(&pdev_list_mutex);
851 platform_driver_unregister(&coretemp_driver);
852}
853
854MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
855MODULE_DESCRIPTION("Intel Core temperature monitor");
856MODULE_LICENSE("GPL");
857
858module_init(coretemp_init)
859module_exit(coretemp_exit)