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1/*
2 * pata_radisys.c - Intel PATA/SATA controllers
3 *
4 * (C) 2006 Red Hat <alan@lxorguk.ukuu.org.uk>
5 *
6 * Some parts based on ata_piix.c by Jeff Garzik and others.
7 *
8 * A PIIX relative, this device has a single ATA channel and no
9 * slave timings, SITRE or PPE. In that sense it is a close relative
10 * of the original PIIX. It does however support UDMA 33/66 per channel
11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA
12 * port.
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/blkdev.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21#include <scsi/scsi_host.h>
22#include <linux/libata.h>
23#include <linux/ata.h>
24
25#define DRV_NAME "pata_radisys"
26#define DRV_VERSION "0.4.4"
27
28/**
29 * radisys_set_piomode - Initialize host controller PATA PIO timings
30 * @ap: ATA port
31 * @adev: Device whose timings we are configuring
32 *
33 * Set PIO mode for device, in host controller PCI config space.
34 *
35 * LOCKING:
36 * None (inherited from caller).
37 */
38
39static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
40{
41 unsigned int pio = adev->pio_mode - XFER_PIO_0;
42 struct pci_dev *dev = to_pci_dev(ap->host->dev);
43 u16 idetm_data;
44 int control = 0;
45
46 /*
47 * See Intel Document 298600-004 for the timing programing rules
48 * for PIIX/ICH. Note that the early PIIX does not have the slave
49 * timing port at 0x44. The Radisys is a relative of the PIIX
50 * but not the same so be careful.
51 */
52
53 static const /* ISP RTC */
54 u8 timings[][2] = { { 0, 0 }, /* Check me */
55 { 0, 0 },
56 { 1, 1 },
57 { 2, 2 },
58 { 3, 3 }, };
59
60 if (pio > 0)
61 control |= 1; /* TIME1 enable */
62 if (ata_pio_need_iordy(adev))
63 control |= 2; /* IE IORDY */
64
65 pci_read_config_word(dev, 0x40, &idetm_data);
66
67 /* Enable IE and TIME as appropriate. Clear the other
68 drive timing bits */
69 idetm_data &= 0xCCCC;
70 idetm_data |= (control << (4 * adev->devno));
71 idetm_data |= (timings[pio][0] << 12) |
72 (timings[pio][1] << 8);
73 pci_write_config_word(dev, 0x40, idetm_data);
74
75 /* Track which port is configured */
76 ap->private_data = adev;
77}
78
79/**
80 * radisys_set_dmamode - Initialize host controller PATA DMA timings
81 * @ap: Port whose timings we are configuring
82 * @adev: Device to program
83 *
84 * Set MWDMA mode for device, in host controller PCI config space.
85 *
86 * LOCKING:
87 * None (inherited from caller).
88 */
89
90static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
91{
92 struct pci_dev *dev = to_pci_dev(ap->host->dev);
93 u16 idetm_data;
94 u8 udma_enable;
95
96 static const /* ISP RTC */
97 u8 timings[][2] = { { 0, 0 },
98 { 0, 0 },
99 { 1, 1 },
100 { 2, 2 },
101 { 3, 3 }, };
102
103 /*
104 * MWDMA is driven by the PIO timings. We must also enable
105 * IORDY unconditionally.
106 */
107
108 pci_read_config_word(dev, 0x40, &idetm_data);
109 pci_read_config_byte(dev, 0x48, &udma_enable);
110
111 if (adev->dma_mode < XFER_UDMA_0) {
112 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
113 const unsigned int needed_pio[3] = {
114 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
115 };
116 int pio = needed_pio[mwdma] - XFER_PIO_0;
117 int control = 3; /* IORDY|TIME0 */
118
119 /* If the drive MWDMA is faster than it can do PIO then
120 we must force PIO0 for PIO cycles. */
121
122 if (adev->pio_mode < needed_pio[mwdma])
123 control = 1;
124
125 /* Mask out the relevant control and timing bits we will load. Also
126 clear the other drive TIME register as a precaution */
127
128 idetm_data &= 0xCCCC;
129 idetm_data |= control << (4 * adev->devno);
130 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
131
132 udma_enable &= ~(1 << adev->devno);
133 } else {
134 u8 udma_mode;
135
136 /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
137
138 pci_read_config_byte(dev, 0x4A, &udma_mode);
139
140 if (adev->xfer_mode == XFER_UDMA_2)
141 udma_mode &= ~(2 << (adev->devno * 4));
142 else /* UDMA 4 */
143 udma_mode |= (2 << (adev->devno * 4));
144
145 pci_write_config_byte(dev, 0x4A, udma_mode);
146
147 udma_enable |= (1 << adev->devno);
148 }
149 pci_write_config_word(dev, 0x40, idetm_data);
150 pci_write_config_byte(dev, 0x48, udma_enable);
151
152 /* Track which port is configured */
153 ap->private_data = adev;
154}
155
156/**
157 * radisys_qc_issue - command issue
158 * @qc: command pending
159 *
160 * Called when the libata layer is about to issue a command. We wrap
161 * this interface so that we can load the correct ATA timings if
162 * necessary. Our logic also clears TIME0/TIME1 for the other device so
163 * that, even if we get this wrong, cycles to the other device will
164 * be made PIO0.
165 */
166
167static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc)
168{
169 struct ata_port *ap = qc->ap;
170 struct ata_device *adev = qc->dev;
171
172 if (adev != ap->private_data) {
173 /* UDMA timing is not shared */
174 if (adev->dma_mode < XFER_UDMA_0) {
175 if (adev->dma_mode)
176 radisys_set_dmamode(ap, adev);
177 else if (adev->pio_mode)
178 radisys_set_piomode(ap, adev);
179 }
180 }
181 return ata_bmdma_qc_issue(qc);
182}
183
184
185static struct scsi_host_template radisys_sht = {
186 ATA_BMDMA_SHT(DRV_NAME),
187};
188
189static struct ata_port_operations radisys_pata_ops = {
190 .inherits = &ata_bmdma_port_ops,
191 .qc_issue = radisys_qc_issue,
192 .cable_detect = ata_cable_unknown,
193 .set_piomode = radisys_set_piomode,
194 .set_dmamode = radisys_set_dmamode,
195};
196
197
198/**
199 * radisys_init_one - Register PIIX ATA PCI device with kernel services
200 * @pdev: PCI device to register
201 * @ent: Entry in radisys_pci_tbl matching with @pdev
202 *
203 * Called from kernel PCI layer. We probe for combined mode (sigh),
204 * and then hand over control to libata, for it to do the rest.
205 *
206 * LOCKING:
207 * Inherited from PCI layer (may sleep).
208 *
209 * RETURNS:
210 * Zero on success, or -ERRNO value.
211 */
212
213static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
214{
215 static const struct ata_port_info info = {
216 .flags = ATA_FLAG_SLAVE_POSS,
217 .pio_mask = ATA_PIO4,
218 .mwdma_mask = ATA_MWDMA12_ONLY,
219 .udma_mask = ATA_UDMA24_ONLY,
220 .port_ops = &radisys_pata_ops,
221 };
222 const struct ata_port_info *ppi[] = { &info, NULL };
223
224 ata_print_version_once(&pdev->dev, DRV_VERSION);
225
226 return ata_pci_bmdma_init_one(pdev, ppi, &radisys_sht, NULL, 0);
227}
228
229static const struct pci_device_id radisys_pci_tbl[] = {
230 { PCI_VDEVICE(RADISYS, 0x8201), },
231
232 { } /* terminate list */
233};
234
235static struct pci_driver radisys_pci_driver = {
236 .name = DRV_NAME,
237 .id_table = radisys_pci_tbl,
238 .probe = radisys_init_one,
239 .remove = ata_pci_remove_one,
240#ifdef CONFIG_PM_SLEEP
241 .suspend = ata_pci_device_suspend,
242 .resume = ata_pci_device_resume,
243#endif
244};
245
246module_pci_driver(radisys_pci_driver);
247
248MODULE_AUTHOR("Alan Cox");
249MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
250MODULE_LICENSE("GPL");
251MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
252MODULE_VERSION(DRV_VERSION);
1/*
2 * pata_radisys.c - Intel PATA/SATA controllers
3 *
4 * (C) 2006 Red Hat <alan@lxorguk.ukuu.org.uk>
5 *
6 * Some parts based on ata_piix.c by Jeff Garzik and others.
7 *
8 * A PIIX relative, this device has a single ATA channel and no
9 * slave timings, SITRE or PPE. In that sense it is a close relative
10 * of the original PIIX. It does however support UDMA 33/66 per channel
11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA
12 * port.
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/init.h>
19#include <linux/blkdev.h>
20#include <linux/delay.h>
21#include <linux/device.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24#include <linux/ata.h>
25
26#define DRV_NAME "pata_radisys"
27#define DRV_VERSION "0.4.4"
28
29/**
30 * radisys_set_piomode - Initialize host controller PATA PIO timings
31 * @ap: ATA port
32 * @adev: Device whose timings we are configuring
33 *
34 * Set PIO mode for device, in host controller PCI config space.
35 *
36 * LOCKING:
37 * None (inherited from caller).
38 */
39
40static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
41{
42 unsigned int pio = adev->pio_mode - XFER_PIO_0;
43 struct pci_dev *dev = to_pci_dev(ap->host->dev);
44 u16 idetm_data;
45 int control = 0;
46
47 /*
48 * See Intel Document 298600-004 for the timing programing rules
49 * for PIIX/ICH. Note that the early PIIX does not have the slave
50 * timing port at 0x44. The Radisys is a relative of the PIIX
51 * but not the same so be careful.
52 */
53
54 static const /* ISP RTC */
55 u8 timings[][2] = { { 0, 0 }, /* Check me */
56 { 0, 0 },
57 { 1, 1 },
58 { 2, 2 },
59 { 3, 3 }, };
60
61 if (pio > 0)
62 control |= 1; /* TIME1 enable */
63 if (ata_pio_need_iordy(adev))
64 control |= 2; /* IE IORDY */
65
66 pci_read_config_word(dev, 0x40, &idetm_data);
67
68 /* Enable IE and TIME as appropriate. Clear the other
69 drive timing bits */
70 idetm_data &= 0xCCCC;
71 idetm_data |= (control << (4 * adev->devno));
72 idetm_data |= (timings[pio][0] << 12) |
73 (timings[pio][1] << 8);
74 pci_write_config_word(dev, 0x40, idetm_data);
75
76 /* Track which port is configured */
77 ap->private_data = adev;
78}
79
80/**
81 * radisys_set_dmamode - Initialize host controller PATA DMA timings
82 * @ap: Port whose timings we are configuring
83 * @adev: Device to program
84 *
85 * Set MWDMA mode for device, in host controller PCI config space.
86 *
87 * LOCKING:
88 * None (inherited from caller).
89 */
90
91static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
92{
93 struct pci_dev *dev = to_pci_dev(ap->host->dev);
94 u16 idetm_data;
95 u8 udma_enable;
96
97 static const /* ISP RTC */
98 u8 timings[][2] = { { 0, 0 },
99 { 0, 0 },
100 { 1, 1 },
101 { 2, 2 },
102 { 3, 3 }, };
103
104 /*
105 * MWDMA is driven by the PIO timings. We must also enable
106 * IORDY unconditionally.
107 */
108
109 pci_read_config_word(dev, 0x40, &idetm_data);
110 pci_read_config_byte(dev, 0x48, &udma_enable);
111
112 if (adev->dma_mode < XFER_UDMA_0) {
113 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
114 const unsigned int needed_pio[3] = {
115 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
116 };
117 int pio = needed_pio[mwdma] - XFER_PIO_0;
118 int control = 3; /* IORDY|TIME0 */
119
120 /* If the drive MWDMA is faster than it can do PIO then
121 we must force PIO0 for PIO cycles. */
122
123 if (adev->pio_mode < needed_pio[mwdma])
124 control = 1;
125
126 /* Mask out the relevant control and timing bits we will load. Also
127 clear the other drive TIME register as a precaution */
128
129 idetm_data &= 0xCCCC;
130 idetm_data |= control << (4 * adev->devno);
131 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
132
133 udma_enable &= ~(1 << adev->devno);
134 } else {
135 u8 udma_mode;
136
137 /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
138
139 pci_read_config_byte(dev, 0x4A, &udma_mode);
140
141 if (adev->xfer_mode == XFER_UDMA_2)
142 udma_mode &= ~(2 << (adev->devno * 4));
143 else /* UDMA 4 */
144 udma_mode |= (2 << (adev->devno * 4));
145
146 pci_write_config_byte(dev, 0x4A, udma_mode);
147
148 udma_enable |= (1 << adev->devno);
149 }
150 pci_write_config_word(dev, 0x40, idetm_data);
151 pci_write_config_byte(dev, 0x48, udma_enable);
152
153 /* Track which port is configured */
154 ap->private_data = adev;
155}
156
157/**
158 * radisys_qc_issue - command issue
159 * @qc: command pending
160 *
161 * Called when the libata layer is about to issue a command. We wrap
162 * this interface so that we can load the correct ATA timings if
163 * necessary. Our logic also clears TIME0/TIME1 for the other device so
164 * that, even if we get this wrong, cycles to the other device will
165 * be made PIO0.
166 */
167
168static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc)
169{
170 struct ata_port *ap = qc->ap;
171 struct ata_device *adev = qc->dev;
172
173 if (adev != ap->private_data) {
174 /* UDMA timing is not shared */
175 if (adev->dma_mode < XFER_UDMA_0) {
176 if (adev->dma_mode)
177 radisys_set_dmamode(ap, adev);
178 else if (adev->pio_mode)
179 radisys_set_piomode(ap, adev);
180 }
181 }
182 return ata_bmdma_qc_issue(qc);
183}
184
185
186static struct scsi_host_template radisys_sht = {
187 ATA_BMDMA_SHT(DRV_NAME),
188};
189
190static struct ata_port_operations radisys_pata_ops = {
191 .inherits = &ata_bmdma_port_ops,
192 .qc_issue = radisys_qc_issue,
193 .cable_detect = ata_cable_unknown,
194 .set_piomode = radisys_set_piomode,
195 .set_dmamode = radisys_set_dmamode,
196};
197
198
199/**
200 * radisys_init_one - Register PIIX ATA PCI device with kernel services
201 * @pdev: PCI device to register
202 * @ent: Entry in radisys_pci_tbl matching with @pdev
203 *
204 * Called from kernel PCI layer. We probe for combined mode (sigh),
205 * and then hand over control to libata, for it to do the rest.
206 *
207 * LOCKING:
208 * Inherited from PCI layer (may sleep).
209 *
210 * RETURNS:
211 * Zero on success, or -ERRNO value.
212 */
213
214static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
215{
216 static const struct ata_port_info info = {
217 .flags = ATA_FLAG_SLAVE_POSS,
218 .pio_mask = ATA_PIO4,
219 .mwdma_mask = ATA_MWDMA12_ONLY,
220 .udma_mask = ATA_UDMA24_ONLY,
221 .port_ops = &radisys_pata_ops,
222 };
223 const struct ata_port_info *ppi[] = { &info, NULL };
224
225 ata_print_version_once(&pdev->dev, DRV_VERSION);
226
227 return ata_pci_bmdma_init_one(pdev, ppi, &radisys_sht, NULL, 0);
228}
229
230static const struct pci_device_id radisys_pci_tbl[] = {
231 { PCI_VDEVICE(RADISYS, 0x8201), },
232
233 { } /* terminate list */
234};
235
236static struct pci_driver radisys_pci_driver = {
237 .name = DRV_NAME,
238 .id_table = radisys_pci_tbl,
239 .probe = radisys_init_one,
240 .remove = ata_pci_remove_one,
241#ifdef CONFIG_PM
242 .suspend = ata_pci_device_suspend,
243 .resume = ata_pci_device_resume,
244#endif
245};
246
247static int __init radisys_init(void)
248{
249 return pci_register_driver(&radisys_pci_driver);
250}
251
252static void __exit radisys_exit(void)
253{
254 pci_unregister_driver(&radisys_pci_driver);
255}
256
257module_init(radisys_init);
258module_exit(radisys_exit);
259
260MODULE_AUTHOR("Alan Cox");
261MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
262MODULE_LICENSE("GPL");
263MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
264MODULE_VERSION(DRV_VERSION);
265