Loading...
Note: File does not exist in v3.5.6.
1/*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6#include <linux/compat.h>
7#include <linux/cpu.h>
8#include <linux/mman.h>
9#include <linux/pkeys.h>
10
11#include <asm/fpu/api.h>
12#include <asm/fpu/internal.h>
13#include <asm/fpu/signal.h>
14#include <asm/fpu/regset.h>
15#include <asm/fpu/xstate.h>
16
17#include <asm/tlbflush.h>
18
19/*
20 * Although we spell it out in here, the Processor Trace
21 * xfeature is completely unused. We use other mechanisms
22 * to save/restore PT state in Linux.
23 */
24static const char *xfeature_names[] =
25{
26 "x87 floating point registers" ,
27 "SSE registers" ,
28 "AVX registers" ,
29 "MPX bounds registers" ,
30 "MPX CSR" ,
31 "AVX-512 opmask" ,
32 "AVX-512 Hi256" ,
33 "AVX-512 ZMM_Hi256" ,
34 "Processor Trace (unused)" ,
35 "Protection Keys User registers",
36 "unknown xstate feature" ,
37};
38
39/*
40 * Mask of xstate features supported by the CPU and the kernel:
41 */
42u64 xfeatures_mask __read_mostly;
43
44static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
45static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
46static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
47
48/*
49 * The XSAVE area of kernel can be in standard or compacted format;
50 * it is always in standard format for user mode. This is the user
51 * mode standard format size used for signal and ptrace frames.
52 */
53unsigned int fpu_user_xstate_size;
54
55/*
56 * Clear all of the X86_FEATURE_* bits that are unavailable
57 * when the CPU has no XSAVE support.
58 */
59void fpu__xstate_clear_all_cpu_caps(void)
60{
61 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
62 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
63 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
64 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
65 setup_clear_cpu_cap(X86_FEATURE_AVX);
66 setup_clear_cpu_cap(X86_FEATURE_AVX2);
67 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
68 setup_clear_cpu_cap(X86_FEATURE_AVX512IFMA);
69 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
70 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
71 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
72 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
73 setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
74 setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
75 setup_clear_cpu_cap(X86_FEATURE_MPX);
76 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
77 setup_clear_cpu_cap(X86_FEATURE_AVX512VBMI);
78 setup_clear_cpu_cap(X86_FEATURE_PKU);
79 setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);
80 setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);
81}
82
83/*
84 * Return whether the system supports a given xfeature.
85 *
86 * Also return the name of the (most advanced) feature that the caller requested:
87 */
88int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
89{
90 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
91
92 if (unlikely(feature_name)) {
93 long xfeature_idx, max_idx;
94 u64 xfeatures_print;
95 /*
96 * So we use FLS here to be able to print the most advanced
97 * feature that was requested but is missing. So if a driver
98 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
99 * missing AVX feature - this is the most informative message
100 * to users:
101 */
102 if (xfeatures_missing)
103 xfeatures_print = xfeatures_missing;
104 else
105 xfeatures_print = xfeatures_needed;
106
107 xfeature_idx = fls64(xfeatures_print)-1;
108 max_idx = ARRAY_SIZE(xfeature_names)-1;
109 xfeature_idx = min(xfeature_idx, max_idx);
110
111 *feature_name = xfeature_names[xfeature_idx];
112 }
113
114 if (xfeatures_missing)
115 return 0;
116
117 return 1;
118}
119EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
120
121static int xfeature_is_supervisor(int xfeature_nr)
122{
123 /*
124 * We currently do not support supervisor states, but if
125 * we did, we could find out like this.
126 *
127 * SDM says: If state component 'i' is a user state component,
128 * ECX[0] return 0; if state component i is a supervisor
129 * state component, ECX[0] returns 1.
130 */
131 u32 eax, ebx, ecx, edx;
132
133 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
134 return !!(ecx & 1);
135}
136
137static int xfeature_is_user(int xfeature_nr)
138{
139 return !xfeature_is_supervisor(xfeature_nr);
140}
141
142/*
143 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
144 * a processor implementation detects that an FPU state component is still
145 * (or is again) in its initialized state, it may clear the corresponding
146 * bit in the header.xfeatures field, and can skip the writeout of registers
147 * to the corresponding memory layout.
148 *
149 * This means that when the bit is zero, the state component might still contain
150 * some previous - non-initialized register state.
151 *
152 * Before writing xstate information to user-space we sanitize those components,
153 * to always ensure that the memory layout of a feature will be in the init state
154 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
155 * see some stale state in the memory layout during signal handling, debugging etc.
156 */
157void fpstate_sanitize_xstate(struct fpu *fpu)
158{
159 struct fxregs_state *fx = &fpu->state.fxsave;
160 int feature_bit;
161 u64 xfeatures;
162
163 if (!use_xsaveopt())
164 return;
165
166 xfeatures = fpu->state.xsave.header.xfeatures;
167
168 /*
169 * None of the feature bits are in init state. So nothing else
170 * to do for us, as the memory layout is up to date.
171 */
172 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
173 return;
174
175 /*
176 * FP is in init state
177 */
178 if (!(xfeatures & XFEATURE_MASK_FP)) {
179 fx->cwd = 0x37f;
180 fx->swd = 0;
181 fx->twd = 0;
182 fx->fop = 0;
183 fx->rip = 0;
184 fx->rdp = 0;
185 memset(&fx->st_space[0], 0, 128);
186 }
187
188 /*
189 * SSE is in init state
190 */
191 if (!(xfeatures & XFEATURE_MASK_SSE))
192 memset(&fx->xmm_space[0], 0, 256);
193
194 /*
195 * First two features are FPU and SSE, which above we handled
196 * in a special way already:
197 */
198 feature_bit = 0x2;
199 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
200
201 /*
202 * Update all the remaining memory layouts according to their
203 * standard xstate layout, if their header bit is in the init
204 * state:
205 */
206 while (xfeatures) {
207 if (xfeatures & 0x1) {
208 int offset = xstate_comp_offsets[feature_bit];
209 int size = xstate_sizes[feature_bit];
210
211 memcpy((void *)fx + offset,
212 (void *)&init_fpstate.xsave + offset,
213 size);
214 }
215
216 xfeatures >>= 1;
217 feature_bit++;
218 }
219}
220
221/*
222 * Enable the extended processor state save/restore feature.
223 * Called once per CPU onlining.
224 */
225void fpu__init_cpu_xstate(void)
226{
227 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
228 return;
229 /*
230 * Make it clear that XSAVES supervisor states are not yet
231 * implemented should anyone expect it to work by changing
232 * bits in XFEATURE_MASK_* macros and XCR0.
233 */
234 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR),
235 "x86/fpu: XSAVES supervisor states are not yet implemented.\n");
236
237 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR;
238
239 cr4_set_bits(X86_CR4_OSXSAVE);
240 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
241}
242
243/*
244 * Note that in the future we will likely need a pair of
245 * functions here: one for user xstates and the other for
246 * system xstates. For now, they are the same.
247 */
248static int xfeature_enabled(enum xfeature xfeature)
249{
250 return !!(xfeatures_mask & (1UL << xfeature));
251}
252
253/*
254 * Record the offsets and sizes of various xstates contained
255 * in the XSAVE state memory layout.
256 */
257static void __init setup_xstate_features(void)
258{
259 u32 eax, ebx, ecx, edx, i;
260 /* start at the beginnning of the "extended state" */
261 unsigned int last_good_offset = offsetof(struct xregs_state,
262 extended_state_area);
263 /*
264 * The FP xstates and SSE xstates are legacy states. They are always
265 * in the fixed offsets in the xsave area in either compacted form
266 * or standard form.
267 */
268 xstate_offsets[0] = 0;
269 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space);
270 xstate_offsets[1] = xstate_sizes[0];
271 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space);
272
273 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
274 if (!xfeature_enabled(i))
275 continue;
276
277 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
278
279 /*
280 * If an xfeature is supervisor state, the offset
281 * in EBX is invalid. We leave it to -1.
282 */
283 if (xfeature_is_user(i))
284 xstate_offsets[i] = ebx;
285
286 xstate_sizes[i] = eax;
287 /*
288 * In our xstate size checks, we assume that the
289 * highest-numbered xstate feature has the
290 * highest offset in the buffer. Ensure it does.
291 */
292 WARN_ONCE(last_good_offset > xstate_offsets[i],
293 "x86/fpu: misordered xstate at %d\n", last_good_offset);
294 last_good_offset = xstate_offsets[i];
295 }
296}
297
298static void __init print_xstate_feature(u64 xstate_mask)
299{
300 const char *feature_name;
301
302 if (cpu_has_xfeatures(xstate_mask, &feature_name))
303 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
304}
305
306/*
307 * Print out all the supported xstate features:
308 */
309static void __init print_xstate_features(void)
310{
311 print_xstate_feature(XFEATURE_MASK_FP);
312 print_xstate_feature(XFEATURE_MASK_SSE);
313 print_xstate_feature(XFEATURE_MASK_YMM);
314 print_xstate_feature(XFEATURE_MASK_BNDREGS);
315 print_xstate_feature(XFEATURE_MASK_BNDCSR);
316 print_xstate_feature(XFEATURE_MASK_OPMASK);
317 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
318 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
319 print_xstate_feature(XFEATURE_MASK_PKRU);
320}
321
322/*
323 * This check is important because it is easy to get XSTATE_*
324 * confused with XSTATE_BIT_*.
325 */
326#define CHECK_XFEATURE(nr) do { \
327 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
328 WARN_ON(nr >= XFEATURE_MAX); \
329} while (0)
330
331/*
332 * We could cache this like xstate_size[], but we only use
333 * it here, so it would be a waste of space.
334 */
335static int xfeature_is_aligned(int xfeature_nr)
336{
337 u32 eax, ebx, ecx, edx;
338
339 CHECK_XFEATURE(xfeature_nr);
340 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
341 /*
342 * The value returned by ECX[1] indicates the alignment
343 * of state component 'i' when the compacted format
344 * of the extended region of an XSAVE area is used:
345 */
346 return !!(ecx & 2);
347}
348
349/*
350 * This function sets up offsets and sizes of all extended states in
351 * xsave area. This supports both standard format and compacted format
352 * of the xsave aread.
353 */
354static void __init setup_xstate_comp(void)
355{
356 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
357 int i;
358
359 /*
360 * The FP xstates and SSE xstates are legacy states. They are always
361 * in the fixed offsets in the xsave area in either compacted form
362 * or standard form.
363 */
364 xstate_comp_offsets[0] = 0;
365 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
366
367 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
368 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
369 if (xfeature_enabled(i)) {
370 xstate_comp_offsets[i] = xstate_offsets[i];
371 xstate_comp_sizes[i] = xstate_sizes[i];
372 }
373 }
374 return;
375 }
376
377 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
378 FXSAVE_SIZE + XSAVE_HDR_SIZE;
379
380 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
381 if (xfeature_enabled(i))
382 xstate_comp_sizes[i] = xstate_sizes[i];
383 else
384 xstate_comp_sizes[i] = 0;
385
386 if (i > FIRST_EXTENDED_XFEATURE) {
387 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
388 + xstate_comp_sizes[i-1];
389
390 if (xfeature_is_aligned(i))
391 xstate_comp_offsets[i] =
392 ALIGN(xstate_comp_offsets[i], 64);
393 }
394 }
395}
396
397/*
398 * Print out xstate component offsets and sizes
399 */
400static void __init print_xstate_offset_size(void)
401{
402 int i;
403
404 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
405 if (!xfeature_enabled(i))
406 continue;
407 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
408 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
409 }
410}
411
412/*
413 * setup the xstate image representing the init state
414 */
415static void __init setup_init_fpu_buf(void)
416{
417 static int on_boot_cpu __initdata = 1;
418
419 WARN_ON_FPU(!on_boot_cpu);
420 on_boot_cpu = 0;
421
422 if (!boot_cpu_has(X86_FEATURE_XSAVE))
423 return;
424
425 setup_xstate_features();
426 print_xstate_features();
427
428 if (boot_cpu_has(X86_FEATURE_XSAVES))
429 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
430
431 /*
432 * Init all the features state with header.xfeatures being 0x0
433 */
434 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
435
436 /*
437 * Dump the init state again. This is to identify the init state
438 * of any feature which is not represented by all zero's.
439 */
440 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
441}
442
443static int xfeature_uncompacted_offset(int xfeature_nr)
444{
445 u32 eax, ebx, ecx, edx;
446
447 /*
448 * Only XSAVES supports supervisor states and it uses compacted
449 * format. Checking a supervisor state's uncompacted offset is
450 * an error.
451 */
452 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) {
453 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
454 return -1;
455 }
456
457 CHECK_XFEATURE(xfeature_nr);
458 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
459 return ebx;
460}
461
462static int xfeature_size(int xfeature_nr)
463{
464 u32 eax, ebx, ecx, edx;
465
466 CHECK_XFEATURE(xfeature_nr);
467 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
468 return eax;
469}
470
471/*
472 * 'XSAVES' implies two different things:
473 * 1. saving of supervisor/system state
474 * 2. using the compacted format
475 *
476 * Use this function when dealing with the compacted format so
477 * that it is obvious which aspect of 'XSAVES' is being handled
478 * by the calling code.
479 */
480int using_compacted_format(void)
481{
482 return boot_cpu_has(X86_FEATURE_XSAVES);
483}
484
485static void __xstate_dump_leaves(void)
486{
487 int i;
488 u32 eax, ebx, ecx, edx;
489 static int should_dump = 1;
490
491 if (!should_dump)
492 return;
493 should_dump = 0;
494 /*
495 * Dump out a few leaves past the ones that we support
496 * just in case there are some goodies up there
497 */
498 for (i = 0; i < XFEATURE_MAX + 10; i++) {
499 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
500 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
501 XSTATE_CPUID, i, eax, ebx, ecx, edx);
502 }
503}
504
505#define XSTATE_WARN_ON(x) do { \
506 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
507 __xstate_dump_leaves(); \
508 } \
509} while (0)
510
511#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
512 if ((nr == nr_macro) && \
513 WARN_ONCE(sz != sizeof(__struct), \
514 "%s: struct is %zu bytes, cpu state %d bytes\n", \
515 __stringify(nr_macro), sizeof(__struct), sz)) { \
516 __xstate_dump_leaves(); \
517 } \
518} while (0)
519
520/*
521 * We have a C struct for each 'xstate'. We need to ensure
522 * that our software representation matches what the CPU
523 * tells us about the state's size.
524 */
525static void check_xstate_against_struct(int nr)
526{
527 /*
528 * Ask the CPU for the size of the state.
529 */
530 int sz = xfeature_size(nr);
531 /*
532 * Match each CPU state with the corresponding software
533 * structure.
534 */
535 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
536 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
537 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
538 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
539 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
540 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
541 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
542
543 /*
544 * Make *SURE* to add any feature numbers in below if
545 * there are "holes" in the xsave state component
546 * numbers.
547 */
548 if ((nr < XFEATURE_YMM) ||
549 (nr >= XFEATURE_MAX) ||
550 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
551 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
552 XSTATE_WARN_ON(1);
553 }
554}
555
556/*
557 * This essentially double-checks what the cpu told us about
558 * how large the XSAVE buffer needs to be. We are recalculating
559 * it to be safe.
560 */
561static void do_extra_xstate_size_checks(void)
562{
563 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
564 int i;
565
566 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
567 if (!xfeature_enabled(i))
568 continue;
569
570 check_xstate_against_struct(i);
571 /*
572 * Supervisor state components can be managed only by
573 * XSAVES, which is compacted-format only.
574 */
575 if (!using_compacted_format())
576 XSTATE_WARN_ON(xfeature_is_supervisor(i));
577
578 /* Align from the end of the previous feature */
579 if (xfeature_is_aligned(i))
580 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
581 /*
582 * The offset of a given state in the non-compacted
583 * format is given to us in a CPUID leaf. We check
584 * them for being ordered (increasing offsets) in
585 * setup_xstate_features().
586 */
587 if (!using_compacted_format())
588 paranoid_xstate_size = xfeature_uncompacted_offset(i);
589 /*
590 * The compacted-format offset always depends on where
591 * the previous state ended.
592 */
593 paranoid_xstate_size += xfeature_size(i);
594 }
595 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
596}
597
598
599/*
600 * Get total size of enabled xstates in XCR0/xfeatures_mask.
601 *
602 * Note the SDM's wording here. "sub-function 0" only enumerates
603 * the size of the *user* states. If we use it to size a buffer
604 * that we use 'XSAVES' on, we could potentially overflow the
605 * buffer because 'XSAVES' saves system states too.
606 *
607 * Note that we do not currently set any bits on IA32_XSS so
608 * 'XCR0 | IA32_XSS == XCR0' for now.
609 */
610static unsigned int __init get_xsaves_size(void)
611{
612 unsigned int eax, ebx, ecx, edx;
613 /*
614 * - CPUID function 0DH, sub-function 1:
615 * EBX enumerates the size (in bytes) required by
616 * the XSAVES instruction for an XSAVE area
617 * containing all the state components
618 * corresponding to bits currently set in
619 * XCR0 | IA32_XSS.
620 */
621 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
622 return ebx;
623}
624
625static unsigned int __init get_xsave_size(void)
626{
627 unsigned int eax, ebx, ecx, edx;
628 /*
629 * - CPUID function 0DH, sub-function 0:
630 * EBX enumerates the size (in bytes) required by
631 * the XSAVE instruction for an XSAVE area
632 * containing all the *user* state components
633 * corresponding to bits currently set in XCR0.
634 */
635 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
636 return ebx;
637}
638
639/*
640 * Will the runtime-enumerated 'xstate_size' fit in the init
641 * task's statically-allocated buffer?
642 */
643static bool is_supported_xstate_size(unsigned int test_xstate_size)
644{
645 if (test_xstate_size <= sizeof(union fpregs_state))
646 return true;
647
648 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
649 sizeof(union fpregs_state), test_xstate_size);
650 return false;
651}
652
653static int init_xstate_size(void)
654{
655 /* Recompute the context size for enabled features: */
656 unsigned int possible_xstate_size;
657 unsigned int xsave_size;
658
659 xsave_size = get_xsave_size();
660
661 if (boot_cpu_has(X86_FEATURE_XSAVES))
662 possible_xstate_size = get_xsaves_size();
663 else
664 possible_xstate_size = xsave_size;
665
666 /* Ensure we have the space to store all enabled: */
667 if (!is_supported_xstate_size(possible_xstate_size))
668 return -EINVAL;
669
670 /*
671 * The size is OK, we are definitely going to use xsave,
672 * make it known to the world that we need more space.
673 */
674 fpu_kernel_xstate_size = possible_xstate_size;
675 do_extra_xstate_size_checks();
676
677 /*
678 * User space is always in standard format.
679 */
680 fpu_user_xstate_size = xsave_size;
681 return 0;
682}
683
684/*
685 * We enabled the XSAVE hardware, but something went wrong and
686 * we can not use it. Disable it.
687 */
688static void fpu__init_disable_system_xstate(void)
689{
690 xfeatures_mask = 0;
691 cr4_clear_bits(X86_CR4_OSXSAVE);
692 fpu__xstate_clear_all_cpu_caps();
693}
694
695/*
696 * Enable and initialize the xsave feature.
697 * Called once per system bootup.
698 */
699void __init fpu__init_system_xstate(void)
700{
701 unsigned int eax, ebx, ecx, edx;
702 static int on_boot_cpu __initdata = 1;
703 int err;
704
705 WARN_ON_FPU(!on_boot_cpu);
706 on_boot_cpu = 0;
707
708 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
709 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
710 return;
711 }
712
713 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
714 WARN_ON_FPU(1);
715 return;
716 }
717
718 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
719 xfeatures_mask = eax + ((u64)edx << 32);
720
721 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
722 /*
723 * This indicates that something really unexpected happened
724 * with the enumeration. Disable XSAVE and try to continue
725 * booting without it. This is too early to BUG().
726 */
727 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
728 goto out_disable;
729 }
730
731 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
732
733 /* Enable xstate instructions to be able to continue with initialization: */
734 fpu__init_cpu_xstate();
735 err = init_xstate_size();
736 if (err)
737 goto out_disable;
738
739 /*
740 * Update info used for ptrace frames; use standard-format size and no
741 * supervisor xstates:
742 */
743 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
744
745 fpu__init_prepare_fx_sw_frame();
746 setup_init_fpu_buf();
747 setup_xstate_comp();
748 print_xstate_offset_size();
749
750 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
751 xfeatures_mask,
752 fpu_kernel_xstate_size,
753 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
754 return;
755
756out_disable:
757 /* something went wrong, try to boot without any XSAVE support */
758 fpu__init_disable_system_xstate();
759}
760
761/*
762 * Restore minimal FPU state after suspend:
763 */
764void fpu__resume_cpu(void)
765{
766 /*
767 * Restore XCR0 on xsave capable CPUs:
768 */
769 if (boot_cpu_has(X86_FEATURE_XSAVE))
770 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
771}
772
773/*
774 * Given an xstate feature mask, calculate where in the xsave
775 * buffer the state is. Callers should ensure that the buffer
776 * is valid.
777 *
778 * Note: does not work for compacted buffers.
779 */
780void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
781{
782 int feature_nr = fls64(xstate_feature_mask) - 1;
783
784 if (!xfeature_enabled(feature_nr)) {
785 WARN_ON_FPU(1);
786 return NULL;
787 }
788
789 return (void *)xsave + xstate_comp_offsets[feature_nr];
790}
791/*
792 * Given the xsave area and a state inside, this function returns the
793 * address of the state.
794 *
795 * This is the API that is called to get xstate address in either
796 * standard format or compacted format of xsave area.
797 *
798 * Note that if there is no data for the field in the xsave buffer
799 * this will return NULL.
800 *
801 * Inputs:
802 * xstate: the thread's storage area for all FPU data
803 * xstate_feature: state which is defined in xsave.h (e.g.
804 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
805 * Output:
806 * address of the state in the xsave area, or NULL if the
807 * field is not present in the xsave buffer.
808 */
809void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
810{
811 /*
812 * Do we even *have* xsave state?
813 */
814 if (!boot_cpu_has(X86_FEATURE_XSAVE))
815 return NULL;
816
817 /*
818 * We should not ever be requesting features that we
819 * have not enabled. Remember that pcntxt_mask is
820 * what we write to the XCR0 register.
821 */
822 WARN_ONCE(!(xfeatures_mask & xstate_feature),
823 "get of unsupported state");
824 /*
825 * This assumes the last 'xsave*' instruction to
826 * have requested that 'xstate_feature' be saved.
827 * If it did not, we might be seeing and old value
828 * of the field in the buffer.
829 *
830 * This can happen because the last 'xsave' did not
831 * request that this feature be saved (unlikely)
832 * or because the "init optimization" caused it
833 * to not be saved.
834 */
835 if (!(xsave->header.xfeatures & xstate_feature))
836 return NULL;
837
838 return __raw_xsave_addr(xsave, xstate_feature);
839}
840EXPORT_SYMBOL_GPL(get_xsave_addr);
841
842/*
843 * This wraps up the common operations that need to occur when retrieving
844 * data from xsave state. It first ensures that the current task was
845 * using the FPU and retrieves the data in to a buffer. It then calculates
846 * the offset of the requested field in the buffer.
847 *
848 * This function is safe to call whether the FPU is in use or not.
849 *
850 * Note that this only works on the current task.
851 *
852 * Inputs:
853 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
854 * XFEATURE_MASK_SSE, etc...)
855 * Output:
856 * address of the state in the xsave area or NULL if the state
857 * is not present or is in its 'init state'.
858 */
859const void *get_xsave_field_ptr(int xsave_state)
860{
861 struct fpu *fpu = ¤t->thread.fpu;
862
863 if (!fpu->fpstate_active)
864 return NULL;
865 /*
866 * fpu__save() takes the CPU's xstate registers
867 * and saves them off to the 'fpu memory buffer.
868 */
869 fpu__save(fpu);
870
871 return get_xsave_addr(&fpu->state.xsave, xsave_state);
872}
873
874#ifdef CONFIG_ARCH_HAS_PKEYS
875
876#define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
877#define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
878/*
879 * This will go out and modify PKRU register to set the access
880 * rights for @pkey to @init_val.
881 */
882int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
883 unsigned long init_val)
884{
885 u32 old_pkru;
886 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
887 u32 new_pkru_bits = 0;
888
889 /*
890 * This check implies XSAVE support. OSPKE only gets
891 * set if we enable XSAVE and we enable PKU in XCR0.
892 */
893 if (!boot_cpu_has(X86_FEATURE_OSPKE))
894 return -EINVAL;
895
896 /* Set the bits we need in PKRU: */
897 if (init_val & PKEY_DISABLE_ACCESS)
898 new_pkru_bits |= PKRU_AD_BIT;
899 if (init_val & PKEY_DISABLE_WRITE)
900 new_pkru_bits |= PKRU_WD_BIT;
901
902 /* Shift the bits in to the correct place in PKRU for pkey: */
903 new_pkru_bits <<= pkey_shift;
904
905 /* Get old PKRU and mask off any old bits in place: */
906 old_pkru = read_pkru();
907 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
908
909 /* Write old part along with new part: */
910 write_pkru(old_pkru | new_pkru_bits);
911
912 return 0;
913}
914#endif /* ! CONFIG_ARCH_HAS_PKEYS */
915
916/*
917 * This is similar to user_regset_copyout(), but will not add offset to
918 * the source data pointer or increment pos, count, kbuf, and ubuf.
919 */
920static inline int xstate_copyout(unsigned int pos, unsigned int count,
921 void *kbuf, void __user *ubuf,
922 const void *data, const int start_pos,
923 const int end_pos)
924{
925 if ((count == 0) || (pos < start_pos))
926 return 0;
927
928 if (end_pos < 0 || pos < end_pos) {
929 unsigned int copy = (end_pos < 0 ? count : min(count, end_pos - pos));
930
931 if (kbuf) {
932 memcpy(kbuf + pos, data, copy);
933 } else {
934 if (__copy_to_user(ubuf + pos, data, copy))
935 return -EFAULT;
936 }
937 }
938 return 0;
939}
940
941/*
942 * Convert from kernel XSAVES compacted format to standard format and copy
943 * to a ptrace buffer. It supports partial copy but pos always starts from
944 * zero. This is called from xstateregs_get() and there we check the CPU
945 * has XSAVES.
946 */
947int copyout_from_xsaves(unsigned int pos, unsigned int count, void *kbuf,
948 void __user *ubuf, struct xregs_state *xsave)
949{
950 unsigned int offset, size;
951 int ret, i;
952 struct xstate_header header;
953
954 /*
955 * Currently copy_regset_to_user() starts from pos 0:
956 */
957 if (unlikely(pos != 0))
958 return -EFAULT;
959
960 /*
961 * The destination is a ptrace buffer; we put in only user xstates:
962 */
963 memset(&header, 0, sizeof(header));
964 header.xfeatures = xsave->header.xfeatures;
965 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
966
967 /*
968 * Copy xregs_state->header:
969 */
970 offset = offsetof(struct xregs_state, header);
971 size = sizeof(header);
972
973 ret = xstate_copyout(offset, size, kbuf, ubuf, &header, 0, count);
974
975 if (ret)
976 return ret;
977
978 for (i = 0; i < XFEATURE_MAX; i++) {
979 /*
980 * Copy only in-use xstates:
981 */
982 if ((header.xfeatures >> i) & 1) {
983 void *src = __raw_xsave_addr(xsave, 1 << i);
984
985 offset = xstate_offsets[i];
986 size = xstate_sizes[i];
987
988 ret = xstate_copyout(offset, size, kbuf, ubuf, src, 0, count);
989
990 if (ret)
991 return ret;
992
993 if (offset + size >= count)
994 break;
995 }
996
997 }
998
999 /*
1000 * Fill xsave->i387.sw_reserved value for ptrace frame:
1001 */
1002 offset = offsetof(struct fxregs_state, sw_reserved);
1003 size = sizeof(xstate_fx_sw_bytes);
1004
1005 ret = xstate_copyout(offset, size, kbuf, ubuf, xstate_fx_sw_bytes, 0, count);
1006
1007 if (ret)
1008 return ret;
1009
1010 return 0;
1011}
1012
1013/*
1014 * Convert from a ptrace standard-format buffer to kernel XSAVES format
1015 * and copy to the target thread. This is called from xstateregs_set() and
1016 * there we check the CPU has XSAVES and a whole standard-sized buffer
1017 * exists.
1018 */
1019int copyin_to_xsaves(const void *kbuf, const void __user *ubuf,
1020 struct xregs_state *xsave)
1021{
1022 unsigned int offset, size;
1023 int i;
1024 u64 xfeatures;
1025 u64 allowed_features;
1026
1027 offset = offsetof(struct xregs_state, header);
1028 size = sizeof(xfeatures);
1029
1030 if (kbuf) {
1031 memcpy(&xfeatures, kbuf + offset, size);
1032 } else {
1033 if (__copy_from_user(&xfeatures, ubuf + offset, size))
1034 return -EFAULT;
1035 }
1036
1037 /*
1038 * Reject if the user sets any disabled or supervisor features:
1039 */
1040 allowed_features = xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR;
1041
1042 if (xfeatures & ~allowed_features)
1043 return -EINVAL;
1044
1045 for (i = 0; i < XFEATURE_MAX; i++) {
1046 u64 mask = ((u64)1 << i);
1047
1048 if (xfeatures & mask) {
1049 void *dst = __raw_xsave_addr(xsave, 1 << i);
1050
1051 offset = xstate_offsets[i];
1052 size = xstate_sizes[i];
1053
1054 if (kbuf) {
1055 memcpy(dst, kbuf + offset, size);
1056 } else {
1057 if (__copy_from_user(dst, ubuf + offset, size))
1058 return -EFAULT;
1059 }
1060 }
1061 }
1062
1063 /*
1064 * The state that came in from userspace was user-state only.
1065 * Mask all the user states out of 'xfeatures':
1066 */
1067 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1068
1069 /*
1070 * Add back in the features that came in from userspace:
1071 */
1072 xsave->header.xfeatures |= xfeatures;
1073
1074 return 0;
1075}