1#ifndef __PPC_FSL_SOC_H
 2#define __PPC_FSL_SOC_H
 3#ifdef __KERNEL__
 4
 5#include <asm/mmu.h>
 6
 7struct spi_device;
 8
 9extern phys_addr_t get_immrbase(void);
10#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
11extern u32 get_brgfreq(void);
12extern u32 get_baudrate(void);
13#else
14static inline u32 get_brgfreq(void) { return -1; }
15static inline u32 get_baudrate(void) { return -1; }
16#endif
17extern u32 fsl_get_sys_freq(void);
18
19struct spi_board_info;
20struct device_node;
21
 
 
 
 
22/* The different ports that the DIU can be connected to */
23enum fsl_diu_monitor_port {
24	FSL_DIU_PORT_DVI,	/* DVI */
25	FSL_DIU_PORT_LVDS,	/* Single-link LVDS */
26	FSL_DIU_PORT_DLVDS	/* Dual-link LVDS */
27};
28
29struct platform_diu_data_ops {
30	u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
31		unsigned int bpp);
32	void (*set_gamma_table)(enum fsl_diu_monitor_port port,
33		char *gamma_table_base);
34	void (*set_monitor_port)(enum fsl_diu_monitor_port port);
35	void (*set_pixel_clock)(unsigned int pixclock);
36	enum fsl_diu_monitor_port (*valid_monitor_port)
37		(enum fsl_diu_monitor_port port);
38	void (*release_bootmem)(void);
39};
40
41extern struct platform_diu_data_ops diu_ops;
 
42
43void __noreturn fsl_hv_restart(char *cmd);
44void __noreturn fsl_hv_halt(void);
45
46#endif
47#endif

 1#ifndef __PPC_FSL_SOC_H
 2#define __PPC_FSL_SOC_H
 3#ifdef __KERNEL__
 4
 5#include <asm/mmu.h>
 6
 7struct spi_device;
 8
 9extern phys_addr_t get_immrbase(void);
10#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
11extern u32 get_brgfreq(void);
12extern u32 get_baudrate(void);
13#else
14static inline u32 get_brgfreq(void) { return -1; }
15static inline u32 get_baudrate(void) { return -1; }
16#endif
17extern u32 fsl_get_sys_freq(void);
18
19struct spi_board_info;
20struct device_node;
21
22extern void fsl_rstcr_restart(char *cmd);
23
24#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
25
26/* The different ports that the DIU can be connected to */
27enum fsl_diu_monitor_port {
28	FSL_DIU_PORT_DVI,	/* DVI */
29	FSL_DIU_PORT_LVDS,	/* Single-link LVDS */
30	FSL_DIU_PORT_DLVDS	/* Dual-link LVDS */
31};
32
33struct platform_diu_data_ops {
34	u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
35		unsigned int bpp);
36	void (*set_gamma_table)(enum fsl_diu_monitor_port port,
37		char *gamma_table_base);
38	void (*set_monitor_port)(enum fsl_diu_monitor_port port);
39	void (*set_pixel_clock)(unsigned int pixclock);
40	enum fsl_diu_monitor_port (*valid_monitor_port)
41		(enum fsl_diu_monitor_port port);
42	void (*release_bootmem)(void);
43};
44
45extern struct platform_diu_data_ops diu_ops;
46#endif
47
48void fsl_hv_restart(char *cmd);
49void fsl_hv_halt(void);
50
51#endif
52#endif