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1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/export.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/init.h>
34#include <linux/bug.h>
35#include <linux/nmi.h>
36#include <linux/mm.h>
37#include <linux/smp.h>
38#include <linux/io.h>
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
49#include <asm/kmemcheck.h>
50#include <asm/stacktrace.h>
51#include <asm/processor.h>
52#include <asm/debugreg.h>
53#include <linux/atomic.h>
54#include <asm/text-patching.h>
55#include <asm/ftrace.h>
56#include <asm/traps.h>
57#include <asm/desc.h>
58#include <asm/fpu/internal.h>
59#include <asm/mce.h>
60#include <asm/fixmap.h>
61#include <asm/mach_traps.h>
62#include <asm/alternative.h>
63#include <asm/fpu/xstate.h>
64#include <asm/trace/mpx.h>
65#include <asm/mpx.h>
66#include <asm/vm86.h>
67
68#ifdef CONFIG_X86_64
69#include <asm/x86_init.h>
70#include <asm/pgalloc.h>
71#include <asm/proto.h>
72
73/* No need to be aligned, but done to keep all IDTs defined the same way. */
74gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
75#else
76#include <asm/processor-flags.h>
77#include <asm/setup.h>
78#include <asm/proto.h>
79#endif
80
81/* Must be page-aligned because the real IDT is used in a fixmap. */
82gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
83
84DECLARE_BITMAP(used_vectors, NR_VECTORS);
85EXPORT_SYMBOL_GPL(used_vectors);
86
87static inline void cond_local_irq_enable(struct pt_regs *regs)
88{
89 if (regs->flags & X86_EFLAGS_IF)
90 local_irq_enable();
91}
92
93static inline void cond_local_irq_disable(struct pt_regs *regs)
94{
95 if (regs->flags & X86_EFLAGS_IF)
96 local_irq_disable();
97}
98
99/*
100 * In IST context, we explicitly disable preemption. This serves two
101 * purposes: it makes it much less likely that we would accidentally
102 * schedule in IST context and it will force a warning if we somehow
103 * manage to schedule by accident.
104 */
105void ist_enter(struct pt_regs *regs)
106{
107 if (user_mode(regs)) {
108 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
109 } else {
110 /*
111 * We might have interrupted pretty much anything. In
112 * fact, if we're a machine check, we can even interrupt
113 * NMI processing. We don't want in_nmi() to return true,
114 * but we need to notify RCU.
115 */
116 rcu_nmi_enter();
117 }
118
119 preempt_disable();
120
121 /* This code is a bit fragile. Test it. */
122 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
123}
124
125void ist_exit(struct pt_regs *regs)
126{
127 preempt_enable_no_resched();
128
129 if (!user_mode(regs))
130 rcu_nmi_exit();
131}
132
133/**
134 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
135 * @regs: regs passed to the IST exception handler
136 *
137 * IST exception handlers normally cannot schedule. As a special
138 * exception, if the exception interrupted userspace code (i.e.
139 * user_mode(regs) would return true) and the exception was not
140 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
141 * begins a non-atomic section within an ist_enter()/ist_exit() region.
142 * Callers are responsible for enabling interrupts themselves inside
143 * the non-atomic section, and callers must call ist_end_non_atomic()
144 * before ist_exit().
145 */
146void ist_begin_non_atomic(struct pt_regs *regs)
147{
148 BUG_ON(!user_mode(regs));
149
150 /*
151 * Sanity check: we need to be on the normal thread stack. This
152 * will catch asm bugs and any attempt to use ist_preempt_enable
153 * from double_fault.
154 */
155 BUG_ON((unsigned long)(current_top_of_stack() -
156 current_stack_pointer()) >= THREAD_SIZE);
157
158 preempt_enable_no_resched();
159}
160
161/**
162 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
163 *
164 * Ends a non-atomic section started with ist_begin_non_atomic().
165 */
166void ist_end_non_atomic(void)
167{
168 preempt_disable();
169}
170
171static nokprobe_inline int
172do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
173 struct pt_regs *regs, long error_code)
174{
175 if (v8086_mode(regs)) {
176 /*
177 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
178 * On nmi (interrupt 2), do_trap should not be called.
179 */
180 if (trapnr < X86_TRAP_UD) {
181 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
182 error_code, trapnr))
183 return 0;
184 }
185 return -1;
186 }
187
188 if (!user_mode(regs)) {
189 if (!fixup_exception(regs, trapnr)) {
190 tsk->thread.error_code = error_code;
191 tsk->thread.trap_nr = trapnr;
192 die(str, regs, error_code);
193 }
194 return 0;
195 }
196
197 return -1;
198}
199
200static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
201 siginfo_t *info)
202{
203 unsigned long siaddr;
204 int sicode;
205
206 switch (trapnr) {
207 default:
208 return SEND_SIG_PRIV;
209
210 case X86_TRAP_DE:
211 sicode = FPE_INTDIV;
212 siaddr = uprobe_get_trap_addr(regs);
213 break;
214 case X86_TRAP_UD:
215 sicode = ILL_ILLOPN;
216 siaddr = uprobe_get_trap_addr(regs);
217 break;
218 case X86_TRAP_AC:
219 sicode = BUS_ADRALN;
220 siaddr = 0;
221 break;
222 }
223
224 info->si_signo = signr;
225 info->si_errno = 0;
226 info->si_code = sicode;
227 info->si_addr = (void __user *)siaddr;
228 return info;
229}
230
231static void
232do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
233 long error_code, siginfo_t *info)
234{
235 struct task_struct *tsk = current;
236
237
238 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
239 return;
240 /*
241 * We want error_code and trap_nr set for userspace faults and
242 * kernelspace faults which result in die(), but not
243 * kernelspace faults which are fixed up. die() gives the
244 * process no chance to handle the signal and notice the
245 * kernel fault information, so that won't result in polluting
246 * the information about previously queued, but not yet
247 * delivered, faults. See also do_general_protection below.
248 */
249 tsk->thread.error_code = error_code;
250 tsk->thread.trap_nr = trapnr;
251
252 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
253 printk_ratelimit()) {
254 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
255 tsk->comm, tsk->pid, str,
256 regs->ip, regs->sp, error_code);
257 print_vma_addr(" in ", regs->ip);
258 pr_cont("\n");
259 }
260
261 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
262}
263NOKPROBE_SYMBOL(do_trap);
264
265static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
266 unsigned long trapnr, int signr)
267{
268 siginfo_t info;
269
270 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
271
272 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
273 NOTIFY_STOP) {
274 cond_local_irq_enable(regs);
275 do_trap(trapnr, signr, str, regs, error_code,
276 fill_trap_info(regs, signr, trapnr, &info));
277 }
278}
279
280#define DO_ERROR(trapnr, signr, str, name) \
281dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
282{ \
283 do_error_trap(regs, error_code, str, trapnr, signr); \
284}
285
286DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
287DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
288DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
289DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
290DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
291DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
292DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
293DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
294
295#ifdef CONFIG_VMAP_STACK
296__visible void __noreturn handle_stack_overflow(const char *message,
297 struct pt_regs *regs,
298 unsigned long fault_address)
299{
300 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
301 (void *)fault_address, current->stack,
302 (char *)current->stack + THREAD_SIZE - 1);
303 die(message, regs, 0);
304
305 /* Be absolutely certain we don't return. */
306 panic(message);
307}
308#endif
309
310#ifdef CONFIG_X86_64
311/* Runs on IST stack */
312dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
313{
314 static const char str[] = "double fault";
315 struct task_struct *tsk = current;
316#ifdef CONFIG_VMAP_STACK
317 unsigned long cr2;
318#endif
319
320#ifdef CONFIG_X86_ESPFIX64
321 extern unsigned char native_irq_return_iret[];
322
323 /*
324 * If IRET takes a non-IST fault on the espfix64 stack, then we
325 * end up promoting it to a doublefault. In that case, modify
326 * the stack to make it look like we just entered the #GP
327 * handler from user space, similar to bad_iret.
328 *
329 * No need for ist_enter here because we don't use RCU.
330 */
331 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
332 regs->cs == __KERNEL_CS &&
333 regs->ip == (unsigned long)native_irq_return_iret)
334 {
335 struct pt_regs *normal_regs = task_pt_regs(current);
336
337 /* Fake a #GP(0) from userspace. */
338 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
339 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
340 regs->ip = (unsigned long)general_protection;
341 regs->sp = (unsigned long)&normal_regs->orig_ax;
342
343 return;
344 }
345#endif
346
347 ist_enter(regs);
348 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
349
350 tsk->thread.error_code = error_code;
351 tsk->thread.trap_nr = X86_TRAP_DF;
352
353#ifdef CONFIG_VMAP_STACK
354 /*
355 * If we overflow the stack into a guard page, the CPU will fail
356 * to deliver #PF and will send #DF instead. Similarly, if we
357 * take any non-IST exception while too close to the bottom of
358 * the stack, the processor will get a page fault while
359 * delivering the exception and will generate a double fault.
360 *
361 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
362 * Page-Fault Exception (#PF):
363 *
364 * Processors update CR2 whenever a page fault is detected. If a
365 * second page fault occurs while an earlier page fault is being
366 * deliv- ered, the faulting linear address of the second fault will
367 * overwrite the contents of CR2 (replacing the previous
368 * address). These updates to CR2 occur even if the page fault
369 * results in a double fault or occurs during the delivery of a
370 * double fault.
371 *
372 * The logic below has a small possibility of incorrectly diagnosing
373 * some errors as stack overflows. For example, if the IDT or GDT
374 * gets corrupted such that #GP delivery fails due to a bad descriptor
375 * causing #GP and we hit this condition while CR2 coincidentally
376 * points to the stack guard page, we'll think we overflowed the
377 * stack. Given that we're going to panic one way or another
378 * if this happens, this isn't necessarily worth fixing.
379 *
380 * If necessary, we could improve the test by only diagnosing
381 * a stack overflow if the saved RSP points within 47 bytes of
382 * the bottom of the stack: if RSP == tsk_stack + 48 and we
383 * take an exception, the stack is already aligned and there
384 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
385 * possible error code, so a stack overflow would *not* double
386 * fault. With any less space left, exception delivery could
387 * fail, and, as a practical matter, we've overflowed the
388 * stack even if the actual trigger for the double fault was
389 * something else.
390 */
391 cr2 = read_cr2();
392 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
393 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
394#endif
395
396#ifdef CONFIG_DOUBLEFAULT
397 df_debug(regs, error_code);
398#endif
399 /*
400 * This is always a kernel trap and never fixable (and thus must
401 * never return).
402 */
403 for (;;)
404 die(str, regs, error_code);
405}
406#endif
407
408dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
409{
410 const struct mpx_bndcsr *bndcsr;
411 siginfo_t *info;
412
413 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
414 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
415 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
416 return;
417 cond_local_irq_enable(regs);
418
419 if (!user_mode(regs))
420 die("bounds", regs, error_code);
421
422 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
423 /* The exception is not from Intel MPX */
424 goto exit_trap;
425 }
426
427 /*
428 * We need to look at BNDSTATUS to resolve this exception.
429 * A NULL here might mean that it is in its 'init state',
430 * which is all zeros which indicates MPX was not
431 * responsible for the exception.
432 */
433 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
434 if (!bndcsr)
435 goto exit_trap;
436
437 trace_bounds_exception_mpx(bndcsr);
438 /*
439 * The error code field of the BNDSTATUS register communicates status
440 * information of a bound range exception #BR or operation involving
441 * bound directory.
442 */
443 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
444 case 2: /* Bound directory has invalid entry. */
445 if (mpx_handle_bd_fault())
446 goto exit_trap;
447 break; /* Success, it was handled */
448 case 1: /* Bound violation. */
449 info = mpx_generate_siginfo(regs);
450 if (IS_ERR(info)) {
451 /*
452 * We failed to decode the MPX instruction. Act as if
453 * the exception was not caused by MPX.
454 */
455 goto exit_trap;
456 }
457 /*
458 * Success, we decoded the instruction and retrieved
459 * an 'info' containing the address being accessed
460 * which caused the exception. This information
461 * allows and application to possibly handle the
462 * #BR exception itself.
463 */
464 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
465 kfree(info);
466 break;
467 case 0: /* No exception caused by Intel MPX operations. */
468 goto exit_trap;
469 default:
470 die("bounds", regs, error_code);
471 }
472
473 return;
474
475exit_trap:
476 /*
477 * This path out is for all the cases where we could not
478 * handle the exception in some way (like allocating a
479 * table or telling userspace about it. We will also end
480 * up here if the kernel has MPX turned off at compile
481 * time..
482 */
483 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
484}
485
486dotraplinkage void
487do_general_protection(struct pt_regs *regs, long error_code)
488{
489 struct task_struct *tsk;
490
491 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
492 cond_local_irq_enable(regs);
493
494 if (v8086_mode(regs)) {
495 local_irq_enable();
496 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
497 return;
498 }
499
500 tsk = current;
501 if (!user_mode(regs)) {
502 if (fixup_exception(regs, X86_TRAP_GP))
503 return;
504
505 tsk->thread.error_code = error_code;
506 tsk->thread.trap_nr = X86_TRAP_GP;
507 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
508 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
509 die("general protection fault", regs, error_code);
510 return;
511 }
512
513 tsk->thread.error_code = error_code;
514 tsk->thread.trap_nr = X86_TRAP_GP;
515
516 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
517 printk_ratelimit()) {
518 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
519 tsk->comm, task_pid_nr(tsk),
520 regs->ip, regs->sp, error_code);
521 print_vma_addr(" in ", regs->ip);
522 pr_cont("\n");
523 }
524
525 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
526}
527NOKPROBE_SYMBOL(do_general_protection);
528
529/* May run on IST stack. */
530dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
531{
532#ifdef CONFIG_DYNAMIC_FTRACE
533 /*
534 * ftrace must be first, everything else may cause a recursive crash.
535 * See note by declaration of modifying_ftrace_code in ftrace.c
536 */
537 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
538 ftrace_int3_handler(regs))
539 return;
540#endif
541 if (poke_int3_handler(regs))
542 return;
543
544 ist_enter(regs);
545 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
546#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
547 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
548 SIGTRAP) == NOTIFY_STOP)
549 goto exit;
550#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
551
552#ifdef CONFIG_KPROBES
553 if (kprobe_int3_handler(regs))
554 goto exit;
555#endif
556
557 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
558 SIGTRAP) == NOTIFY_STOP)
559 goto exit;
560
561 /*
562 * Let others (NMI) know that the debug stack is in use
563 * as we may switch to the interrupt stack.
564 */
565 debug_stack_usage_inc();
566 preempt_disable();
567 cond_local_irq_enable(regs);
568 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
569 cond_local_irq_disable(regs);
570 preempt_enable_no_resched();
571 debug_stack_usage_dec();
572exit:
573 ist_exit(regs);
574}
575NOKPROBE_SYMBOL(do_int3);
576
577#ifdef CONFIG_X86_64
578/*
579 * Help handler running on IST stack to switch off the IST stack if the
580 * interrupted code was in user mode. The actual stack switch is done in
581 * entry_64.S
582 */
583asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
584{
585 struct pt_regs *regs = task_pt_regs(current);
586 *regs = *eregs;
587 return regs;
588}
589NOKPROBE_SYMBOL(sync_regs);
590
591struct bad_iret_stack {
592 void *error_entry_ret;
593 struct pt_regs regs;
594};
595
596asmlinkage __visible notrace
597struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
598{
599 /*
600 * This is called from entry_64.S early in handling a fault
601 * caused by a bad iret to user mode. To handle the fault
602 * correctly, we want move our stack frame to task_pt_regs
603 * and we want to pretend that the exception came from the
604 * iret target.
605 */
606 struct bad_iret_stack *new_stack =
607 container_of(task_pt_regs(current),
608 struct bad_iret_stack, regs);
609
610 /* Copy the IRET target to the new stack. */
611 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
612
613 /* Copy the remainder of the stack from the current stack. */
614 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
615
616 BUG_ON(!user_mode(&new_stack->regs));
617 return new_stack;
618}
619NOKPROBE_SYMBOL(fixup_bad_iret);
620#endif
621
622static bool is_sysenter_singlestep(struct pt_regs *regs)
623{
624 /*
625 * We don't try for precision here. If we're anywhere in the region of
626 * code that can be single-stepped in the SYSENTER entry path, then
627 * assume that this is a useless single-step trap due to SYSENTER
628 * being invoked with TF set. (We don't know in advance exactly
629 * which instructions will be hit because BTF could plausibly
630 * be set.)
631 */
632#ifdef CONFIG_X86_32
633 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
634 (unsigned long)__end_SYSENTER_singlestep_region -
635 (unsigned long)__begin_SYSENTER_singlestep_region;
636#elif defined(CONFIG_IA32_EMULATION)
637 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
638 (unsigned long)__end_entry_SYSENTER_compat -
639 (unsigned long)entry_SYSENTER_compat;
640#else
641 return false;
642#endif
643}
644
645/*
646 * Our handling of the processor debug registers is non-trivial.
647 * We do not clear them on entry and exit from the kernel. Therefore
648 * it is possible to get a watchpoint trap here from inside the kernel.
649 * However, the code in ./ptrace.c has ensured that the user can
650 * only set watchpoints on userspace addresses. Therefore the in-kernel
651 * watchpoint trap can only occur in code which is reading/writing
652 * from user space. Such code must not hold kernel locks (since it
653 * can equally take a page fault), therefore it is safe to call
654 * force_sig_info even though that claims and releases locks.
655 *
656 * Code in ./signal.c ensures that the debug control register
657 * is restored before we deliver any signal, and therefore that
658 * user code runs with the correct debug control register even though
659 * we clear it here.
660 *
661 * Being careful here means that we don't have to be as careful in a
662 * lot of more complicated places (task switching can be a bit lazy
663 * about restoring all the debug state, and ptrace doesn't have to
664 * find every occurrence of the TF bit that could be saved away even
665 * by user code)
666 *
667 * May run on IST stack.
668 */
669dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
670{
671 struct task_struct *tsk = current;
672 int user_icebp = 0;
673 unsigned long dr6;
674 int si_code;
675
676 ist_enter(regs);
677
678 get_debugreg(dr6, 6);
679 /*
680 * The Intel SDM says:
681 *
682 * Certain debug exceptions may clear bits 0-3. The remaining
683 * contents of the DR6 register are never cleared by the
684 * processor. To avoid confusion in identifying debug
685 * exceptions, debug handlers should clear the register before
686 * returning to the interrupted task.
687 *
688 * Keep it simple: clear DR6 immediately.
689 */
690 set_debugreg(0, 6);
691
692 /* Filter out all the reserved bits which are preset to 1 */
693 dr6 &= ~DR6_RESERVED;
694
695 /*
696 * The SDM says "The processor clears the BTF flag when it
697 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
698 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
699 */
700 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
701
702 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
703 is_sysenter_singlestep(regs))) {
704 dr6 &= ~DR_STEP;
705 if (!dr6)
706 goto exit;
707 /*
708 * else we might have gotten a single-step trap and hit a
709 * watchpoint at the same time, in which case we should fall
710 * through and handle the watchpoint.
711 */
712 }
713
714 /*
715 * If dr6 has no reason to give us about the origin of this trap,
716 * then it's very likely the result of an icebp/int01 trap.
717 * User wants a sigtrap for that.
718 */
719 if (!dr6 && user_mode(regs))
720 user_icebp = 1;
721
722 /* Catch kmemcheck conditions! */
723 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
724 goto exit;
725
726 /* Store the virtualized DR6 value */
727 tsk->thread.debugreg6 = dr6;
728
729#ifdef CONFIG_KPROBES
730 if (kprobe_debug_handler(regs))
731 goto exit;
732#endif
733
734 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
735 SIGTRAP) == NOTIFY_STOP)
736 goto exit;
737
738 /*
739 * Let others (NMI) know that the debug stack is in use
740 * as we may switch to the interrupt stack.
741 */
742 debug_stack_usage_inc();
743
744 /* It's safe to allow irq's after DR6 has been saved */
745 preempt_disable();
746 cond_local_irq_enable(regs);
747
748 if (v8086_mode(regs)) {
749 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
750 X86_TRAP_DB);
751 cond_local_irq_disable(regs);
752 preempt_enable_no_resched();
753 debug_stack_usage_dec();
754 goto exit;
755 }
756
757 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
758 /*
759 * Historical junk that used to handle SYSENTER single-stepping.
760 * This should be unreachable now. If we survive for a while
761 * without anyone hitting this warning, we'll turn this into
762 * an oops.
763 */
764 tsk->thread.debugreg6 &= ~DR_STEP;
765 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
766 regs->flags &= ~X86_EFLAGS_TF;
767 }
768 si_code = get_si_code(tsk->thread.debugreg6);
769 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
770 send_sigtrap(tsk, regs, error_code, si_code);
771 cond_local_irq_disable(regs);
772 preempt_enable_no_resched();
773 debug_stack_usage_dec();
774
775exit:
776#if defined(CONFIG_X86_32)
777 /*
778 * This is the most likely code path that involves non-trivial use
779 * of the SYSENTER stack. Check that we haven't overrun it.
780 */
781 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
782 "Overran or corrupted SYSENTER stack\n");
783#endif
784 ist_exit(regs);
785}
786NOKPROBE_SYMBOL(do_debug);
787
788/*
789 * Note that we play around with the 'TS' bit in an attempt to get
790 * the correct behaviour even in the presence of the asynchronous
791 * IRQ13 behaviour
792 */
793static void math_error(struct pt_regs *regs, int error_code, int trapnr)
794{
795 struct task_struct *task = current;
796 struct fpu *fpu = &task->thread.fpu;
797 siginfo_t info;
798 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
799 "simd exception";
800
801 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
802 return;
803 cond_local_irq_enable(regs);
804
805 if (!user_mode(regs)) {
806 if (!fixup_exception(regs, trapnr)) {
807 task->thread.error_code = error_code;
808 task->thread.trap_nr = trapnr;
809 die(str, regs, error_code);
810 }
811 return;
812 }
813
814 /*
815 * Save the info for the exception handler and clear the error.
816 */
817 fpu__save(fpu);
818
819 task->thread.trap_nr = trapnr;
820 task->thread.error_code = error_code;
821 info.si_signo = SIGFPE;
822 info.si_errno = 0;
823 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
824
825 info.si_code = fpu__exception_code(fpu, trapnr);
826
827 /* Retry when we get spurious exceptions: */
828 if (!info.si_code)
829 return;
830
831 force_sig_info(SIGFPE, &info, task);
832}
833
834dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
835{
836 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
837 math_error(regs, error_code, X86_TRAP_MF);
838}
839
840dotraplinkage void
841do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
842{
843 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
844 math_error(regs, error_code, X86_TRAP_XF);
845}
846
847dotraplinkage void
848do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
849{
850 cond_local_irq_enable(regs);
851}
852
853dotraplinkage void
854do_device_not_available(struct pt_regs *regs, long error_code)
855{
856 unsigned long cr0;
857
858 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
859
860#ifdef CONFIG_MATH_EMULATION
861 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
862 struct math_emu_info info = { };
863
864 cond_local_irq_enable(regs);
865
866 info.regs = regs;
867 math_emulate(&info);
868 return;
869 }
870#endif
871
872 /* This should not happen. */
873 cr0 = read_cr0();
874 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
875 /* Try to fix it up and carry on. */
876 write_cr0(cr0 & ~X86_CR0_TS);
877 } else {
878 /*
879 * Something terrible happened, and we're better off trying
880 * to kill the task than getting stuck in a never-ending
881 * loop of #NM faults.
882 */
883 die("unexpected #NM exception", regs, error_code);
884 }
885}
886NOKPROBE_SYMBOL(do_device_not_available);
887
888#ifdef CONFIG_X86_32
889dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
890{
891 siginfo_t info;
892
893 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
894 local_irq_enable();
895
896 info.si_signo = SIGILL;
897 info.si_errno = 0;
898 info.si_code = ILL_BADSTK;
899 info.si_addr = NULL;
900 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
901 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
902 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
903 &info);
904 }
905}
906#endif
907
908/* Set of traps needed for early debugging. */
909void __init early_trap_init(void)
910{
911 /*
912 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
913 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
914 * CPU runs at ring 0 so it is impossible to hit an invalid
915 * stack. Using the original stack works well enough at this
916 * early stage. DEBUG_STACK will be equipped after cpu_init() in
917 * trap_init().
918 *
919 * We don't need to set trace_idt_table like set_intr_gate(),
920 * since we don't have trace_debug and it will be reset to
921 * 'debug' in trap_init() by set_intr_gate_ist().
922 */
923 set_intr_gate_notrace(X86_TRAP_DB, debug);
924 /* int3 can be called from all */
925 set_system_intr_gate(X86_TRAP_BP, &int3);
926#ifdef CONFIG_X86_32
927 set_intr_gate(X86_TRAP_PF, page_fault);
928#endif
929 load_idt(&idt_descr);
930}
931
932void __init early_trap_pf_init(void)
933{
934#ifdef CONFIG_X86_64
935 set_intr_gate(X86_TRAP_PF, page_fault);
936#endif
937}
938
939void __init trap_init(void)
940{
941 int i;
942
943#ifdef CONFIG_EISA
944 void __iomem *p = early_ioremap(0x0FFFD9, 4);
945
946 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
947 EISA_bus = 1;
948 early_iounmap(p, 4);
949#endif
950
951 set_intr_gate(X86_TRAP_DE, divide_error);
952 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
953 /* int4 can be called from all */
954 set_system_intr_gate(X86_TRAP_OF, &overflow);
955 set_intr_gate(X86_TRAP_BR, bounds);
956 set_intr_gate(X86_TRAP_UD, invalid_op);
957 set_intr_gate(X86_TRAP_NM, device_not_available);
958#ifdef CONFIG_X86_32
959 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
960#else
961 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
962#endif
963 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
964 set_intr_gate(X86_TRAP_TS, invalid_TSS);
965 set_intr_gate(X86_TRAP_NP, segment_not_present);
966 set_intr_gate(X86_TRAP_SS, stack_segment);
967 set_intr_gate(X86_TRAP_GP, general_protection);
968 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
969 set_intr_gate(X86_TRAP_MF, coprocessor_error);
970 set_intr_gate(X86_TRAP_AC, alignment_check);
971#ifdef CONFIG_X86_MCE
972 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
973#endif
974 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
975
976 /* Reserve all the builtin and the syscall vector: */
977 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
978 set_bit(i, used_vectors);
979
980#ifdef CONFIG_IA32_EMULATION
981 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
982 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
983#endif
984
985#ifdef CONFIG_X86_32
986 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
987 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
988#endif
989
990 /*
991 * Set the IDT descriptor to a fixed read-only location, so that the
992 * "sidt" instruction will not leak the location of the kernel, and
993 * to defend the IDT against arbitrary memory write vulnerabilities.
994 * It will be reloaded in cpu_init() */
995 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
996 idt_descr.address = fix_to_virt(FIX_RO_IDT);
997
998 /*
999 * Should be a barrier for any external CPU state:
1000 */
1001 cpu_init();
1002
1003 /*
1004 * X86_TRAP_DB and X86_TRAP_BP have been set
1005 * in early_trap_init(). However, ITS works only after
1006 * cpu_init() loads TSS. See comments in early_trap_init().
1007 */
1008 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
1009 /* int3 can be called from all */
1010 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
1011
1012 x86_init.irqs.trap_init();
1013
1014#ifdef CONFIG_X86_64
1015 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
1016 set_nmi_gate(X86_TRAP_DB, &debug);
1017 set_nmi_gate(X86_TRAP_BP, &int3);
1018#endif
1019}
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12#include <linux/interrupt.h>
13#include <linux/kallsyms.h>
14#include <linux/spinlock.h>
15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
17#include <linux/kdebug.h>
18#include <linux/kgdb.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/ptrace.h>
22#include <linux/string.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/kexec.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/init.h>
29#include <linux/bug.h>
30#include <linux/nmi.h>
31#include <linux/mm.h>
32#include <linux/smp.h>
33#include <linux/io.h>
34
35#ifdef CONFIG_EISA
36#include <linux/ioport.h>
37#include <linux/eisa.h>
38#endif
39
40#ifdef CONFIG_MCA
41#include <linux/mca.h>
42#endif
43
44#if defined(CONFIG_EDAC)
45#include <linux/edac.h>
46#endif
47
48#include <asm/kmemcheck.h>
49#include <asm/stacktrace.h>
50#include <asm/processor.h>
51#include <asm/debugreg.h>
52#include <linux/atomic.h>
53#include <asm/system.h>
54#include <asm/traps.h>
55#include <asm/desc.h>
56#include <asm/i387.h>
57#include <asm/mce.h>
58
59#include <asm/mach_traps.h>
60
61#ifdef CONFIG_X86_64
62#include <asm/x86_init.h>
63#include <asm/pgalloc.h>
64#include <asm/proto.h>
65#else
66#include <asm/processor-flags.h>
67#include <asm/setup.h>
68
69asmlinkage int system_call(void);
70
71/* Do we ignore FPU interrupts ? */
72char ignore_fpu_irq;
73
74/*
75 * The IDT has to be page-aligned to simplify the Pentium
76 * F0 0F bug workaround.
77 */
78gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
79#endif
80
81DECLARE_BITMAP(used_vectors, NR_VECTORS);
82EXPORT_SYMBOL_GPL(used_vectors);
83
84static int ignore_nmis;
85
86int unknown_nmi_panic;
87/*
88 * Prevent NMI reason port (0x61) being accessed simultaneously, can
89 * only be used in NMI handler.
90 */
91static DEFINE_RAW_SPINLOCK(nmi_reason_lock);
92
93static inline void conditional_sti(struct pt_regs *regs)
94{
95 if (regs->flags & X86_EFLAGS_IF)
96 local_irq_enable();
97}
98
99static inline void preempt_conditional_sti(struct pt_regs *regs)
100{
101 inc_preempt_count();
102 if (regs->flags & X86_EFLAGS_IF)
103 local_irq_enable();
104}
105
106static inline void conditional_cli(struct pt_regs *regs)
107{
108 if (regs->flags & X86_EFLAGS_IF)
109 local_irq_disable();
110}
111
112static inline void preempt_conditional_cli(struct pt_regs *regs)
113{
114 if (regs->flags & X86_EFLAGS_IF)
115 local_irq_disable();
116 dec_preempt_count();
117}
118
119static void __kprobes
120do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
121 long error_code, siginfo_t *info)
122{
123 struct task_struct *tsk = current;
124
125#ifdef CONFIG_X86_32
126 if (regs->flags & X86_VM_MASK) {
127 /*
128 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
129 * On nmi (interrupt 2), do_trap should not be called.
130 */
131 if (trapnr < 6)
132 goto vm86_trap;
133 goto trap_signal;
134 }
135#endif
136
137 if (!user_mode(regs))
138 goto kernel_trap;
139
140#ifdef CONFIG_X86_32
141trap_signal:
142#endif
143 /*
144 * We want error_code and trap_no set for userspace faults and
145 * kernelspace faults which result in die(), but not
146 * kernelspace faults which are fixed up. die() gives the
147 * process no chance to handle the signal and notice the
148 * kernel fault information, so that won't result in polluting
149 * the information about previously queued, but not yet
150 * delivered, faults. See also do_general_protection below.
151 */
152 tsk->thread.error_code = error_code;
153 tsk->thread.trap_no = trapnr;
154
155#ifdef CONFIG_X86_64
156 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
157 printk_ratelimit()) {
158 printk(KERN_INFO
159 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
160 tsk->comm, tsk->pid, str,
161 regs->ip, regs->sp, error_code);
162 print_vma_addr(" in ", regs->ip);
163 printk("\n");
164 }
165#endif
166
167 if (info)
168 force_sig_info(signr, info, tsk);
169 else
170 force_sig(signr, tsk);
171 return;
172
173kernel_trap:
174 if (!fixup_exception(regs)) {
175 tsk->thread.error_code = error_code;
176 tsk->thread.trap_no = trapnr;
177 die(str, regs, error_code);
178 }
179 return;
180
181#ifdef CONFIG_X86_32
182vm86_trap:
183 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
184 error_code, trapnr))
185 goto trap_signal;
186 return;
187#endif
188}
189
190#define DO_ERROR(trapnr, signr, str, name) \
191dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
192{ \
193 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
194 == NOTIFY_STOP) \
195 return; \
196 conditional_sti(regs); \
197 do_trap(trapnr, signr, str, regs, error_code, NULL); \
198}
199
200#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
201dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
202{ \
203 siginfo_t info; \
204 info.si_signo = signr; \
205 info.si_errno = 0; \
206 info.si_code = sicode; \
207 info.si_addr = (void __user *)siaddr; \
208 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
209 == NOTIFY_STOP) \
210 return; \
211 conditional_sti(regs); \
212 do_trap(trapnr, signr, str, regs, error_code, &info); \
213}
214
215DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
216DO_ERROR(4, SIGSEGV, "overflow", overflow)
217DO_ERROR(5, SIGSEGV, "bounds", bounds)
218DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
219DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
220DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
221DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
222#ifdef CONFIG_X86_32
223DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
224#endif
225DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
226
227#ifdef CONFIG_X86_64
228/* Runs on IST stack */
229dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
230{
231 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
232 12, SIGBUS) == NOTIFY_STOP)
233 return;
234 preempt_conditional_sti(regs);
235 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
236 preempt_conditional_cli(regs);
237}
238
239dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
240{
241 static const char str[] = "double fault";
242 struct task_struct *tsk = current;
243
244 /* Return not checked because double check cannot be ignored */
245 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
246
247 tsk->thread.error_code = error_code;
248 tsk->thread.trap_no = 8;
249
250 /*
251 * This is always a kernel trap and never fixable (and thus must
252 * never return).
253 */
254 for (;;)
255 die(str, regs, error_code);
256}
257#endif
258
259dotraplinkage void __kprobes
260do_general_protection(struct pt_regs *regs, long error_code)
261{
262 struct task_struct *tsk;
263
264 conditional_sti(regs);
265
266#ifdef CONFIG_X86_32
267 if (regs->flags & X86_VM_MASK)
268 goto gp_in_vm86;
269#endif
270
271 tsk = current;
272 if (!user_mode(regs))
273 goto gp_in_kernel;
274
275 tsk->thread.error_code = error_code;
276 tsk->thread.trap_no = 13;
277
278 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
279 printk_ratelimit()) {
280 printk(KERN_INFO
281 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
282 tsk->comm, task_pid_nr(tsk),
283 regs->ip, regs->sp, error_code);
284 print_vma_addr(" in ", regs->ip);
285 printk("\n");
286 }
287
288 force_sig(SIGSEGV, tsk);
289 return;
290
291#ifdef CONFIG_X86_32
292gp_in_vm86:
293 local_irq_enable();
294 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
295 return;
296#endif
297
298gp_in_kernel:
299 if (fixup_exception(regs))
300 return;
301
302 tsk->thread.error_code = error_code;
303 tsk->thread.trap_no = 13;
304 if (notify_die(DIE_GPF, "general protection fault", regs,
305 error_code, 13, SIGSEGV) == NOTIFY_STOP)
306 return;
307 die("general protection fault", regs, error_code);
308}
309
310static int __init setup_unknown_nmi_panic(char *str)
311{
312 unknown_nmi_panic = 1;
313 return 1;
314}
315__setup("unknown_nmi_panic", setup_unknown_nmi_panic);
316
317static notrace __kprobes void
318pci_serr_error(unsigned char reason, struct pt_regs *regs)
319{
320 pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
321 reason, smp_processor_id());
322
323 /*
324 * On some machines, PCI SERR line is used to report memory
325 * errors. EDAC makes use of it.
326 */
327#if defined(CONFIG_EDAC)
328 if (edac_handler_set()) {
329 edac_atomic_assert_error();
330 return;
331 }
332#endif
333
334 if (panic_on_unrecovered_nmi)
335 panic("NMI: Not continuing");
336
337 pr_emerg("Dazed and confused, but trying to continue\n");
338
339 /* Clear and disable the PCI SERR error line. */
340 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR;
341 outb(reason, NMI_REASON_PORT);
342}
343
344static notrace __kprobes void
345io_check_error(unsigned char reason, struct pt_regs *regs)
346{
347 unsigned long i;
348
349 pr_emerg(
350 "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",
351 reason, smp_processor_id());
352 show_registers(regs);
353
354 if (panic_on_io_nmi)
355 panic("NMI IOCK error: Not continuing");
356
357 /* Re-enable the IOCK line, wait for a few seconds */
358 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK;
359 outb(reason, NMI_REASON_PORT);
360
361 i = 20000;
362 while (--i) {
363 touch_nmi_watchdog();
364 udelay(100);
365 }
366
367 reason &= ~NMI_REASON_CLEAR_IOCHK;
368 outb(reason, NMI_REASON_PORT);
369}
370
371static notrace __kprobes void
372unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
373{
374 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
375 NOTIFY_STOP)
376 return;
377#ifdef CONFIG_MCA
378 /*
379 * Might actually be able to figure out what the guilty party
380 * is:
381 */
382 if (MCA_bus) {
383 mca_handle_nmi();
384 return;
385 }
386#endif
387 pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
388 reason, smp_processor_id());
389
390 pr_emerg("Do you have a strange power saving mode enabled?\n");
391 if (unknown_nmi_panic || panic_on_unrecovered_nmi)
392 panic("NMI: Not continuing");
393
394 pr_emerg("Dazed and confused, but trying to continue\n");
395}
396
397static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
398{
399 unsigned char reason = 0;
400
401 /*
402 * CPU-specific NMI must be processed before non-CPU-specific
403 * NMI, otherwise we may lose it, because the CPU-specific
404 * NMI can not be detected/processed on other CPUs.
405 */
406 if (notify_die(DIE_NMI, "nmi", regs, 0, 2, SIGINT) == NOTIFY_STOP)
407 return;
408
409 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
410 raw_spin_lock(&nmi_reason_lock);
411 reason = get_nmi_reason();
412
413 if (reason & NMI_REASON_MASK) {
414 if (reason & NMI_REASON_SERR)
415 pci_serr_error(reason, regs);
416 else if (reason & NMI_REASON_IOCHK)
417 io_check_error(reason, regs);
418#ifdef CONFIG_X86_32
419 /*
420 * Reassert NMI in case it became active
421 * meanwhile as it's edge-triggered:
422 */
423 reassert_nmi();
424#endif
425 raw_spin_unlock(&nmi_reason_lock);
426 return;
427 }
428 raw_spin_unlock(&nmi_reason_lock);
429
430 unknown_nmi_error(reason, regs);
431}
432
433dotraplinkage notrace __kprobes void
434do_nmi(struct pt_regs *regs, long error_code)
435{
436 nmi_enter();
437
438 inc_irq_stat(__nmi_count);
439
440 if (!ignore_nmis)
441 default_do_nmi(regs);
442
443 nmi_exit();
444}
445
446void stop_nmi(void)
447{
448 ignore_nmis++;
449}
450
451void restart_nmi(void)
452{
453 ignore_nmis--;
454}
455
456/* May run on IST stack. */
457dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
458{
459#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
460 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
461 == NOTIFY_STOP)
462 return;
463#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
464#ifdef CONFIG_KPROBES
465 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
466 == NOTIFY_STOP)
467 return;
468#else
469 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
470 == NOTIFY_STOP)
471 return;
472#endif
473
474 preempt_conditional_sti(regs);
475 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
476 preempt_conditional_cli(regs);
477}
478
479#ifdef CONFIG_X86_64
480/*
481 * Help handler running on IST stack to switch back to user stack
482 * for scheduling or signal handling. The actual stack switch is done in
483 * entry.S
484 */
485asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
486{
487 struct pt_regs *regs = eregs;
488 /* Did already sync */
489 if (eregs == (struct pt_regs *)eregs->sp)
490 ;
491 /* Exception from user space */
492 else if (user_mode(eregs))
493 regs = task_pt_regs(current);
494 /*
495 * Exception from kernel and interrupts are enabled. Move to
496 * kernel process stack.
497 */
498 else if (eregs->flags & X86_EFLAGS_IF)
499 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
500 if (eregs != regs)
501 *regs = *eregs;
502 return regs;
503}
504#endif
505
506/*
507 * Our handling of the processor debug registers is non-trivial.
508 * We do not clear them on entry and exit from the kernel. Therefore
509 * it is possible to get a watchpoint trap here from inside the kernel.
510 * However, the code in ./ptrace.c has ensured that the user can
511 * only set watchpoints on userspace addresses. Therefore the in-kernel
512 * watchpoint trap can only occur in code which is reading/writing
513 * from user space. Such code must not hold kernel locks (since it
514 * can equally take a page fault), therefore it is safe to call
515 * force_sig_info even though that claims and releases locks.
516 *
517 * Code in ./signal.c ensures that the debug control register
518 * is restored before we deliver any signal, and therefore that
519 * user code runs with the correct debug control register even though
520 * we clear it here.
521 *
522 * Being careful here means that we don't have to be as careful in a
523 * lot of more complicated places (task switching can be a bit lazy
524 * about restoring all the debug state, and ptrace doesn't have to
525 * find every occurrence of the TF bit that could be saved away even
526 * by user code)
527 *
528 * May run on IST stack.
529 */
530dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
531{
532 struct task_struct *tsk = current;
533 int user_icebp = 0;
534 unsigned long dr6;
535 int si_code;
536
537 get_debugreg(dr6, 6);
538
539 /* Filter out all the reserved bits which are preset to 1 */
540 dr6 &= ~DR6_RESERVED;
541
542 /*
543 * If dr6 has no reason to give us about the origin of this trap,
544 * then it's very likely the result of an icebp/int01 trap.
545 * User wants a sigtrap for that.
546 */
547 if (!dr6 && user_mode(regs))
548 user_icebp = 1;
549
550 /* Catch kmemcheck conditions first of all! */
551 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
552 return;
553
554 /* DR6 may or may not be cleared by the CPU */
555 set_debugreg(0, 6);
556
557 /*
558 * The processor cleared BTF, so don't mark that we need it set.
559 */
560 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
561
562 /* Store the virtualized DR6 value */
563 tsk->thread.debugreg6 = dr6;
564
565 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
566 SIGTRAP) == NOTIFY_STOP)
567 return;
568
569 /* It's safe to allow irq's after DR6 has been saved */
570 preempt_conditional_sti(regs);
571
572 if (regs->flags & X86_VM_MASK) {
573 handle_vm86_trap((struct kernel_vm86_regs *) regs,
574 error_code, 1);
575 preempt_conditional_cli(regs);
576 return;
577 }
578
579 /*
580 * Single-stepping through system calls: ignore any exceptions in
581 * kernel space, but re-enable TF when returning to user mode.
582 *
583 * We already checked v86 mode above, so we can check for kernel mode
584 * by just checking the CPL of CS.
585 */
586 if ((dr6 & DR_STEP) && !user_mode(regs)) {
587 tsk->thread.debugreg6 &= ~DR_STEP;
588 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
589 regs->flags &= ~X86_EFLAGS_TF;
590 }
591 si_code = get_si_code(tsk->thread.debugreg6);
592 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
593 send_sigtrap(tsk, regs, error_code, si_code);
594 preempt_conditional_cli(regs);
595
596 return;
597}
598
599/*
600 * Note that we play around with the 'TS' bit in an attempt to get
601 * the correct behaviour even in the presence of the asynchronous
602 * IRQ13 behaviour
603 */
604void math_error(struct pt_regs *regs, int error_code, int trapnr)
605{
606 struct task_struct *task = current;
607 siginfo_t info;
608 unsigned short err;
609 char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
610
611 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
612 return;
613 conditional_sti(regs);
614
615 if (!user_mode_vm(regs))
616 {
617 if (!fixup_exception(regs)) {
618 task->thread.error_code = error_code;
619 task->thread.trap_no = trapnr;
620 die(str, regs, error_code);
621 }
622 return;
623 }
624
625 /*
626 * Save the info for the exception handler and clear the error.
627 */
628 save_init_fpu(task);
629 task->thread.trap_no = trapnr;
630 task->thread.error_code = error_code;
631 info.si_signo = SIGFPE;
632 info.si_errno = 0;
633 info.si_addr = (void __user *)regs->ip;
634 if (trapnr == 16) {
635 unsigned short cwd, swd;
636 /*
637 * (~cwd & swd) will mask out exceptions that are not set to unmasked
638 * status. 0x3f is the exception bits in these regs, 0x200 is the
639 * C1 reg you need in case of a stack fault, 0x040 is the stack
640 * fault bit. We should only be taking one exception at a time,
641 * so if this combination doesn't produce any single exception,
642 * then we have a bad program that isn't synchronizing its FPU usage
643 * and it will suffer the consequences since we won't be able to
644 * fully reproduce the context of the exception
645 */
646 cwd = get_fpu_cwd(task);
647 swd = get_fpu_swd(task);
648
649 err = swd & ~cwd;
650 } else {
651 /*
652 * The SIMD FPU exceptions are handled a little differently, as there
653 * is only a single status/control register. Thus, to determine which
654 * unmasked exception was caught we must mask the exception mask bits
655 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
656 */
657 unsigned short mxcsr = get_fpu_mxcsr(task);
658 err = ~(mxcsr >> 7) & mxcsr;
659 }
660
661 if (err & 0x001) { /* Invalid op */
662 /*
663 * swd & 0x240 == 0x040: Stack Underflow
664 * swd & 0x240 == 0x240: Stack Overflow
665 * User must clear the SF bit (0x40) if set
666 */
667 info.si_code = FPE_FLTINV;
668 } else if (err & 0x004) { /* Divide by Zero */
669 info.si_code = FPE_FLTDIV;
670 } else if (err & 0x008) { /* Overflow */
671 info.si_code = FPE_FLTOVF;
672 } else if (err & 0x012) { /* Denormal, Underflow */
673 info.si_code = FPE_FLTUND;
674 } else if (err & 0x020) { /* Precision */
675 info.si_code = FPE_FLTRES;
676 } else {
677 /*
678 * If we're using IRQ 13, or supposedly even some trap 16
679 * implementations, it's possible we get a spurious trap...
680 */
681 return; /* Spurious trap, no error */
682 }
683 force_sig_info(SIGFPE, &info, task);
684}
685
686dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
687{
688#ifdef CONFIG_X86_32
689 ignore_fpu_irq = 1;
690#endif
691
692 math_error(regs, error_code, 16);
693}
694
695dotraplinkage void
696do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
697{
698 math_error(regs, error_code, 19);
699}
700
701dotraplinkage void
702do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
703{
704 conditional_sti(regs);
705#if 0
706 /* No need to warn about this any longer. */
707 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
708#endif
709}
710
711asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
712{
713}
714
715asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
716{
717}
718
719/*
720 * __math_state_restore assumes that cr0.TS is already clear and the
721 * fpu state is all ready for use. Used during context switch.
722 */
723void __math_state_restore(void)
724{
725 struct thread_info *thread = current_thread_info();
726 struct task_struct *tsk = thread->task;
727
728 /*
729 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
730 */
731 if (unlikely(restore_fpu_checking(tsk))) {
732 stts();
733 force_sig(SIGSEGV, tsk);
734 return;
735 }
736
737 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
738 tsk->fpu_counter++;
739}
740
741/*
742 * 'math_state_restore()' saves the current math information in the
743 * old math state array, and gets the new ones from the current task
744 *
745 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
746 * Don't touch unless you *really* know how it works.
747 *
748 * Must be called with kernel preemption disabled (in this case,
749 * local interrupts are disabled at the call-site in entry.S).
750 */
751asmlinkage void math_state_restore(void)
752{
753 struct thread_info *thread = current_thread_info();
754 struct task_struct *tsk = thread->task;
755
756 if (!tsk_used_math(tsk)) {
757 local_irq_enable();
758 /*
759 * does a slab alloc which can sleep
760 */
761 if (init_fpu(tsk)) {
762 /*
763 * ran out of memory!
764 */
765 do_group_exit(SIGKILL);
766 return;
767 }
768 local_irq_disable();
769 }
770
771 clts(); /* Allow maths ops (or we recurse) */
772
773 __math_state_restore();
774}
775EXPORT_SYMBOL_GPL(math_state_restore);
776
777dotraplinkage void __kprobes
778do_device_not_available(struct pt_regs *regs, long error_code)
779{
780#ifdef CONFIG_MATH_EMULATION
781 if (read_cr0() & X86_CR0_EM) {
782 struct math_emu_info info = { };
783
784 conditional_sti(regs);
785
786 info.regs = regs;
787 math_emulate(&info);
788 return;
789 }
790#endif
791 math_state_restore(); /* interrupts still off */
792#ifdef CONFIG_X86_32
793 conditional_sti(regs);
794#endif
795}
796
797#ifdef CONFIG_X86_32
798dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
799{
800 siginfo_t info;
801 local_irq_enable();
802
803 info.si_signo = SIGILL;
804 info.si_errno = 0;
805 info.si_code = ILL_BADSTK;
806 info.si_addr = NULL;
807 if (notify_die(DIE_TRAP, "iret exception",
808 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
809 return;
810 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
811}
812#endif
813
814/* Set of traps needed for early debugging. */
815void __init early_trap_init(void)
816{
817 set_intr_gate_ist(1, &debug, DEBUG_STACK);
818 /* int3 can be called from all */
819 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
820 set_intr_gate(14, &page_fault);
821 load_idt(&idt_descr);
822}
823
824void __init trap_init(void)
825{
826 int i;
827
828#ifdef CONFIG_EISA
829 void __iomem *p = early_ioremap(0x0FFFD9, 4);
830
831 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
832 EISA_bus = 1;
833 early_iounmap(p, 4);
834#endif
835
836 set_intr_gate(0, ÷_error);
837 set_intr_gate_ist(2, &nmi, NMI_STACK);
838 /* int4 can be called from all */
839 set_system_intr_gate(4, &overflow);
840 set_intr_gate(5, &bounds);
841 set_intr_gate(6, &invalid_op);
842 set_intr_gate(7, &device_not_available);
843#ifdef CONFIG_X86_32
844 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
845#else
846 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
847#endif
848 set_intr_gate(9, &coprocessor_segment_overrun);
849 set_intr_gate(10, &invalid_TSS);
850 set_intr_gate(11, &segment_not_present);
851 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
852 set_intr_gate(13, &general_protection);
853 set_intr_gate(15, &spurious_interrupt_bug);
854 set_intr_gate(16, &coprocessor_error);
855 set_intr_gate(17, &alignment_check);
856#ifdef CONFIG_X86_MCE
857 set_intr_gate_ist(18, &machine_check, MCE_STACK);
858#endif
859 set_intr_gate(19, &simd_coprocessor_error);
860
861 /* Reserve all the builtin and the syscall vector: */
862 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
863 set_bit(i, used_vectors);
864
865#ifdef CONFIG_IA32_EMULATION
866 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
867 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
868#endif
869
870#ifdef CONFIG_X86_32
871 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
872 set_bit(SYSCALL_VECTOR, used_vectors);
873#endif
874
875 /*
876 * Should be a barrier for any external CPU state:
877 */
878 cpu_init();
879
880 x86_init.irqs.trap_init();
881}