1#ifndef __ARM_MPU_H
 2#define __ARM_MPU_H
 3
 4#ifdef CONFIG_ARM_MPU
 5
 6/* MPUIR layout */
 7#define MPUIR_nU		1
 8#define MPUIR_DREGION		8
 9#define MPUIR_IREGION		16
10#define MPUIR_DREGION_SZMASK	(0xFF << MPUIR_DREGION)
11#define MPUIR_IREGION_SZMASK	(0xFF << MPUIR_IREGION)
12
13/* ID_MMFR0 data relevant to MPU */
14#define MMFR0_PMSA		(0xF << 4)
15#define MMFR0_PMSAv7		(3 << 4)
16
17/* MPU D/I Size Register fields */
18#define MPU_RSR_SZ		1
19#define MPU_RSR_EN		0
20
21/* The D/I RSR value for an enabled region spanning the whole of memory */
22#define MPU_RSR_ALL_MEM		63
23
24/* Individual bits in the DR/IR ACR */
25#define MPU_ACR_XN		(1 << 12)
26#define MPU_ACR_SHARED		(1 << 2)
27
28/* C, B and TEX[2:0] bits only have semantic meanings when grouped */
29#define MPU_RGN_CACHEABLE	0xB
30#define MPU_RGN_SHARED_CACHEABLE (MPU_RGN_CACHEABLE | MPU_ACR_SHARED)
31#define MPU_RGN_STRONGLY_ORDERED 0
32
33/* Main region should only be shared for SMP */
34#ifdef CONFIG_SMP
35#define MPU_RGN_NORMAL		(MPU_RGN_CACHEABLE | MPU_ACR_SHARED)
36#else
37#define MPU_RGN_NORMAL		MPU_RGN_CACHEABLE
38#endif
39
40/* Access permission bits of ACR (only define those that we use)*/
41#define MPU_AP_PL1RW_PL0RW	(0x3 << 8)
42#define MPU_AP_PL1RW_PL0R0	(0x2 << 8)
43#define MPU_AP_PL1RW_PL0NA	(0x1 << 8)
44
45/* For minimal static MPU region configurations */
46#define MPU_PROBE_REGION	0
47#define MPU_BG_REGION		1
48#define MPU_RAM_REGION		2
49#define MPU_VECTORS_REGION	3
50
51/* Maximum number of regions Linux is interested in */
52#define MPU_MAX_REGIONS		16
53
54#define MPU_DATA_SIDE		0
55#define MPU_INSTR_SIDE		1
56
57#ifndef __ASSEMBLY__
58
59struct mpu_rgn {
60	/* Assume same attributes for d/i-side  */
61	u32 drbar;
62	u32 drsr;
63	u32 dracr;
64};
65
66struct mpu_rgn_info {
67	u32 mpuir;
68	struct mpu_rgn rgns[MPU_MAX_REGIONS];
69};
70extern struct mpu_rgn_info mpu_rgn_info;
71
72#endif /* __ASSEMBLY__ */
73
74#endif /* CONFIG_ARM_MPU */
75
76#endif