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1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/pci.h>
36#include <linux/pci-aspm.h>
37#include <linux/slab.h>
38#include <linux/dma-mapping.h>
39#include <linux/delay.h>
40#include <linux/sched.h>
41#include <linux/skbuff.h>
42#include <linux/netdevice.h>
43#include <linux/firmware.h>
44#include <linux/etherdevice.h>
45#include <linux/if_arp.h>
46
47#include <net/ieee80211_radiotap.h>
48#include <net/mac80211.h>
49
50#include <asm/div64.h>
51
52#define DRV_NAME "iwl3945"
53
54#include "commands.h"
55#include "common.h"
56#include "3945.h"
57#include "iwl-spectrum.h"
58
59/*
60 * module name, copyright, version, etc.
61 */
62
63#define DRV_DESCRIPTION \
64"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
65
66#ifdef CONFIG_IWLEGACY_DEBUG
67#define VD "d"
68#else
69#define VD
70#endif
71
72/*
73 * add "s" to indicate spectrum measurement included.
74 * we add it here to be consistent with previous releases in which
75 * this was configurable.
76 */
77#define DRV_VERSION IWLWIFI_VERSION VD "s"
78#define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
79#define DRV_AUTHOR "<ilw@linux.intel.com>"
80
81MODULE_DESCRIPTION(DRV_DESCRIPTION);
82MODULE_VERSION(DRV_VERSION);
83MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
84MODULE_LICENSE("GPL");
85
86 /* module parameters */
87struct il_mod_params il3945_mod_params = {
88 .sw_crypto = 1,
89 .restart_fw = 1,
90 .disable_hw_scan = 1,
91 /* the rest are 0 by default */
92};
93
94/**
95 * il3945_get_antenna_flags - Get antenna flags for RXON command
96 * @il: eeprom and antenna fields are used to determine antenna flags
97 *
98 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
99 * il3945_mod_params.antenna specifies the antenna diversity mode:
100 *
101 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
102 * IL_ANTENNA_MAIN - Force MAIN antenna
103 * IL_ANTENNA_AUX - Force AUX antenna
104 */
105__le32
106il3945_get_antenna_flags(const struct il_priv *il)
107{
108 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
109
110 switch (il3945_mod_params.antenna) {
111 case IL_ANTENNA_DIVERSITY:
112 return 0;
113
114 case IL_ANTENNA_MAIN:
115 if (eeprom->antenna_switch_type)
116 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
118
119 case IL_ANTENNA_AUX:
120 if (eeprom->antenna_switch_type)
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
123 }
124
125 /* bad antenna selector value */
126 IL_ERR("Bad antenna selector value (0x%x)\n",
127 il3945_mod_params.antenna);
128
129 return 0; /* "diversity" is default if error */
130}
131
132static int
133il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
134 struct ieee80211_key_conf *keyconf, u8 sta_id)
135{
136 unsigned long flags;
137 __le16 key_flags = 0;
138 int ret;
139
140 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
141 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
142
143 if (sta_id == il->hw_params.bcast_id)
144 key_flags |= STA_KEY_MULTICAST_MSK;
145
146 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
147 keyconf->hw_key_idx = keyconf->keyidx;
148 key_flags &= ~STA_KEY_FLG_INVALID;
149
150 spin_lock_irqsave(&il->sta_lock, flags);
151 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
152 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
153 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
154
155 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
156
157 if ((il->stations[sta_id].sta.key.
158 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
159 il->stations[sta_id].sta.key.key_offset =
160 il_get_free_ucode_key_idx(il);
161 /* else, we are overriding an existing key => no need to allocated room
162 * in uCode. */
163
164 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
165 "no space for a new key");
166
167 il->stations[sta_id].sta.key.key_flags = key_flags;
168 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
169 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
170
171 D_INFO("hwcrypto: modify ucode station key info\n");
172
173 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
174
175 spin_unlock_irqrestore(&il->sta_lock, flags);
176
177 return ret;
178}
179
180static int
181il3945_set_tkip_dynamic_key_info(struct il_priv *il,
182 struct ieee80211_key_conf *keyconf, u8 sta_id)
183{
184 return -EOPNOTSUPP;
185}
186
187static int
188il3945_set_wep_dynamic_key_info(struct il_priv *il,
189 struct ieee80211_key_conf *keyconf, u8 sta_id)
190{
191 return -EOPNOTSUPP;
192}
193
194static int
195il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
196{
197 unsigned long flags;
198 struct il_addsta_cmd sta_cmd;
199
200 spin_lock_irqsave(&il->sta_lock, flags);
201 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
202 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
203 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
204 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
205 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
206 memcpy(&sta_cmd, &il->stations[sta_id].sta,
207 sizeof(struct il_addsta_cmd));
208 spin_unlock_irqrestore(&il->sta_lock, flags);
209
210 D_INFO("hwcrypto: clear ucode station key info\n");
211 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
212}
213
214static int
215il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
216 u8 sta_id)
217{
218 int ret = 0;
219
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221
222 switch (keyconf->cipher) {
223 case WLAN_CIPHER_SUITE_CCMP:
224 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
225 break;
226 case WLAN_CIPHER_SUITE_TKIP:
227 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
228 break;
229 case WLAN_CIPHER_SUITE_WEP40:
230 case WLAN_CIPHER_SUITE_WEP104:
231 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
232 break;
233 default:
234 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
235 ret = -EINVAL;
236 }
237
238 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
239 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
240
241 return ret;
242}
243
244static int
245il3945_remove_static_key(struct il_priv *il)
246{
247 int ret = -EOPNOTSUPP;
248
249 return ret;
250}
251
252static int
253il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
254{
255 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
256 key->cipher == WLAN_CIPHER_SUITE_WEP104)
257 return -EOPNOTSUPP;
258
259 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
260 return -EINVAL;
261}
262
263static void
264il3945_clear_free_frames(struct il_priv *il)
265{
266 struct list_head *element;
267
268 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
269
270 while (!list_empty(&il->free_frames)) {
271 element = il->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct il3945_frame, list));
274 il->frames_count--;
275 }
276
277 if (il->frames_count) {
278 IL_WARN("%d frames still in use. Did we lose one?\n",
279 il->frames_count);
280 il->frames_count = 0;
281 }
282}
283
284static struct il3945_frame *
285il3945_get_free_frame(struct il_priv *il)
286{
287 struct il3945_frame *frame;
288 struct list_head *element;
289 if (list_empty(&il->free_frames)) {
290 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
291 if (!frame) {
292 IL_ERR("Could not allocate frame!\n");
293 return NULL;
294 }
295
296 il->frames_count++;
297 return frame;
298 }
299
300 element = il->free_frames.next;
301 list_del(element);
302 return list_entry(element, struct il3945_frame, list);
303}
304
305static void
306il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
307{
308 memset(frame, 0, sizeof(*frame));
309 list_add(&frame->list, &il->free_frames);
310}
311
312unsigned int
313il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
314 int left)
315{
316
317 if (!il_is_associated(il) || !il->beacon_skb)
318 return 0;
319
320 if (il->beacon_skb->len > left)
321 return 0;
322
323 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
324
325 return il->beacon_skb->len;
326}
327
328static int
329il3945_send_beacon_cmd(struct il_priv *il)
330{
331 struct il3945_frame *frame;
332 unsigned int frame_size;
333 int rc;
334 u8 rate;
335
336 frame = il3945_get_free_frame(il);
337
338 if (!frame) {
339 IL_ERR("Could not obtain free frame buffer for beacon "
340 "command.\n");
341 return -ENOMEM;
342 }
343
344 rate = il_get_lowest_plcp(il);
345
346 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
347
348 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
349
350 il3945_free_frame(il, frame);
351
352 return rc;
353}
354
355static void
356il3945_unset_hw_params(struct il_priv *il)
357{
358 if (il->_3945.shared_virt)
359 dma_free_coherent(&il->pci_dev->dev,
360 sizeof(struct il3945_shared),
361 il->_3945.shared_virt, il->_3945.shared_phys);
362}
363
364static void
365il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
366 struct il_device_cmd *cmd,
367 struct sk_buff *skb_frag, int sta_id)
368{
369 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
370 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
371
372 tx_cmd->sec_ctl = 0;
373
374 switch (keyinfo->cipher) {
375 case WLAN_CIPHER_SUITE_CCMP:
376 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
377 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
378 D_TX("tx_cmd with AES hwcrypto\n");
379 break;
380
381 case WLAN_CIPHER_SUITE_TKIP:
382 break;
383
384 case WLAN_CIPHER_SUITE_WEP104:
385 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
386 /* fall through */
387 case WLAN_CIPHER_SUITE_WEP40:
388 tx_cmd->sec_ctl |=
389 TX_CMD_SEC_WEP | (info->control.hw_key->
390 hw_key_idx & TX_CMD_SEC_MSK) <<
391 TX_CMD_SEC_SHIFT;
392
393 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
394
395 D_TX("Configuring packet for WEP encryption " "with key %d\n",
396 info->control.hw_key->hw_key_idx);
397 break;
398
399 default:
400 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
401 break;
402 }
403}
404
405/*
406 * handle build C_TX command notification.
407 */
408static void
409il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
410 struct ieee80211_tx_info *info,
411 struct ieee80211_hdr *hdr, u8 std_id)
412{
413 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
414 __le32 tx_flags = tx_cmd->tx_flags;
415 __le16 fc = hdr->frame_control;
416
417 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
418 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
419 tx_flags |= TX_CMD_FLG_ACK_MSK;
420 if (ieee80211_is_mgmt(fc))
421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 if (ieee80211_is_probe_resp(fc) &&
423 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
424 tx_flags |= TX_CMD_FLG_TSF_MSK;
425 } else {
426 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
427 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
428 }
429
430 tx_cmd->sta_id = std_id;
431 if (ieee80211_has_morefrags(fc))
432 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
433
434 if (ieee80211_is_data_qos(fc)) {
435 u8 *qc = ieee80211_get_qos_ctl(hdr);
436 tx_cmd->tid_tspec = qc[0] & 0xf;
437 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
438 } else {
439 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
440 }
441
442 il_tx_cmd_protection(il, info, fc, &tx_flags);
443
444 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
445 if (ieee80211_is_mgmt(fc)) {
446 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
448 else
449 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
450 } else {
451 tx_cmd->timeout.pm_frame_timeout = 0;
452 }
453
454 tx_cmd->driver_txop = 0;
455 tx_cmd->tx_flags = tx_flags;
456 tx_cmd->next_frame_len = 0;
457}
458
459/*
460 * start C_TX command process
461 */
462static int
463il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
464{
465 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
466 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
467 struct il3945_tx_cmd *tx_cmd;
468 struct il_tx_queue *txq = NULL;
469 struct il_queue *q = NULL;
470 struct il_device_cmd *out_cmd;
471 struct il_cmd_meta *out_meta;
472 dma_addr_t phys_addr;
473 dma_addr_t txcmd_phys;
474 int txq_id = skb_get_queue_mapping(skb);
475 u16 len, idx, hdr_len;
476 u8 id;
477 u8 unicast;
478 u8 sta_id;
479 u8 tid = 0;
480 __le16 fc;
481 u8 wait_write_ptr = 0;
482 unsigned long flags;
483
484 spin_lock_irqsave(&il->lock, flags);
485 if (il_is_rfkill(il)) {
486 D_DROP("Dropping - RF KILL\n");
487 goto drop_unlock;
488 }
489
490 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
491 IL_INVALID_RATE) {
492 IL_ERR("ERROR: No TX rate available.\n");
493 goto drop_unlock;
494 }
495
496 unicast = !is_multicast_ether_addr(hdr->addr1);
497 id = 0;
498
499 fc = hdr->frame_control;
500
501#ifdef CONFIG_IWLEGACY_DEBUG
502 if (ieee80211_is_auth(fc))
503 D_TX("Sending AUTH frame\n");
504 else if (ieee80211_is_assoc_req(fc))
505 D_TX("Sending ASSOC frame\n");
506 else if (ieee80211_is_reassoc_req(fc))
507 D_TX("Sending REASSOC frame\n");
508#endif
509
510 spin_unlock_irqrestore(&il->lock, flags);
511
512 hdr_len = ieee80211_hdrlen(fc);
513
514 /* Find idx into station table for destination station */
515 sta_id = il_sta_id_or_broadcast(il, info->control.sta);
516 if (sta_id == IL_INVALID_STATION) {
517 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
518 goto drop;
519 }
520
521 D_RATE("station Id %d\n", sta_id);
522
523 if (ieee80211_is_data_qos(fc)) {
524 u8 *qc = ieee80211_get_qos_ctl(hdr);
525 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
526 if (unlikely(tid >= MAX_TID_COUNT))
527 goto drop;
528 }
529
530 /* Descriptor for chosen Tx queue */
531 txq = &il->txq[txq_id];
532 q = &txq->q;
533
534 if ((il_queue_space(q) < q->high_mark))
535 goto drop;
536
537 spin_lock_irqsave(&il->lock, flags);
538
539 idx = il_get_cmd_idx(q, q->write_ptr, 0);
540
541 txq->skbs[q->write_ptr] = skb;
542
543 /* Init first empty entry in queue's array of Tx/cmd buffers */
544 out_cmd = txq->cmd[idx];
545 out_meta = &txq->meta[idx];
546 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
547 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
548 memset(tx_cmd, 0, sizeof(*tx_cmd));
549
550 /*
551 * Set up the Tx-command (not MAC!) header.
552 * Store the chosen Tx queue and TFD idx within the sequence field;
553 * after Tx, uCode's Tx response will return this value so driver can
554 * locate the frame within the tx queue and do post-tx processing.
555 */
556 out_cmd->hdr.cmd = C_TX;
557 out_cmd->hdr.sequence =
558 cpu_to_le16((u16)
559 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
560
561 /* Copy MAC header from skb into command buffer */
562 memcpy(tx_cmd->hdr, hdr, hdr_len);
563
564 if (info->control.hw_key)
565 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
566
567 /* TODO need this for burst mode later on */
568 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
569
570 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
571
572 /* Total # bytes to be transmitted */
573 len = (u16) skb->len;
574 tx_cmd->len = cpu_to_le16(len);
575
576 il_update_stats(il, true, fc, len);
577 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
578 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
579
580 if (!ieee80211_has_morefrags(hdr->frame_control)) {
581 txq->need_update = 1;
582 } else {
583 wait_write_ptr = 1;
584 txq->need_update = 0;
585 }
586
587 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
588 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
589 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
590 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
591 ieee80211_hdrlen(fc));
592
593 /*
594 * Use the first empty entry in this queue's command buffer array
595 * to contain the Tx command and MAC header concatenated together
596 * (payload data will be in another buffer).
597 * Size of this varies, due to varying MAC header length.
598 * If end is not dword aligned, we'll have 2 extra bytes at the end
599 * of the MAC header (device reads on dword boundaries).
600 * We'll tell device about this padding later.
601 */
602 len =
603 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
604 hdr_len;
605 len = (len + 3) & ~3;
606
607 /* Physical address of this Tx command's header (not MAC header!),
608 * within command buffer array. */
609 txcmd_phys =
610 pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
611 /* we do not map meta data ... so we can safely access address to
612 * provide to unmap command*/
613 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
614 dma_unmap_len_set(out_meta, len, len);
615
616 /* Add buffer containing Tx command and MAC(!) header to TFD's
617 * first entry */
618 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, 0);
619
620 /* Set up TFD's 2nd entry to point directly to remainder of skb,
621 * if any (802.11 null frames have no payload). */
622 len = skb->len - hdr_len;
623 if (len) {
624 phys_addr =
625 pci_map_single(il->pci_dev, skb->data + hdr_len, len,
626 PCI_DMA_TODEVICE);
627 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, len, 0,
628 U32_PAD(len));
629 }
630
631 /* Tell device the write idx *just past* this latest filled TFD */
632 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
633 il_txq_update_write_ptr(il, txq);
634 spin_unlock_irqrestore(&il->lock, flags);
635
636 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
637 if (wait_write_ptr) {
638 spin_lock_irqsave(&il->lock, flags);
639 txq->need_update = 1;
640 il_txq_update_write_ptr(il, txq);
641 spin_unlock_irqrestore(&il->lock, flags);
642 }
643
644 il_stop_queue(il, txq);
645 }
646
647 return 0;
648
649drop_unlock:
650 spin_unlock_irqrestore(&il->lock, flags);
651drop:
652 return -1;
653}
654
655static int
656il3945_get_measurement(struct il_priv *il,
657 struct ieee80211_measurement_params *params, u8 type)
658{
659 struct il_spectrum_cmd spectrum;
660 struct il_rx_pkt *pkt;
661 struct il_host_cmd cmd = {
662 .id = C_SPECTRUM_MEASUREMENT,
663 .data = (void *)&spectrum,
664 .flags = CMD_WANT_SKB,
665 };
666 u32 add_time = le64_to_cpu(params->start_time);
667 int rc;
668 int spectrum_resp_status;
669 int duration = le16_to_cpu(params->duration);
670
671 if (il_is_associated(il))
672 add_time =
673 il_usecs_to_beacons(il,
674 le64_to_cpu(params->start_time) -
675 il->_3945.last_tsf,
676 le16_to_cpu(il->timing.beacon_interval));
677
678 memset(&spectrum, 0, sizeof(spectrum));
679
680 spectrum.channel_count = cpu_to_le16(1);
681 spectrum.flags =
682 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
683 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
684 cmd.len = sizeof(spectrum);
685 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
686
687 if (il_is_associated(il))
688 spectrum.start_time =
689 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
690 le16_to_cpu(il->timing.beacon_interval));
691 else
692 spectrum.start_time = 0;
693
694 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
695 spectrum.channels[0].channel = params->channel;
696 spectrum.channels[0].type = type;
697 if (il->active.flags & RXON_FLG_BAND_24G_MSK)
698 spectrum.flags |=
699 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
700 RXON_FLG_TGG_PROTECT_MSK;
701
702 rc = il_send_cmd_sync(il, &cmd);
703 if (rc)
704 return rc;
705
706 pkt = (struct il_rx_pkt *)cmd.reply_page;
707 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
708 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
709 rc = -EIO;
710 }
711
712 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
713 switch (spectrum_resp_status) {
714 case 0: /* Command will be handled */
715 if (pkt->u.spectrum.id != 0xff) {
716 D_INFO("Replaced existing measurement: %d\n",
717 pkt->u.spectrum.id);
718 il->measurement_status &= ~MEASUREMENT_READY;
719 }
720 il->measurement_status |= MEASUREMENT_ACTIVE;
721 rc = 0;
722 break;
723
724 case 1: /* Command will not be handled */
725 rc = -EAGAIN;
726 break;
727 }
728
729 il_free_pages(il, cmd.reply_page);
730
731 return rc;
732}
733
734static void
735il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
736{
737 struct il_rx_pkt *pkt = rxb_addr(rxb);
738 struct il_alive_resp *palive;
739 struct delayed_work *pwork;
740
741 palive = &pkt->u.alive_frame;
742
743 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
744 palive->is_valid, palive->ver_type, palive->ver_subtype);
745
746 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
747 D_INFO("Initialization Alive received.\n");
748 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
749 sizeof(struct il_alive_resp));
750 pwork = &il->init_alive_start;
751 } else {
752 D_INFO("Runtime Alive received.\n");
753 memcpy(&il->card_alive, &pkt->u.alive_frame,
754 sizeof(struct il_alive_resp));
755 pwork = &il->alive_start;
756 il3945_disable_events(il);
757 }
758
759 /* We delay the ALIVE response by 5ms to
760 * give the HW RF Kill time to activate... */
761 if (palive->is_valid == UCODE_VALID_OK)
762 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
763 else
764 IL_WARN("uCode did not respond OK.\n");
765}
766
767static void
768il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
769{
770#ifdef CONFIG_IWLEGACY_DEBUG
771 struct il_rx_pkt *pkt = rxb_addr(rxb);
772#endif
773
774 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
775}
776
777static void
778il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
779{
780 struct il_rx_pkt *pkt = rxb_addr(rxb);
781 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
782#ifdef CONFIG_IWLEGACY_DEBUG
783 u8 rate = beacon->beacon_notify_hdr.rate;
784
785 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
786 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
787 beacon->beacon_notify_hdr.failure_frame,
788 le32_to_cpu(beacon->ibss_mgr_status),
789 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
790#endif
791
792 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
793
794}
795
796/* Handle notification from uCode that card's power state is changing
797 * due to software, hardware, or critical temperature RFKILL */
798static void
799il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
800{
801 struct il_rx_pkt *pkt = rxb_addr(rxb);
802 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
803 unsigned long status = il->status;
804
805 IL_WARN("Card state received: HW:%s SW:%s\n",
806 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
807 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
808
809 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
810
811 if (flags & HW_CARD_DISABLED)
812 set_bit(S_RFKILL, &il->status);
813 else
814 clear_bit(S_RFKILL, &il->status);
815
816 il_scan_cancel(il);
817
818 if ((test_bit(S_RFKILL, &status) !=
819 test_bit(S_RFKILL, &il->status)))
820 wiphy_rfkill_set_hw_state(il->hw->wiphy,
821 test_bit(S_RFKILL, &il->status));
822 else
823 wake_up(&il->wait_command_queue);
824}
825
826/**
827 * il3945_setup_handlers - Initialize Rx handler callbacks
828 *
829 * Setup the RX handlers for each of the reply types sent from the uCode
830 * to the host.
831 *
832 * This function chains into the hardware specific files for them to setup
833 * any hardware specific handlers as well.
834 */
835static void
836il3945_setup_handlers(struct il_priv *il)
837{
838 il->handlers[N_ALIVE] = il3945_hdl_alive;
839 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
840 il->handlers[N_ERROR] = il_hdl_error;
841 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
842 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
843 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
844 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
845 il->handlers[N_BEACON] = il3945_hdl_beacon;
846
847 /*
848 * The same handler is used for both the REPLY to a discrete
849 * stats request from the host as well as for the periodic
850 * stats notifications (after received beacons) from the uCode.
851 */
852 il->handlers[C_STATS] = il3945_hdl_c_stats;
853 il->handlers[N_STATS] = il3945_hdl_stats;
854
855 il_setup_rx_scan_handlers(il);
856 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
857
858 /* Set up hardware specific Rx handlers */
859 il3945_hw_handler_setup(il);
860}
861
862/************************** RX-FUNCTIONS ****************************/
863/*
864 * Rx theory of operation
865 *
866 * The host allocates 32 DMA target addresses and passes the host address
867 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
868 * 0 to 31
869 *
870 * Rx Queue Indexes
871 * The host/firmware share two idx registers for managing the Rx buffers.
872 *
873 * The READ idx maps to the first position that the firmware may be writing
874 * to -- the driver can read up to (but not including) this position and get
875 * good data.
876 * The READ idx is managed by the firmware once the card is enabled.
877 *
878 * The WRITE idx maps to the last position the driver has read from -- the
879 * position preceding WRITE is the last slot the firmware can place a packet.
880 *
881 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
882 * WRITE = READ.
883 *
884 * During initialization, the host sets up the READ queue position to the first
885 * IDX position, and WRITE to the last (READ - 1 wrapped)
886 *
887 * When the firmware places a packet in a buffer, it will advance the READ idx
888 * and fire the RX interrupt. The driver can then query the READ idx and
889 * process as many packets as possible, moving the WRITE idx forward as it
890 * resets the Rx queue buffers with new memory.
891 *
892 * The management in the driver is as follows:
893 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
894 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
895 * to replenish the iwl->rxq->rx_free.
896 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
897 * iwl->rxq is replenished and the READ IDX is updated (updating the
898 * 'processed' and 'read' driver idxes as well)
899 * + A received packet is processed and handed to the kernel network stack,
900 * detached from the iwl->rxq. The driver 'processed' idx is updated.
901 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
902 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
903 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
904 * were enough free buffers and RX_STALLED is set it is cleared.
905 *
906 *
907 * Driver sequence:
908 *
909 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
910 * il3945_rx_queue_restock
911 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
912 * queue, updates firmware pointers, and updates
913 * the WRITE idx. If insufficient rx_free buffers
914 * are available, schedules il3945_rx_replenish
915 *
916 * -- enable interrupts --
917 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
918 * READ IDX, detaching the SKB from the pool.
919 * Moves the packet buffer from queue to rx_used.
920 * Calls il3945_rx_queue_restock to refill any empty
921 * slots.
922 * ...
923 *
924 */
925
926/**
927 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
928 */
929static inline __le32
930il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
931{
932 return cpu_to_le32((u32) dma_addr);
933}
934
935/**
936 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
937 *
938 * If there are slots in the RX queue that need to be restocked,
939 * and we have free pre-allocated buffers, fill the ranks as much
940 * as we can, pulling from rx_free.
941 *
942 * This moves the 'write' idx forward to catch up with 'processed', and
943 * also updates the memory address in the firmware to reference the new
944 * target buffer.
945 */
946static void
947il3945_rx_queue_restock(struct il_priv *il)
948{
949 struct il_rx_queue *rxq = &il->rxq;
950 struct list_head *element;
951 struct il_rx_buf *rxb;
952 unsigned long flags;
953 int write;
954
955 spin_lock_irqsave(&rxq->lock, flags);
956 write = rxq->write & ~0x7;
957 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
958 /* Get next free Rx buffer, remove from free list */
959 element = rxq->rx_free.next;
960 rxb = list_entry(element, struct il_rx_buf, list);
961 list_del(element);
962
963 /* Point to Rx buffer via next RBD in circular buffer */
964 rxq->bd[rxq->write] =
965 il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
966 rxq->queue[rxq->write] = rxb;
967 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
968 rxq->free_count--;
969 }
970 spin_unlock_irqrestore(&rxq->lock, flags);
971 /* If the pre-allocated buffer pool is dropping low, schedule to
972 * refill it */
973 if (rxq->free_count <= RX_LOW_WATERMARK)
974 queue_work(il->workqueue, &il->rx_replenish);
975
976 /* If we've added more space for the firmware to place data, tell it.
977 * Increment device's write pointer in multiples of 8. */
978 if (rxq->write_actual != (rxq->write & ~0x7) ||
979 abs(rxq->write - rxq->read) > 7) {
980 spin_lock_irqsave(&rxq->lock, flags);
981 rxq->need_update = 1;
982 spin_unlock_irqrestore(&rxq->lock, flags);
983 il_rx_queue_update_write_ptr(il, rxq);
984 }
985}
986
987/**
988 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
989 *
990 * When moving to rx_free an SKB is allocated for the slot.
991 *
992 * Also restock the Rx queue via il3945_rx_queue_restock.
993 * This is called as a scheduled work item (except for during initialization)
994 */
995static void
996il3945_rx_allocate(struct il_priv *il, gfp_t priority)
997{
998 struct il_rx_queue *rxq = &il->rxq;
999 struct list_head *element;
1000 struct il_rx_buf *rxb;
1001 struct page *page;
1002 unsigned long flags;
1003 gfp_t gfp_mask = priority;
1004
1005 while (1) {
1006 spin_lock_irqsave(&rxq->lock, flags);
1007
1008 if (list_empty(&rxq->rx_used)) {
1009 spin_unlock_irqrestore(&rxq->lock, flags);
1010 return;
1011 }
1012 spin_unlock_irqrestore(&rxq->lock, flags);
1013
1014 if (rxq->free_count > RX_LOW_WATERMARK)
1015 gfp_mask |= __GFP_NOWARN;
1016
1017 if (il->hw_params.rx_page_order > 0)
1018 gfp_mask |= __GFP_COMP;
1019
1020 /* Alloc a new receive buffer */
1021 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1022 if (!page) {
1023 if (net_ratelimit())
1024 D_INFO("Failed to allocate SKB buffer.\n");
1025 if (rxq->free_count <= RX_LOW_WATERMARK &&
1026 net_ratelimit())
1027 IL_ERR("Failed to allocate SKB buffer with %0x."
1028 "Only %u free buffers remaining.\n",
1029 priority, rxq->free_count);
1030 /* We don't reschedule replenish work here -- we will
1031 * call the restock method and if it still needs
1032 * more buffers it will schedule replenish */
1033 break;
1034 }
1035
1036 spin_lock_irqsave(&rxq->lock, flags);
1037 if (list_empty(&rxq->rx_used)) {
1038 spin_unlock_irqrestore(&rxq->lock, flags);
1039 __free_pages(page, il->hw_params.rx_page_order);
1040 return;
1041 }
1042 element = rxq->rx_used.next;
1043 rxb = list_entry(element, struct il_rx_buf, list);
1044 list_del(element);
1045 spin_unlock_irqrestore(&rxq->lock, flags);
1046
1047 rxb->page = page;
1048 /* Get physical address of RB/SKB */
1049 rxb->page_dma =
1050 pci_map_page(il->pci_dev, page, 0,
1051 PAGE_SIZE << il->hw_params.rx_page_order,
1052 PCI_DMA_FROMDEVICE);
1053
1054 spin_lock_irqsave(&rxq->lock, flags);
1055
1056 list_add_tail(&rxb->list, &rxq->rx_free);
1057 rxq->free_count++;
1058 il->alloc_rxb_page++;
1059
1060 spin_unlock_irqrestore(&rxq->lock, flags);
1061 }
1062}
1063
1064void
1065il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1066{
1067 unsigned long flags;
1068 int i;
1069 spin_lock_irqsave(&rxq->lock, flags);
1070 INIT_LIST_HEAD(&rxq->rx_free);
1071 INIT_LIST_HEAD(&rxq->rx_used);
1072 /* Fill the rx_used queue with _all_ of the Rx buffers */
1073 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1074 /* In the reset function, these buffers may have been allocated
1075 * to an SKB, so we need to unmap and free potential storage */
1076 if (rxq->pool[i].page != NULL) {
1077 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1078 PAGE_SIZE << il->hw_params.rx_page_order,
1079 PCI_DMA_FROMDEVICE);
1080 __il_free_pages(il, rxq->pool[i].page);
1081 rxq->pool[i].page = NULL;
1082 }
1083 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1084 }
1085
1086 /* Set us so that we have processed and used all buffers, but have
1087 * not restocked the Rx queue with fresh buffers */
1088 rxq->read = rxq->write = 0;
1089 rxq->write_actual = 0;
1090 rxq->free_count = 0;
1091 spin_unlock_irqrestore(&rxq->lock, flags);
1092}
1093
1094void
1095il3945_rx_replenish(void *data)
1096{
1097 struct il_priv *il = data;
1098 unsigned long flags;
1099
1100 il3945_rx_allocate(il, GFP_KERNEL);
1101
1102 spin_lock_irqsave(&il->lock, flags);
1103 il3945_rx_queue_restock(il);
1104 spin_unlock_irqrestore(&il->lock, flags);
1105}
1106
1107static void
1108il3945_rx_replenish_now(struct il_priv *il)
1109{
1110 il3945_rx_allocate(il, GFP_ATOMIC);
1111
1112 il3945_rx_queue_restock(il);
1113}
1114
1115/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1116 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1117 * This free routine walks the list of POOL entries and if SKB is set to
1118 * non NULL it is unmapped and freed
1119 */
1120static void
1121il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1122{
1123 int i;
1124 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1125 if (rxq->pool[i].page != NULL) {
1126 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1127 PAGE_SIZE << il->hw_params.rx_page_order,
1128 PCI_DMA_FROMDEVICE);
1129 __il_free_pages(il, rxq->pool[i].page);
1130 rxq->pool[i].page = NULL;
1131 }
1132 }
1133
1134 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1135 rxq->bd_dma);
1136 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1137 rxq->rb_stts, rxq->rb_stts_dma);
1138 rxq->bd = NULL;
1139 rxq->rb_stts = NULL;
1140}
1141
1142/* Convert linear signal-to-noise ratio into dB */
1143static u8 ratio2dB[100] = {
1144/* 0 1 2 3 4 5 6 7 8 9 */
1145 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1146 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1147 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1148 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1149 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1150 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1151 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1152 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1153 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1154 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1155};
1156
1157/* Calculates a relative dB value from a ratio of linear
1158 * (i.e. not dB) signal levels.
1159 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1160int
1161il3945_calc_db_from_ratio(int sig_ratio)
1162{
1163 /* 1000:1 or higher just report as 60 dB */
1164 if (sig_ratio >= 1000)
1165 return 60;
1166
1167 /* 100:1 or higher, divide by 10 and use table,
1168 * add 20 dB to make up for divide by 10 */
1169 if (sig_ratio >= 100)
1170 return 20 + (int)ratio2dB[sig_ratio / 10];
1171
1172 /* We shouldn't see this */
1173 if (sig_ratio < 1)
1174 return 0;
1175
1176 /* Use table for ratios 1:1 - 99:1 */
1177 return (int)ratio2dB[sig_ratio];
1178}
1179
1180/**
1181 * il3945_rx_handle - Main entry function for receiving responses from uCode
1182 *
1183 * Uses the il->handlers callback function array to invoke
1184 * the appropriate handlers, including command responses,
1185 * frame-received notifications, and other notifications.
1186 */
1187static void
1188il3945_rx_handle(struct il_priv *il)
1189{
1190 struct il_rx_buf *rxb;
1191 struct il_rx_pkt *pkt;
1192 struct il_rx_queue *rxq = &il->rxq;
1193 u32 r, i;
1194 int reclaim;
1195 unsigned long flags;
1196 u8 fill_rx = 0;
1197 u32 count = 8;
1198 int total_empty = 0;
1199
1200 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1201 * buffer that the driver may process (last buffer filled by ucode). */
1202 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1203 i = rxq->read;
1204
1205 /* calculate total frames need to be restock after handling RX */
1206 total_empty = r - rxq->write_actual;
1207 if (total_empty < 0)
1208 total_empty += RX_QUEUE_SIZE;
1209
1210 if (total_empty > (RX_QUEUE_SIZE / 2))
1211 fill_rx = 1;
1212 /* Rx interrupt, but nothing sent from uCode */
1213 if (i == r)
1214 D_RX("r = %d, i = %d\n", r, i);
1215
1216 while (i != r) {
1217 int len;
1218
1219 rxb = rxq->queue[i];
1220
1221 /* If an RXB doesn't have a Rx queue slot associated with it,
1222 * then a bug has been introduced in the queue refilling
1223 * routines -- catch it here */
1224 BUG_ON(rxb == NULL);
1225
1226 rxq->queue[i] = NULL;
1227
1228 pci_unmap_page(il->pci_dev, rxb->page_dma,
1229 PAGE_SIZE << il->hw_params.rx_page_order,
1230 PCI_DMA_FROMDEVICE);
1231 pkt = rxb_addr(rxb);
1232
1233 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1234 len += sizeof(u32); /* account for status word */
1235
1236 /* Reclaim a command buffer only if this packet is a response
1237 * to a (driver-originated) command.
1238 * If the packet (e.g. Rx frame) originated from uCode,
1239 * there is no command buffer to reclaim.
1240 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1241 * but apparently a few don't get set; catch them here. */
1242 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1243 pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
1244
1245 /* Based on type of command response or notification,
1246 * handle those that need handling via function in
1247 * handlers table. See il3945_setup_handlers() */
1248 if (il->handlers[pkt->hdr.cmd]) {
1249 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1250 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1251 il->isr_stats.handlers[pkt->hdr.cmd]++;
1252 il->handlers[pkt->hdr.cmd] (il, rxb);
1253 } else {
1254 /* No handling needed */
1255 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1256 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1257 }
1258
1259 /*
1260 * XXX: After here, we should always check rxb->page
1261 * against NULL before touching it or its virtual
1262 * memory (pkt). Because some handler might have
1263 * already taken or freed the pages.
1264 */
1265
1266 if (reclaim) {
1267 /* Invoke any callbacks, transfer the buffer to caller,
1268 * and fire off the (possibly) blocking il_send_cmd()
1269 * as we reclaim the driver command queue */
1270 if (rxb->page)
1271 il_tx_cmd_complete(il, rxb);
1272 else
1273 IL_WARN("Claim null rxb?\n");
1274 }
1275
1276 /* Reuse the page if possible. For notification packets and
1277 * SKBs that fail to Rx correctly, add them back into the
1278 * rx_free list for reuse later. */
1279 spin_lock_irqsave(&rxq->lock, flags);
1280 if (rxb->page != NULL) {
1281 rxb->page_dma =
1282 pci_map_page(il->pci_dev, rxb->page, 0,
1283 PAGE_SIZE << il->hw_params.
1284 rx_page_order, PCI_DMA_FROMDEVICE);
1285 list_add_tail(&rxb->list, &rxq->rx_free);
1286 rxq->free_count++;
1287 } else
1288 list_add_tail(&rxb->list, &rxq->rx_used);
1289
1290 spin_unlock_irqrestore(&rxq->lock, flags);
1291
1292 i = (i + 1) & RX_QUEUE_MASK;
1293 /* If there are a lot of unused frames,
1294 * restock the Rx queue so ucode won't assert. */
1295 if (fill_rx) {
1296 count++;
1297 if (count >= 8) {
1298 rxq->read = i;
1299 il3945_rx_replenish_now(il);
1300 count = 0;
1301 }
1302 }
1303 }
1304
1305 /* Backtrack one entry */
1306 rxq->read = i;
1307 if (fill_rx)
1308 il3945_rx_replenish_now(il);
1309 else
1310 il3945_rx_queue_restock(il);
1311}
1312
1313/* call this function to flush any scheduled tasklet */
1314static inline void
1315il3945_synchronize_irq(struct il_priv *il)
1316{
1317 /* wait to make sure we flush pending tasklet */
1318 synchronize_irq(il->pci_dev->irq);
1319 tasklet_kill(&il->irq_tasklet);
1320}
1321
1322static const char *
1323il3945_desc_lookup(int i)
1324{
1325 switch (i) {
1326 case 1:
1327 return "FAIL";
1328 case 2:
1329 return "BAD_PARAM";
1330 case 3:
1331 return "BAD_CHECKSUM";
1332 case 4:
1333 return "NMI_INTERRUPT";
1334 case 5:
1335 return "SYSASSERT";
1336 case 6:
1337 return "FATAL_ERROR";
1338 }
1339
1340 return "UNKNOWN";
1341}
1342
1343#define ERROR_START_OFFSET (1 * sizeof(u32))
1344#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1345
1346void
1347il3945_dump_nic_error_log(struct il_priv *il)
1348{
1349 u32 i;
1350 u32 desc, time, count, base, data1;
1351 u32 blink1, blink2, ilink1, ilink2;
1352
1353 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1354
1355 if (!il3945_hw_valid_rtc_data_addr(base)) {
1356 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1357 return;
1358 }
1359
1360 count = il_read_targ_mem(il, base);
1361
1362 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1363 IL_ERR("Start IWL Error Log Dump:\n");
1364 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1365 }
1366
1367 IL_ERR("Desc Time asrtPC blink2 "
1368 "ilink1 nmiPC Line\n");
1369 for (i = ERROR_START_OFFSET;
1370 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1371 i += ERROR_ELEM_SIZE) {
1372 desc = il_read_targ_mem(il, base + i);
1373 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1374 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1375 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1376 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1377 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1378 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1379
1380 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1381 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1382 ilink1, ilink2, data1);
1383 }
1384}
1385
1386static void
1387il3945_irq_tasklet(struct il_priv *il)
1388{
1389 u32 inta, handled = 0;
1390 u32 inta_fh;
1391 unsigned long flags;
1392#ifdef CONFIG_IWLEGACY_DEBUG
1393 u32 inta_mask;
1394#endif
1395
1396 spin_lock_irqsave(&il->lock, flags);
1397
1398 /* Ack/clear/reset pending uCode interrupts.
1399 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1400 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1401 inta = _il_rd(il, CSR_INT);
1402 _il_wr(il, CSR_INT, inta);
1403
1404 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1405 * Any new interrupts that happen after this, either while we're
1406 * in this tasklet, or later, will show up in next ISR/tasklet. */
1407 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1408 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1409
1410#ifdef CONFIG_IWLEGACY_DEBUG
1411 if (il_get_debug_level(il) & IL_DL_ISR) {
1412 /* just for debug */
1413 inta_mask = _il_rd(il, CSR_INT_MASK);
1414 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1415 inta_mask, inta_fh);
1416 }
1417#endif
1418
1419 spin_unlock_irqrestore(&il->lock, flags);
1420
1421 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1422 * atomic, make sure that inta covers all the interrupts that
1423 * we've discovered, even if FH interrupt came in just after
1424 * reading CSR_INT. */
1425 if (inta_fh & CSR39_FH_INT_RX_MASK)
1426 inta |= CSR_INT_BIT_FH_RX;
1427 if (inta_fh & CSR39_FH_INT_TX_MASK)
1428 inta |= CSR_INT_BIT_FH_TX;
1429
1430 /* Now service all interrupt bits discovered above. */
1431 if (inta & CSR_INT_BIT_HW_ERR) {
1432 IL_ERR("Hardware error detected. Restarting.\n");
1433
1434 /* Tell the device to stop sending interrupts */
1435 il_disable_interrupts(il);
1436
1437 il->isr_stats.hw++;
1438 il_irq_handle_error(il);
1439
1440 handled |= CSR_INT_BIT_HW_ERR;
1441
1442 return;
1443 }
1444#ifdef CONFIG_IWLEGACY_DEBUG
1445 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1446 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1447 if (inta & CSR_INT_BIT_SCD) {
1448 D_ISR("Scheduler finished to transmit "
1449 "the frame/frames.\n");
1450 il->isr_stats.sch++;
1451 }
1452
1453 /* Alive notification via Rx interrupt will do the real work */
1454 if (inta & CSR_INT_BIT_ALIVE) {
1455 D_ISR("Alive interrupt\n");
1456 il->isr_stats.alive++;
1457 }
1458 }
1459#endif
1460 /* Safely ignore these bits for debug checks below */
1461 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1462
1463 /* Error detected by uCode */
1464 if (inta & CSR_INT_BIT_SW_ERR) {
1465 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1466 inta);
1467 il->isr_stats.sw++;
1468 il_irq_handle_error(il);
1469 handled |= CSR_INT_BIT_SW_ERR;
1470 }
1471
1472 /* uCode wakes up after power-down sleep */
1473 if (inta & CSR_INT_BIT_WAKEUP) {
1474 D_ISR("Wakeup interrupt\n");
1475 il_rx_queue_update_write_ptr(il, &il->rxq);
1476 il_txq_update_write_ptr(il, &il->txq[0]);
1477 il_txq_update_write_ptr(il, &il->txq[1]);
1478 il_txq_update_write_ptr(il, &il->txq[2]);
1479 il_txq_update_write_ptr(il, &il->txq[3]);
1480 il_txq_update_write_ptr(il, &il->txq[4]);
1481 il_txq_update_write_ptr(il, &il->txq[5]);
1482
1483 il->isr_stats.wakeup++;
1484 handled |= CSR_INT_BIT_WAKEUP;
1485 }
1486
1487 /* All uCode command responses, including Tx command responses,
1488 * Rx "responses" (frame-received notification), and other
1489 * notifications from uCode come through here*/
1490 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1491 il3945_rx_handle(il);
1492 il->isr_stats.rx++;
1493 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1494 }
1495
1496 if (inta & CSR_INT_BIT_FH_TX) {
1497 D_ISR("Tx interrupt\n");
1498 il->isr_stats.tx++;
1499
1500 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1501 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1502 handled |= CSR_INT_BIT_FH_TX;
1503 }
1504
1505 if (inta & ~handled) {
1506 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1507 il->isr_stats.unhandled++;
1508 }
1509
1510 if (inta & ~il->inta_mask) {
1511 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1512 inta & ~il->inta_mask);
1513 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
1514 }
1515
1516 /* Re-enable all interrupts */
1517 /* only Re-enable if disabled by irq */
1518 if (test_bit(S_INT_ENABLED, &il->status))
1519 il_enable_interrupts(il);
1520
1521#ifdef CONFIG_IWLEGACY_DEBUG
1522 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1523 inta = _il_rd(il, CSR_INT);
1524 inta_mask = _il_rd(il, CSR_INT_MASK);
1525 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1526 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1527 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1528 }
1529#endif
1530}
1531
1532static int
1533il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
1534 u8 is_active, u8 n_probes,
1535 struct il3945_scan_channel *scan_ch,
1536 struct ieee80211_vif *vif)
1537{
1538 struct ieee80211_channel *chan;
1539 const struct ieee80211_supported_band *sband;
1540 const struct il_channel_info *ch_info;
1541 u16 passive_dwell = 0;
1542 u16 active_dwell = 0;
1543 int added, i;
1544
1545 sband = il_get_hw_mode(il, band);
1546 if (!sband)
1547 return 0;
1548
1549 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1550 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1551
1552 if (passive_dwell <= active_dwell)
1553 passive_dwell = active_dwell + 1;
1554
1555 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1556 chan = il->scan_request->channels[i];
1557
1558 if (chan->band != band)
1559 continue;
1560
1561 scan_ch->channel = chan->hw_value;
1562
1563 ch_info = il_get_channel_info(il, band, scan_ch->channel);
1564 if (!il_is_channel_valid(ch_info)) {
1565 D_SCAN("Channel %d is INVALID for this band.\n",
1566 scan_ch->channel);
1567 continue;
1568 }
1569
1570 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1571 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1572 /* If passive , set up for auto-switch
1573 * and use long active_dwell time.
1574 */
1575 if (!is_active || il_is_channel_passive(ch_info) ||
1576 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1577 scan_ch->type = 0; /* passive */
1578 if (IL_UCODE_API(il->ucode_ver) == 1)
1579 scan_ch->active_dwell =
1580 cpu_to_le16(passive_dwell - 1);
1581 } else {
1582 scan_ch->type = 1; /* active */
1583 }
1584
1585 /* Set direct probe bits. These may be used both for active
1586 * scan channels (probes gets sent right away),
1587 * or for passive channels (probes get se sent only after
1588 * hearing clear Rx packet).*/
1589 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1590 if (n_probes)
1591 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1592 } else {
1593 /* uCode v1 does not allow setting direct probe bits on
1594 * passive channel. */
1595 if ((scan_ch->type & 1) && n_probes)
1596 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1597 }
1598
1599 /* Set txpower levels to defaults */
1600 scan_ch->tpc.dsp_atten = 110;
1601 /* scan_pwr_info->tpc.dsp_atten; */
1602
1603 /*scan_pwr_info->tpc.tx_gain; */
1604 if (band == IEEE80211_BAND_5GHZ)
1605 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1606 else {
1607 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1608 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1609 * power level:
1610 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1611 */
1612 }
1613
1614 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1615 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1616 (scan_ch->type & 1) ? active_dwell : passive_dwell);
1617
1618 scan_ch++;
1619 added++;
1620 }
1621
1622 D_SCAN("total channels to scan %d\n", added);
1623 return added;
1624}
1625
1626static void
1627il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1628{
1629 int i;
1630
1631 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1632 rates[i].bitrate = il3945_rates[i].ieee * 5;
1633 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1634 rates[i].hw_value_short = i;
1635 rates[i].flags = 0;
1636 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1637 /*
1638 * If CCK != 1M then set short preamble rate flag.
1639 */
1640 rates[i].flags |=
1641 (il3945_rates[i].plcp ==
1642 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1643 }
1644 }
1645}
1646
1647/******************************************************************************
1648 *
1649 * uCode download functions
1650 *
1651 ******************************************************************************/
1652
1653static void
1654il3945_dealloc_ucode_pci(struct il_priv *il)
1655{
1656 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1657 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1658 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1659 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1660 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1661 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1662}
1663
1664/**
1665 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1666 * looking at all data.
1667 */
1668static int
1669il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1670{
1671 u32 val;
1672 u32 save_len = len;
1673 int rc = 0;
1674 u32 errcnt;
1675
1676 D_INFO("ucode inst image size is %u\n", len);
1677
1678 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1679
1680 errcnt = 0;
1681 for (; len > 0; len -= sizeof(u32), image++) {
1682 /* read data comes through single port, auto-incr addr */
1683 /* NOTE: Use the debugless read so we don't flood kernel log
1684 * if IL_DL_IO is set */
1685 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1686 if (val != le32_to_cpu(*image)) {
1687 IL_ERR("uCode INST section is invalid at "
1688 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1689 save_len - len, val, le32_to_cpu(*image));
1690 rc = -EIO;
1691 errcnt++;
1692 if (errcnt >= 20)
1693 break;
1694 }
1695 }
1696
1697 if (!errcnt)
1698 D_INFO("ucode image in INSTRUCTION memory is good\n");
1699
1700 return rc;
1701}
1702
1703/**
1704 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1705 * using sample data 100 bytes apart. If these sample points are good,
1706 * it's a pretty good bet that everything between them is good, too.
1707 */
1708static int
1709il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1710{
1711 u32 val;
1712 int rc = 0;
1713 u32 errcnt = 0;
1714 u32 i;
1715
1716 D_INFO("ucode inst image size is %u\n", len);
1717
1718 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1719 /* read data comes through single port, auto-incr addr */
1720 /* NOTE: Use the debugless read so we don't flood kernel log
1721 * if IL_DL_IO is set */
1722 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1723 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1724 if (val != le32_to_cpu(*image)) {
1725#if 0 /* Enable this if you want to see details */
1726 IL_ERR("uCode INST section is invalid at "
1727 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1728 *image);
1729#endif
1730 rc = -EIO;
1731 errcnt++;
1732 if (errcnt >= 3)
1733 break;
1734 }
1735 }
1736
1737 return rc;
1738}
1739
1740/**
1741 * il3945_verify_ucode - determine which instruction image is in SRAM,
1742 * and verify its contents
1743 */
1744static int
1745il3945_verify_ucode(struct il_priv *il)
1746{
1747 __le32 *image;
1748 u32 len;
1749 int rc = 0;
1750
1751 /* Try bootstrap */
1752 image = (__le32 *) il->ucode_boot.v_addr;
1753 len = il->ucode_boot.len;
1754 rc = il3945_verify_inst_sparse(il, image, len);
1755 if (rc == 0) {
1756 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1757 return 0;
1758 }
1759
1760 /* Try initialize */
1761 image = (__le32 *) il->ucode_init.v_addr;
1762 len = il->ucode_init.len;
1763 rc = il3945_verify_inst_sparse(il, image, len);
1764 if (rc == 0) {
1765 D_INFO("Initialize uCode is good in inst SRAM\n");
1766 return 0;
1767 }
1768
1769 /* Try runtime/protocol */
1770 image = (__le32 *) il->ucode_code.v_addr;
1771 len = il->ucode_code.len;
1772 rc = il3945_verify_inst_sparse(il, image, len);
1773 if (rc == 0) {
1774 D_INFO("Runtime uCode is good in inst SRAM\n");
1775 return 0;
1776 }
1777
1778 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1779
1780 /* Since nothing seems to match, show first several data entries in
1781 * instruction SRAM, so maybe visual inspection will give a clue.
1782 * Selection of bootstrap image (vs. other images) is arbitrary. */
1783 image = (__le32 *) il->ucode_boot.v_addr;
1784 len = il->ucode_boot.len;
1785 rc = il3945_verify_inst_full(il, image, len);
1786
1787 return rc;
1788}
1789
1790static void
1791il3945_nic_start(struct il_priv *il)
1792{
1793 /* Remove all resets to allow NIC to operate */
1794 _il_wr(il, CSR_RESET, 0);
1795}
1796
1797#define IL3945_UCODE_GET(item) \
1798static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1799{ \
1800 return le32_to_cpu(ucode->v1.item); \
1801}
1802
1803static u32
1804il3945_ucode_get_header_size(u32 api_ver)
1805{
1806 return 24;
1807}
1808
1809static u8 *
1810il3945_ucode_get_data(const struct il_ucode_header *ucode)
1811{
1812 return (u8 *) ucode->v1.data;
1813}
1814
1815IL3945_UCODE_GET(inst_size);
1816IL3945_UCODE_GET(data_size);
1817IL3945_UCODE_GET(init_size);
1818IL3945_UCODE_GET(init_data_size);
1819IL3945_UCODE_GET(boot_size);
1820
1821/**
1822 * il3945_read_ucode - Read uCode images from disk file.
1823 *
1824 * Copy into buffers for card to fetch via bus-mastering
1825 */
1826static int
1827il3945_read_ucode(struct il_priv *il)
1828{
1829 const struct il_ucode_header *ucode;
1830 int ret = -EINVAL, idx;
1831 const struct firmware *ucode_raw;
1832 /* firmware file name contains uCode/driver compatibility version */
1833 const char *name_pre = il->cfg->fw_name_pre;
1834 const unsigned int api_max = il->cfg->ucode_api_max;
1835 const unsigned int api_min = il->cfg->ucode_api_min;
1836 char buf[25];
1837 u8 *src;
1838 size_t len;
1839 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1840
1841 /* Ask kernel firmware_class module to get the boot firmware off disk.
1842 * request_firmware() is synchronous, file is in memory on return. */
1843 for (idx = api_max; idx >= api_min; idx--) {
1844 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1845 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1846 if (ret < 0) {
1847 IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1848 if (ret == -ENOENT)
1849 continue;
1850 else
1851 goto error;
1852 } else {
1853 if (idx < api_max)
1854 IL_ERR("Loaded firmware %s, "
1855 "which is deprecated. "
1856 " Please use API v%u instead.\n", buf,
1857 api_max);
1858 D_INFO("Got firmware '%s' file "
1859 "(%zd bytes) from disk\n", buf, ucode_raw->size);
1860 break;
1861 }
1862 }
1863
1864 if (ret < 0)
1865 goto error;
1866
1867 /* Make sure that we got at least our header! */
1868 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1869 IL_ERR("File size way too small!\n");
1870 ret = -EINVAL;
1871 goto err_release;
1872 }
1873
1874 /* Data from ucode file: header followed by uCode images */
1875 ucode = (struct il_ucode_header *)ucode_raw->data;
1876
1877 il->ucode_ver = le32_to_cpu(ucode->ver);
1878 api_ver = IL_UCODE_API(il->ucode_ver);
1879 inst_size = il3945_ucode_get_inst_size(ucode);
1880 data_size = il3945_ucode_get_data_size(ucode);
1881 init_size = il3945_ucode_get_init_size(ucode);
1882 init_data_size = il3945_ucode_get_init_data_size(ucode);
1883 boot_size = il3945_ucode_get_boot_size(ucode);
1884 src = il3945_ucode_get_data(ucode);
1885
1886 /* api_ver should match the api version forming part of the
1887 * firmware filename ... but we don't check for that and only rely
1888 * on the API version read from firmware header from here on forward */
1889
1890 if (api_ver < api_min || api_ver > api_max) {
1891 IL_ERR("Driver unable to support your firmware API. "
1892 "Driver supports v%u, firmware is v%u.\n", api_max,
1893 api_ver);
1894 il->ucode_ver = 0;
1895 ret = -EINVAL;
1896 goto err_release;
1897 }
1898 if (api_ver != api_max)
1899 IL_ERR("Firmware has old API version. Expected %u, "
1900 "got %u. New firmware can be obtained "
1901 "from http://www.intellinuxwireless.org.\n", api_max,
1902 api_ver);
1903
1904 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1905 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1906 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1907
1908 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1909 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1910 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1911 IL_UCODE_SERIAL(il->ucode_ver));
1912
1913 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1914 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1915 D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1916 D_INFO("f/w package hdr init inst size = %u\n", init_size);
1917 D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1918 D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1919
1920 /* Verify size of file vs. image size info in file's header */
1921 if (ucode_raw->size !=
1922 il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1923 init_size + init_data_size + boot_size) {
1924
1925 D_INFO("uCode file size %zd does not match expected size\n",
1926 ucode_raw->size);
1927 ret = -EINVAL;
1928 goto err_release;
1929 }
1930
1931 /* Verify that uCode images will fit in card's SRAM */
1932 if (inst_size > IL39_MAX_INST_SIZE) {
1933 D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1934 ret = -EINVAL;
1935 goto err_release;
1936 }
1937
1938 if (data_size > IL39_MAX_DATA_SIZE) {
1939 D_INFO("uCode data len %d too large to fit in\n", data_size);
1940 ret = -EINVAL;
1941 goto err_release;
1942 }
1943 if (init_size > IL39_MAX_INST_SIZE) {
1944 D_INFO("uCode init instr len %d too large to fit in\n",
1945 init_size);
1946 ret = -EINVAL;
1947 goto err_release;
1948 }
1949 if (init_data_size > IL39_MAX_DATA_SIZE) {
1950 D_INFO("uCode init data len %d too large to fit in\n",
1951 init_data_size);
1952 ret = -EINVAL;
1953 goto err_release;
1954 }
1955 if (boot_size > IL39_MAX_BSM_SIZE) {
1956 D_INFO("uCode boot instr len %d too large to fit in\n",
1957 boot_size);
1958 ret = -EINVAL;
1959 goto err_release;
1960 }
1961
1962 /* Allocate ucode buffers for card's bus-master loading ... */
1963
1964 /* Runtime instructions and 2 copies of data:
1965 * 1) unmodified from disk
1966 * 2) backup cache for save/restore during power-downs */
1967 il->ucode_code.len = inst_size;
1968 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1969
1970 il->ucode_data.len = data_size;
1971 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1972
1973 il->ucode_data_backup.len = data_size;
1974 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1975
1976 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1977 !il->ucode_data_backup.v_addr)
1978 goto err_pci_alloc;
1979
1980 /* Initialization instructions and data */
1981 if (init_size && init_data_size) {
1982 il->ucode_init.len = init_size;
1983 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1984
1985 il->ucode_init_data.len = init_data_size;
1986 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1987
1988 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1989 goto err_pci_alloc;
1990 }
1991
1992 /* Bootstrap (instructions only, no data) */
1993 if (boot_size) {
1994 il->ucode_boot.len = boot_size;
1995 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
1996
1997 if (!il->ucode_boot.v_addr)
1998 goto err_pci_alloc;
1999 }
2000
2001 /* Copy images into buffers for card's bus-master reads ... */
2002
2003 /* Runtime instructions (first block of data in file) */
2004 len = inst_size;
2005 D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
2006 memcpy(il->ucode_code.v_addr, src, len);
2007 src += len;
2008
2009 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2010 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2011
2012 /* Runtime data (2nd block)
2013 * NOTE: Copy into backup buffer will be done in il3945_up() */
2014 len = data_size;
2015 D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2016 memcpy(il->ucode_data.v_addr, src, len);
2017 memcpy(il->ucode_data_backup.v_addr, src, len);
2018 src += len;
2019
2020 /* Initialization instructions (3rd block) */
2021 if (init_size) {
2022 len = init_size;
2023 D_INFO("Copying (but not loading) init instr len %zd\n", len);
2024 memcpy(il->ucode_init.v_addr, src, len);
2025 src += len;
2026 }
2027
2028 /* Initialization data (4th block) */
2029 if (init_data_size) {
2030 len = init_data_size;
2031 D_INFO("Copying (but not loading) init data len %zd\n", len);
2032 memcpy(il->ucode_init_data.v_addr, src, len);
2033 src += len;
2034 }
2035
2036 /* Bootstrap instructions (5th block) */
2037 len = boot_size;
2038 D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2039 memcpy(il->ucode_boot.v_addr, src, len);
2040
2041 /* We have our copies now, allow OS release its copies */
2042 release_firmware(ucode_raw);
2043 return 0;
2044
2045err_pci_alloc:
2046 IL_ERR("failed to allocate pci memory\n");
2047 ret = -ENOMEM;
2048 il3945_dealloc_ucode_pci(il);
2049
2050err_release:
2051 release_firmware(ucode_raw);
2052
2053error:
2054 return ret;
2055}
2056
2057/**
2058 * il3945_set_ucode_ptrs - Set uCode address location
2059 *
2060 * Tell initialization uCode where to find runtime uCode.
2061 *
2062 * BSM registers initially contain pointers to initialization uCode.
2063 * We need to replace them to load runtime uCode inst and data,
2064 * and to save runtime data when powering down.
2065 */
2066static int
2067il3945_set_ucode_ptrs(struct il_priv *il)
2068{
2069 dma_addr_t pinst;
2070 dma_addr_t pdata;
2071
2072 /* bits 31:0 for 3945 */
2073 pinst = il->ucode_code.p_addr;
2074 pdata = il->ucode_data_backup.p_addr;
2075
2076 /* Tell bootstrap uCode where to find image to load */
2077 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2078 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2079 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2080
2081 /* Inst byte count must be last to set up, bit 31 signals uCode
2082 * that all new ptr/size info is in place */
2083 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2084 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2085
2086 D_INFO("Runtime uCode pointers are set.\n");
2087
2088 return 0;
2089}
2090
2091/**
2092 * il3945_init_alive_start - Called after N_ALIVE notification received
2093 *
2094 * Called after N_ALIVE notification received from "initialize" uCode.
2095 *
2096 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2097 */
2098static void
2099il3945_init_alive_start(struct il_priv *il)
2100{
2101 /* Check alive response for "valid" sign from uCode */
2102 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2103 /* We had an error bringing up the hardware, so take it
2104 * all the way back down so we can try again */
2105 D_INFO("Initialize Alive failed.\n");
2106 goto restart;
2107 }
2108
2109 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2110 * This is a paranoid check, because we would not have gotten the
2111 * "initialize" alive if code weren't properly loaded. */
2112 if (il3945_verify_ucode(il)) {
2113 /* Runtime instruction load was bad;
2114 * take it all the way back down so we can try again */
2115 D_INFO("Bad \"initialize\" uCode load.\n");
2116 goto restart;
2117 }
2118
2119 /* Send pointers to protocol/runtime uCode image ... init code will
2120 * load and launch runtime uCode, which will send us another "Alive"
2121 * notification. */
2122 D_INFO("Initialization Alive received.\n");
2123 if (il3945_set_ucode_ptrs(il)) {
2124 /* Runtime instruction load won't happen;
2125 * take it all the way back down so we can try again */
2126 D_INFO("Couldn't set up uCode pointers.\n");
2127 goto restart;
2128 }
2129 return;
2130
2131restart:
2132 queue_work(il->workqueue, &il->restart);
2133}
2134
2135/**
2136 * il3945_alive_start - called after N_ALIVE notification received
2137 * from protocol/runtime uCode (initialization uCode's
2138 * Alive gets handled by il3945_init_alive_start()).
2139 */
2140static void
2141il3945_alive_start(struct il_priv *il)
2142{
2143 int thermal_spin = 0;
2144 u32 rfkill;
2145
2146 D_INFO("Runtime Alive received.\n");
2147
2148 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2149 /* We had an error bringing up the hardware, so take it
2150 * all the way back down so we can try again */
2151 D_INFO("Alive failed.\n");
2152 goto restart;
2153 }
2154
2155 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2156 * This is a paranoid check, because we would not have gotten the
2157 * "runtime" alive if code weren't properly loaded. */
2158 if (il3945_verify_ucode(il)) {
2159 /* Runtime instruction load was bad;
2160 * take it all the way back down so we can try again */
2161 D_INFO("Bad runtime uCode load.\n");
2162 goto restart;
2163 }
2164
2165 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2166 D_INFO("RFKILL status: 0x%x\n", rfkill);
2167
2168 if (rfkill & 0x1) {
2169 clear_bit(S_RFKILL, &il->status);
2170 /* if RFKILL is not on, then wait for thermal
2171 * sensor in adapter to kick in */
2172 while (il3945_hw_get_temperature(il) == 0) {
2173 thermal_spin++;
2174 udelay(10);
2175 }
2176
2177 if (thermal_spin)
2178 D_INFO("Thermal calibration took %dus\n",
2179 thermal_spin * 10);
2180 } else
2181 set_bit(S_RFKILL, &il->status);
2182
2183 /* After the ALIVE response, we can send commands to 3945 uCode */
2184 set_bit(S_ALIVE, &il->status);
2185
2186 /* Enable watchdog to monitor the driver tx queues */
2187 il_setup_watchdog(il);
2188
2189 if (il_is_rfkill(il))
2190 return;
2191
2192 ieee80211_wake_queues(il->hw);
2193
2194 il->active_rate = RATES_MASK_3945;
2195
2196 il_power_update_mode(il, true);
2197
2198 if (il_is_associated(il)) {
2199 struct il3945_rxon_cmd *active_rxon =
2200 (struct il3945_rxon_cmd *)(&il->active);
2201
2202 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2203 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2204 } else {
2205 /* Initialize our rx_config data */
2206 il_connection_init_rx_config(il);
2207 }
2208
2209 /* Configure Bluetooth device coexistence support */
2210 il_send_bt_config(il);
2211
2212 set_bit(S_READY, &il->status);
2213
2214 /* Configure the adapter for unassociated operation */
2215 il3945_commit_rxon(il);
2216
2217 il3945_reg_txpower_periodic(il);
2218
2219 D_INFO("ALIVE processing complete.\n");
2220 wake_up(&il->wait_command_queue);
2221
2222 return;
2223
2224restart:
2225 queue_work(il->workqueue, &il->restart);
2226}
2227
2228static void il3945_cancel_deferred_work(struct il_priv *il);
2229
2230static void
2231__il3945_down(struct il_priv *il)
2232{
2233 unsigned long flags;
2234 int exit_pending;
2235
2236 D_INFO(DRV_NAME " is going down\n");
2237
2238 il_scan_cancel_timeout(il, 200);
2239
2240 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2241
2242 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2243 * to prevent rearm timer */
2244 del_timer_sync(&il->watchdog);
2245
2246 /* Station information will now be cleared in device */
2247 il_clear_ucode_stations(il);
2248 il_dealloc_bcast_stations(il);
2249 il_clear_driver_stations(il);
2250
2251 /* Unblock any waiting calls */
2252 wake_up_all(&il->wait_command_queue);
2253
2254 /* Wipe out the EXIT_PENDING status bit if we are not actually
2255 * exiting the module */
2256 if (!exit_pending)
2257 clear_bit(S_EXIT_PENDING, &il->status);
2258
2259 /* stop and reset the on-board processor */
2260 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2261
2262 /* tell the device to stop sending interrupts */
2263 spin_lock_irqsave(&il->lock, flags);
2264 il_disable_interrupts(il);
2265 spin_unlock_irqrestore(&il->lock, flags);
2266 il3945_synchronize_irq(il);
2267
2268 if (il->mac80211_registered)
2269 ieee80211_stop_queues(il->hw);
2270
2271 /* If we have not previously called il3945_init() then
2272 * clear all bits but the RF Kill bits and return */
2273 if (!il_is_init(il)) {
2274 il->status =
2275 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2276 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2277 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2278 goto exit;
2279 }
2280
2281 /* ...otherwise clear out all the status bits but the RF Kill
2282 * bit and continue taking the NIC down. */
2283 il->status &=
2284 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2285 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2286 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2287 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2288
2289 /*
2290 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2291 * here is the only thread which will program device registers, but
2292 * still have lockdep assertions, so we are taking reg_lock.
2293 */
2294 spin_lock_irq(&il->reg_lock);
2295 /* FIXME: il_grab_nic_access if rfkill is off ? */
2296
2297 il3945_hw_txq_ctx_stop(il);
2298 il3945_hw_rxq_stop(il);
2299 /* Power-down device's busmaster DMA clocks */
2300 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2301 udelay(5);
2302 /* Stop the device, and put it in low power state */
2303 _il_apm_stop(il);
2304
2305 spin_unlock_irq(&il->reg_lock);
2306
2307 il3945_hw_txq_ctx_free(il);
2308exit:
2309 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2310
2311 if (il->beacon_skb)
2312 dev_kfree_skb(il->beacon_skb);
2313 il->beacon_skb = NULL;
2314
2315 /* clear out any free frames */
2316 il3945_clear_free_frames(il);
2317}
2318
2319static void
2320il3945_down(struct il_priv *il)
2321{
2322 mutex_lock(&il->mutex);
2323 __il3945_down(il);
2324 mutex_unlock(&il->mutex);
2325
2326 il3945_cancel_deferred_work(il);
2327}
2328
2329#define MAX_HW_RESTARTS 5
2330
2331static int
2332il3945_alloc_bcast_station(struct il_priv *il)
2333{
2334 unsigned long flags;
2335 u8 sta_id;
2336
2337 spin_lock_irqsave(&il->sta_lock, flags);
2338 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2339 if (sta_id == IL_INVALID_STATION) {
2340 IL_ERR("Unable to prepare broadcast station\n");
2341 spin_unlock_irqrestore(&il->sta_lock, flags);
2342
2343 return -EINVAL;
2344 }
2345
2346 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2347 il->stations[sta_id].used |= IL_STA_BCAST;
2348 spin_unlock_irqrestore(&il->sta_lock, flags);
2349
2350 return 0;
2351}
2352
2353static int
2354__il3945_up(struct il_priv *il)
2355{
2356 int rc, i;
2357
2358 rc = il3945_alloc_bcast_station(il);
2359 if (rc)
2360 return rc;
2361
2362 if (test_bit(S_EXIT_PENDING, &il->status)) {
2363 IL_WARN("Exit pending; will not bring the NIC up\n");
2364 return -EIO;
2365 }
2366
2367 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2368 IL_ERR("ucode not available for device bring up\n");
2369 return -EIO;
2370 }
2371
2372 /* If platform's RF_KILL switch is NOT set to KILL */
2373 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2374 clear_bit(S_RFKILL, &il->status);
2375 else {
2376 set_bit(S_RFKILL, &il->status);
2377 IL_WARN("Radio disabled by HW RF Kill switch\n");
2378 return -ENODEV;
2379 }
2380
2381 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2382
2383 rc = il3945_hw_nic_init(il);
2384 if (rc) {
2385 IL_ERR("Unable to int nic\n");
2386 return rc;
2387 }
2388
2389 /* make sure rfkill handshake bits are cleared */
2390 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2391 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2392
2393 /* clear (again), then enable host interrupts */
2394 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2395 il_enable_interrupts(il);
2396
2397 /* really make sure rfkill handshake bits are cleared */
2398 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2399 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2400
2401 /* Copy original ucode data image from disk into backup cache.
2402 * This will be used to initialize the on-board processor's
2403 * data SRAM for a clean start when the runtime program first loads. */
2404 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2405 il->ucode_data.len);
2406
2407 /* We return success when we resume from suspend and rf_kill is on. */
2408 if (test_bit(S_RFKILL, &il->status))
2409 return 0;
2410
2411 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2412
2413 /* load bootstrap state machine,
2414 * load bootstrap program into processor's memory,
2415 * prepare to load the "initialize" uCode */
2416 rc = il->ops->load_ucode(il);
2417
2418 if (rc) {
2419 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2420 continue;
2421 }
2422
2423 /* start card; "initialize" will load runtime ucode */
2424 il3945_nic_start(il);
2425
2426 D_INFO(DRV_NAME " is coming up\n");
2427
2428 return 0;
2429 }
2430
2431 set_bit(S_EXIT_PENDING, &il->status);
2432 __il3945_down(il);
2433 clear_bit(S_EXIT_PENDING, &il->status);
2434
2435 /* tried to restart and config the device for as long as our
2436 * patience could withstand */
2437 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2438 return -EIO;
2439}
2440
2441/*****************************************************************************
2442 *
2443 * Workqueue callbacks
2444 *
2445 *****************************************************************************/
2446
2447static void
2448il3945_bg_init_alive_start(struct work_struct *data)
2449{
2450 struct il_priv *il =
2451 container_of(data, struct il_priv, init_alive_start.work);
2452
2453 mutex_lock(&il->mutex);
2454 if (test_bit(S_EXIT_PENDING, &il->status))
2455 goto out;
2456
2457 il3945_init_alive_start(il);
2458out:
2459 mutex_unlock(&il->mutex);
2460}
2461
2462static void
2463il3945_bg_alive_start(struct work_struct *data)
2464{
2465 struct il_priv *il =
2466 container_of(data, struct il_priv, alive_start.work);
2467
2468 mutex_lock(&il->mutex);
2469 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2470 goto out;
2471
2472 il3945_alive_start(il);
2473out:
2474 mutex_unlock(&il->mutex);
2475}
2476
2477/*
2478 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2479 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2480 * *is* readable even when device has been SW_RESET into low power mode
2481 * (e.g. during RF KILL).
2482 */
2483static void
2484il3945_rfkill_poll(struct work_struct *data)
2485{
2486 struct il_priv *il =
2487 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2488 bool old_rfkill = test_bit(S_RFKILL, &il->status);
2489 bool new_rfkill =
2490 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2491
2492 if (new_rfkill != old_rfkill) {
2493 if (new_rfkill)
2494 set_bit(S_RFKILL, &il->status);
2495 else
2496 clear_bit(S_RFKILL, &il->status);
2497
2498 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2499
2500 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2501 new_rfkill ? "disable radio" : "enable radio");
2502 }
2503
2504 /* Keep this running, even if radio now enabled. This will be
2505 * cancelled in mac_start() if system decides to start again */
2506 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2507 round_jiffies_relative(2 * HZ));
2508
2509}
2510
2511int
2512il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2513{
2514 struct il_host_cmd cmd = {
2515 .id = C_SCAN,
2516 .len = sizeof(struct il3945_scan_cmd),
2517 .flags = CMD_SIZE_HUGE,
2518 };
2519 struct il3945_scan_cmd *scan;
2520 u8 n_probes = 0;
2521 enum ieee80211_band band;
2522 bool is_active = false;
2523 int ret;
2524 u16 len;
2525
2526 lockdep_assert_held(&il->mutex);
2527
2528 if (!il->scan_cmd) {
2529 il->scan_cmd =
2530 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2531 GFP_KERNEL);
2532 if (!il->scan_cmd) {
2533 D_SCAN("Fail to allocate scan memory\n");
2534 return -ENOMEM;
2535 }
2536 }
2537 scan = il->scan_cmd;
2538 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2539
2540 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2541 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2542
2543 if (il_is_associated(il)) {
2544 u16 interval;
2545 u32 extra;
2546 u32 suspend_time = 100;
2547 u32 scan_suspend_time = 100;
2548
2549 D_INFO("Scanning while associated...\n");
2550
2551 interval = vif->bss_conf.beacon_int;
2552
2553 scan->suspend_time = 0;
2554 scan->max_out_time = cpu_to_le32(200 * 1024);
2555 if (!interval)
2556 interval = suspend_time;
2557 /*
2558 * suspend time format:
2559 * 0-19: beacon interval in usec (time before exec.)
2560 * 20-23: 0
2561 * 24-31: number of beacons (suspend between channels)
2562 */
2563
2564 extra = (suspend_time / interval) << 24;
2565 scan_suspend_time =
2566 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2567
2568 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2569 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2570 scan_suspend_time, interval);
2571 }
2572
2573 if (il->scan_request->n_ssids) {
2574 int i, p = 0;
2575 D_SCAN("Kicking off active scan\n");
2576 for (i = 0; i < il->scan_request->n_ssids; i++) {
2577 /* always does wildcard anyway */
2578 if (!il->scan_request->ssids[i].ssid_len)
2579 continue;
2580 scan->direct_scan[p].id = WLAN_EID_SSID;
2581 scan->direct_scan[p].len =
2582 il->scan_request->ssids[i].ssid_len;
2583 memcpy(scan->direct_scan[p].ssid,
2584 il->scan_request->ssids[i].ssid,
2585 il->scan_request->ssids[i].ssid_len);
2586 n_probes++;
2587 p++;
2588 }
2589 is_active = true;
2590 } else
2591 D_SCAN("Kicking off passive scan.\n");
2592
2593 /* We don't build a direct scan probe request; the uCode will do
2594 * that based on the direct_mask added to each channel entry */
2595 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2596 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2597 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2598
2599 /* flags + rate selection */
2600
2601 switch (il->scan_band) {
2602 case IEEE80211_BAND_2GHZ:
2603 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2604 scan->tx_cmd.rate = RATE_1M_PLCP;
2605 band = IEEE80211_BAND_2GHZ;
2606 break;
2607 case IEEE80211_BAND_5GHZ:
2608 scan->tx_cmd.rate = RATE_6M_PLCP;
2609 band = IEEE80211_BAND_5GHZ;
2610 break;
2611 default:
2612 IL_WARN("Invalid scan band\n");
2613 return -EIO;
2614 }
2615
2616 /*
2617 * If active scaning is requested but a certain channel is marked
2618 * passive, we can do active scanning if we detect transmissions. For
2619 * passive only scanning disable switching to active on any channel.
2620 */
2621 scan->good_CRC_th =
2622 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2623
2624 len =
2625 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2626 vif->addr, il->scan_request->ie,
2627 il->scan_request->ie_len,
2628 IL_MAX_SCAN_SIZE - sizeof(*scan));
2629 scan->tx_cmd.len = cpu_to_le16(len);
2630
2631 /* select Rx antennas */
2632 scan->flags |= il3945_get_antenna_flags(il);
2633
2634 scan->channel_count =
2635 il3945_get_channels_for_scan(il, band, is_active, n_probes,
2636 (void *)&scan->data[len], vif);
2637 if (scan->channel_count == 0) {
2638 D_SCAN("channel count %d\n", scan->channel_count);
2639 return -EIO;
2640 }
2641
2642 cmd.len +=
2643 le16_to_cpu(scan->tx_cmd.len) +
2644 scan->channel_count * sizeof(struct il3945_scan_channel);
2645 cmd.data = scan;
2646 scan->len = cpu_to_le16(cmd.len);
2647
2648 set_bit(S_SCAN_HW, &il->status);
2649 ret = il_send_cmd_sync(il, &cmd);
2650 if (ret)
2651 clear_bit(S_SCAN_HW, &il->status);
2652 return ret;
2653}
2654
2655void
2656il3945_post_scan(struct il_priv *il)
2657{
2658 /*
2659 * Since setting the RXON may have been deferred while
2660 * performing the scan, fire one off if needed
2661 */
2662 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2663 il3945_commit_rxon(il);
2664}
2665
2666static void
2667il3945_bg_restart(struct work_struct *data)
2668{
2669 struct il_priv *il = container_of(data, struct il_priv, restart);
2670
2671 if (test_bit(S_EXIT_PENDING, &il->status))
2672 return;
2673
2674 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2675 mutex_lock(&il->mutex);
2676 il->is_open = 0;
2677 mutex_unlock(&il->mutex);
2678 il3945_down(il);
2679 ieee80211_restart_hw(il->hw);
2680 } else {
2681 il3945_down(il);
2682
2683 mutex_lock(&il->mutex);
2684 if (test_bit(S_EXIT_PENDING, &il->status)) {
2685 mutex_unlock(&il->mutex);
2686 return;
2687 }
2688
2689 __il3945_up(il);
2690 mutex_unlock(&il->mutex);
2691 }
2692}
2693
2694static void
2695il3945_bg_rx_replenish(struct work_struct *data)
2696{
2697 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2698
2699 mutex_lock(&il->mutex);
2700 if (test_bit(S_EXIT_PENDING, &il->status))
2701 goto out;
2702
2703 il3945_rx_replenish(il);
2704out:
2705 mutex_unlock(&il->mutex);
2706}
2707
2708void
2709il3945_post_associate(struct il_priv *il)
2710{
2711 int rc = 0;
2712 struct ieee80211_conf *conf = NULL;
2713
2714 if (!il->vif || !il->is_open)
2715 return;
2716
2717 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
2718 il->active.bssid_addr);
2719
2720 if (test_bit(S_EXIT_PENDING, &il->status))
2721 return;
2722
2723 il_scan_cancel_timeout(il, 200);
2724
2725 conf = &il->hw->conf;
2726
2727 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2728 il3945_commit_rxon(il);
2729
2730 rc = il_send_rxon_timing(il);
2731 if (rc)
2732 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2733
2734 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2735
2736 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
2737
2738 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
2739 il->vif->bss_conf.beacon_int);
2740
2741 if (il->vif->bss_conf.use_short_preamble)
2742 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2743 else
2744 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2745
2746 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2747 if (il->vif->bss_conf.use_short_slot)
2748 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2749 else
2750 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2751 }
2752
2753 il3945_commit_rxon(il);
2754
2755 switch (il->vif->type) {
2756 case NL80211_IFTYPE_STATION:
2757 il3945_rate_scale_init(il->hw, IL_AP_ID);
2758 break;
2759 case NL80211_IFTYPE_ADHOC:
2760 il3945_send_beacon_cmd(il);
2761 break;
2762 default:
2763 IL_ERR("%s Should not be called in %d mode\n", __func__,
2764 il->vif->type);
2765 break;
2766 }
2767}
2768
2769/*****************************************************************************
2770 *
2771 * mac80211 entry point functions
2772 *
2773 *****************************************************************************/
2774
2775#define UCODE_READY_TIMEOUT (2 * HZ)
2776
2777static int
2778il3945_mac_start(struct ieee80211_hw *hw)
2779{
2780 struct il_priv *il = hw->priv;
2781 int ret;
2782
2783 /* we should be verifying the device is ready to be opened */
2784 mutex_lock(&il->mutex);
2785 D_MAC80211("enter\n");
2786
2787 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2788 * ucode filename and max sizes are card-specific. */
2789
2790 if (!il->ucode_code.len) {
2791 ret = il3945_read_ucode(il);
2792 if (ret) {
2793 IL_ERR("Could not read microcode: %d\n", ret);
2794 mutex_unlock(&il->mutex);
2795 goto out_release_irq;
2796 }
2797 }
2798
2799 ret = __il3945_up(il);
2800
2801 mutex_unlock(&il->mutex);
2802
2803 if (ret)
2804 goto out_release_irq;
2805
2806 D_INFO("Start UP work.\n");
2807
2808 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2809 * mac80211 will not be run successfully. */
2810 ret = wait_event_timeout(il->wait_command_queue,
2811 test_bit(S_READY, &il->status),
2812 UCODE_READY_TIMEOUT);
2813 if (!ret) {
2814 if (!test_bit(S_READY, &il->status)) {
2815 IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2816 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2817 ret = -ETIMEDOUT;
2818 goto out_release_irq;
2819 }
2820 }
2821
2822 /* ucode is running and will send rfkill notifications,
2823 * no need to poll the killswitch state anymore */
2824 cancel_delayed_work(&il->_3945.rfkill_poll);
2825
2826 il->is_open = 1;
2827 D_MAC80211("leave\n");
2828 return 0;
2829
2830out_release_irq:
2831 il->is_open = 0;
2832 D_MAC80211("leave - failed\n");
2833 return ret;
2834}
2835
2836static void
2837il3945_mac_stop(struct ieee80211_hw *hw)
2838{
2839 struct il_priv *il = hw->priv;
2840
2841 D_MAC80211("enter\n");
2842
2843 if (!il->is_open) {
2844 D_MAC80211("leave - skip\n");
2845 return;
2846 }
2847
2848 il->is_open = 0;
2849
2850 il3945_down(il);
2851
2852 flush_workqueue(il->workqueue);
2853
2854 /* start polling the killswitch state again */
2855 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2856 round_jiffies_relative(2 * HZ));
2857
2858 D_MAC80211("leave\n");
2859}
2860
2861static void
2862il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2863{
2864 struct il_priv *il = hw->priv;
2865
2866 D_MAC80211("enter\n");
2867
2868 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2869 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2870
2871 if (il3945_tx_skb(il, skb))
2872 dev_kfree_skb_any(skb);
2873
2874 D_MAC80211("leave\n");
2875}
2876
2877void
2878il3945_config_ap(struct il_priv *il)
2879{
2880 struct ieee80211_vif *vif = il->vif;
2881 int rc = 0;
2882
2883 if (test_bit(S_EXIT_PENDING, &il->status))
2884 return;
2885
2886 /* The following should be done only at AP bring up */
2887 if (!(il_is_associated(il))) {
2888
2889 /* RXON - unassoc (to set timing command) */
2890 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2891 il3945_commit_rxon(il);
2892
2893 /* RXON Timing */
2894 rc = il_send_rxon_timing(il);
2895 if (rc)
2896 IL_WARN("C_RXON_TIMING failed - "
2897 "Attempting to continue.\n");
2898
2899 il->staging.assoc_id = 0;
2900
2901 if (vif->bss_conf.use_short_preamble)
2902 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2903 else
2904 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2905
2906 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2907 if (vif->bss_conf.use_short_slot)
2908 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2909 else
2910 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2911 }
2912 /* restore RXON assoc */
2913 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2914 il3945_commit_rxon(il);
2915 }
2916 il3945_send_beacon_cmd(il);
2917}
2918
2919static int
2920il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2921 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2922 struct ieee80211_key_conf *key)
2923{
2924 struct il_priv *il = hw->priv;
2925 int ret = 0;
2926 u8 sta_id = IL_INVALID_STATION;
2927 u8 static_key;
2928
2929 D_MAC80211("enter\n");
2930
2931 if (il3945_mod_params.sw_crypto) {
2932 D_MAC80211("leave - hwcrypto disabled\n");
2933 return -EOPNOTSUPP;
2934 }
2935
2936 /*
2937 * To support IBSS RSN, don't program group keys in IBSS, the
2938 * hardware will then not attempt to decrypt the frames.
2939 */
2940 if (vif->type == NL80211_IFTYPE_ADHOC &&
2941 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2942 D_MAC80211("leave - IBSS RSN\n");
2943 return -EOPNOTSUPP;
2944 }
2945
2946 static_key = !il_is_associated(il);
2947
2948 if (!static_key) {
2949 sta_id = il_sta_id_or_broadcast(il, sta);
2950 if (sta_id == IL_INVALID_STATION) {
2951 D_MAC80211("leave - station not found\n");
2952 return -EINVAL;
2953 }
2954 }
2955
2956 mutex_lock(&il->mutex);
2957 il_scan_cancel_timeout(il, 100);
2958
2959 switch (cmd) {
2960 case SET_KEY:
2961 if (static_key)
2962 ret = il3945_set_static_key(il, key);
2963 else
2964 ret = il3945_set_dynamic_key(il, key, sta_id);
2965 D_MAC80211("enable hwcrypto key\n");
2966 break;
2967 case DISABLE_KEY:
2968 if (static_key)
2969 ret = il3945_remove_static_key(il);
2970 else
2971 ret = il3945_clear_sta_key_info(il, sta_id);
2972 D_MAC80211("disable hwcrypto key\n");
2973 break;
2974 default:
2975 ret = -EINVAL;
2976 }
2977
2978 D_MAC80211("leave ret %d\n", ret);
2979 mutex_unlock(&il->mutex);
2980
2981 return ret;
2982}
2983
2984static int
2985il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2986 struct ieee80211_sta *sta)
2987{
2988 struct il_priv *il = hw->priv;
2989 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
2990 int ret;
2991 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2992 u8 sta_id;
2993
2994 mutex_lock(&il->mutex);
2995 D_INFO("station %pM\n", sta->addr);
2996 sta_priv->common.sta_id = IL_INVALID_STATION;
2997
2998 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
2999 if (ret) {
3000 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
3001 /* Should we return success if return code is EEXIST ? */
3002 mutex_unlock(&il->mutex);
3003 return ret;
3004 }
3005
3006 sta_priv->common.sta_id = sta_id;
3007
3008 /* Initialize rate scaling */
3009 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
3010 il3945_rs_rate_init(il, sta, sta_id);
3011 mutex_unlock(&il->mutex);
3012
3013 return 0;
3014}
3015
3016static void
3017il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3018 unsigned int *total_flags, u64 multicast)
3019{
3020 struct il_priv *il = hw->priv;
3021 __le32 filter_or = 0, filter_nand = 0;
3022
3023#define CHK(test, flag) do { \
3024 if (*total_flags & (test)) \
3025 filter_or |= (flag); \
3026 else \
3027 filter_nand |= (flag); \
3028 } while (0)
3029
3030 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3031 *total_flags);
3032
3033 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3034 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3035 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3036
3037#undef CHK
3038
3039 mutex_lock(&il->mutex);
3040
3041 il->staging.filter_flags &= ~filter_nand;
3042 il->staging.filter_flags |= filter_or;
3043
3044 /*
3045 * Not committing directly because hardware can perform a scan,
3046 * but even if hw is ready, committing here breaks for some reason,
3047 * we'll eventually commit the filter flags change anyway.
3048 */
3049
3050 mutex_unlock(&il->mutex);
3051
3052 /*
3053 * Receiving all multicast frames is always enabled by the
3054 * default flags setup in il_connection_init_rx_config()
3055 * since we currently do not support programming multicast
3056 * filters into the device.
3057 */
3058 *total_flags &=
3059 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3060 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3061}
3062
3063/*****************************************************************************
3064 *
3065 * sysfs attributes
3066 *
3067 *****************************************************************************/
3068
3069#ifdef CONFIG_IWLEGACY_DEBUG
3070
3071/*
3072 * The following adds a new attribute to the sysfs representation
3073 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3074 * used for controlling the debug level.
3075 *
3076 * See the level definitions in iwl for details.
3077 *
3078 * The debug_level being managed using sysfs below is a per device debug
3079 * level that is used instead of the global debug level if it (the per
3080 * device debug level) is set.
3081 */
3082static ssize_t
3083il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3084 char *buf)
3085{
3086 struct il_priv *il = dev_get_drvdata(d);
3087 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3088}
3089
3090static ssize_t
3091il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3092 const char *buf, size_t count)
3093{
3094 struct il_priv *il = dev_get_drvdata(d);
3095 unsigned long val;
3096 int ret;
3097
3098 ret = strict_strtoul(buf, 0, &val);
3099 if (ret)
3100 IL_INFO("%s is not in hex or decimal form.\n", buf);
3101 else
3102 il->debug_level = val;
3103
3104 return strnlen(buf, count);
3105}
3106
3107static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
3108 il3945_store_debug_level);
3109
3110#endif /* CONFIG_IWLEGACY_DEBUG */
3111
3112static ssize_t
3113il3945_show_temperature(struct device *d, struct device_attribute *attr,
3114 char *buf)
3115{
3116 struct il_priv *il = dev_get_drvdata(d);
3117
3118 if (!il_is_alive(il))
3119 return -EAGAIN;
3120
3121 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3122}
3123
3124static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
3125
3126static ssize_t
3127il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3128{
3129 struct il_priv *il = dev_get_drvdata(d);
3130 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3131}
3132
3133static ssize_t
3134il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3135 const char *buf, size_t count)
3136{
3137 struct il_priv *il = dev_get_drvdata(d);
3138 char *p = (char *)buf;
3139 u32 val;
3140
3141 val = simple_strtoul(p, &p, 10);
3142 if (p == buf)
3143 IL_INFO(": %s is not in decimal form.\n", buf);
3144 else
3145 il3945_hw_reg_set_txpower(il, val);
3146
3147 return count;
3148}
3149
3150static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
3151 il3945_store_tx_power);
3152
3153static ssize_t
3154il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3155{
3156 struct il_priv *il = dev_get_drvdata(d);
3157
3158 return sprintf(buf, "0x%04X\n", il->active.flags);
3159}
3160
3161static ssize_t
3162il3945_store_flags(struct device *d, struct device_attribute *attr,
3163 const char *buf, size_t count)
3164{
3165 struct il_priv *il = dev_get_drvdata(d);
3166 u32 flags = simple_strtoul(buf, NULL, 0);
3167
3168 mutex_lock(&il->mutex);
3169 if (le32_to_cpu(il->staging.flags) != flags) {
3170 /* Cancel any currently running scans... */
3171 if (il_scan_cancel_timeout(il, 100))
3172 IL_WARN("Could not cancel scan.\n");
3173 else {
3174 D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3175 il->staging.flags = cpu_to_le32(flags);
3176 il3945_commit_rxon(il);
3177 }
3178 }
3179 mutex_unlock(&il->mutex);
3180
3181 return count;
3182}
3183
3184static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
3185 il3945_store_flags);
3186
3187static ssize_t
3188il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3189 char *buf)
3190{
3191 struct il_priv *il = dev_get_drvdata(d);
3192
3193 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3194}
3195
3196static ssize_t
3197il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3198 const char *buf, size_t count)
3199{
3200 struct il_priv *il = dev_get_drvdata(d);
3201 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3202
3203 mutex_lock(&il->mutex);
3204 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3205 /* Cancel any currently running scans... */
3206 if (il_scan_cancel_timeout(il, 100))
3207 IL_WARN("Could not cancel scan.\n");
3208 else {
3209 D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3210 filter_flags);
3211 il->staging.filter_flags = cpu_to_le32(filter_flags);
3212 il3945_commit_rxon(il);
3213 }
3214 }
3215 mutex_unlock(&il->mutex);
3216
3217 return count;
3218}
3219
3220static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
3221 il3945_store_filter_flags);
3222
3223static ssize_t
3224il3945_show_measurement(struct device *d, struct device_attribute *attr,
3225 char *buf)
3226{
3227 struct il_priv *il = dev_get_drvdata(d);
3228 struct il_spectrum_notification measure_report;
3229 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3230 u8 *data = (u8 *) &measure_report;
3231 unsigned long flags;
3232
3233 spin_lock_irqsave(&il->lock, flags);
3234 if (!(il->measurement_status & MEASUREMENT_READY)) {
3235 spin_unlock_irqrestore(&il->lock, flags);
3236 return 0;
3237 }
3238 memcpy(&measure_report, &il->measure_report, size);
3239 il->measurement_status = 0;
3240 spin_unlock_irqrestore(&il->lock, flags);
3241
3242 while (size && PAGE_SIZE - len) {
3243 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3244 PAGE_SIZE - len, 1);
3245 len = strlen(buf);
3246 if (PAGE_SIZE - len)
3247 buf[len++] = '\n';
3248
3249 ofs += 16;
3250 size -= min(size, 16U);
3251 }
3252
3253 return len;
3254}
3255
3256static ssize_t
3257il3945_store_measurement(struct device *d, struct device_attribute *attr,
3258 const char *buf, size_t count)
3259{
3260 struct il_priv *il = dev_get_drvdata(d);
3261 struct ieee80211_measurement_params params = {
3262 .channel = le16_to_cpu(il->active.channel),
3263 .start_time = cpu_to_le64(il->_3945.last_tsf),
3264 .duration = cpu_to_le16(1),
3265 };
3266 u8 type = IL_MEASURE_BASIC;
3267 u8 buffer[32];
3268 u8 channel;
3269
3270 if (count) {
3271 char *p = buffer;
3272 strncpy(buffer, buf, min(sizeof(buffer), count));
3273 channel = simple_strtoul(p, NULL, 0);
3274 if (channel)
3275 params.channel = channel;
3276
3277 p = buffer;
3278 while (*p && *p != ' ')
3279 p++;
3280 if (*p)
3281 type = simple_strtoul(p + 1, NULL, 0);
3282 }
3283
3284 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3285 type, params.channel, buf);
3286 il3945_get_measurement(il, ¶ms, type);
3287
3288 return count;
3289}
3290
3291static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
3292 il3945_store_measurement);
3293
3294static ssize_t
3295il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3296 const char *buf, size_t count)
3297{
3298 struct il_priv *il = dev_get_drvdata(d);
3299
3300 il->retry_rate = simple_strtoul(buf, NULL, 0);
3301 if (il->retry_rate <= 0)
3302 il->retry_rate = 1;
3303
3304 return count;
3305}
3306
3307static ssize_t
3308il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3309 char *buf)
3310{
3311 struct il_priv *il = dev_get_drvdata(d);
3312 return sprintf(buf, "%d", il->retry_rate);
3313}
3314
3315static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
3316 il3945_store_retry_rate);
3317
3318static ssize_t
3319il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3320{
3321 /* all this shit doesn't belong into sysfs anyway */
3322 return 0;
3323}
3324
3325static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
3326
3327static ssize_t
3328il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3329{
3330 struct il_priv *il = dev_get_drvdata(d);
3331
3332 if (!il_is_alive(il))
3333 return -EAGAIN;
3334
3335 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3336}
3337
3338static ssize_t
3339il3945_store_antenna(struct device *d, struct device_attribute *attr,
3340 const char *buf, size_t count)
3341{
3342 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3343 int ant;
3344
3345 if (count == 0)
3346 return 0;
3347
3348 if (sscanf(buf, "%1i", &ant) != 1) {
3349 D_INFO("not in hex or decimal form.\n");
3350 return count;
3351 }
3352
3353 if (ant >= 0 && ant <= 2) {
3354 D_INFO("Setting antenna select to %d.\n", ant);
3355 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3356 } else
3357 D_INFO("Bad antenna select value %d.\n", ant);
3358
3359 return count;
3360}
3361
3362static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
3363 il3945_store_antenna);
3364
3365static ssize_t
3366il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3367{
3368 struct il_priv *il = dev_get_drvdata(d);
3369 if (!il_is_alive(il))
3370 return -EAGAIN;
3371 return sprintf(buf, "0x%08x\n", (int)il->status);
3372}
3373
3374static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
3375
3376static ssize_t
3377il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3378 const char *buf, size_t count)
3379{
3380 struct il_priv *il = dev_get_drvdata(d);
3381 char *p = (char *)buf;
3382
3383 if (p[0] == '1')
3384 il3945_dump_nic_error_log(il);
3385
3386 return strnlen(buf, count);
3387}
3388
3389static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
3390
3391/*****************************************************************************
3392 *
3393 * driver setup and tear down
3394 *
3395 *****************************************************************************/
3396
3397static void
3398il3945_setup_deferred_work(struct il_priv *il)
3399{
3400 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3401
3402 init_waitqueue_head(&il->wait_command_queue);
3403
3404 INIT_WORK(&il->restart, il3945_bg_restart);
3405 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3406 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3407 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3408 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3409
3410 il_setup_scan_deferred_work(il);
3411
3412 il3945_hw_setup_deferred_work(il);
3413
3414 init_timer(&il->watchdog);
3415 il->watchdog.data = (unsigned long)il;
3416 il->watchdog.function = il_bg_watchdog;
3417
3418 tasklet_init(&il->irq_tasklet,
3419 (void (*)(unsigned long))il3945_irq_tasklet,
3420 (unsigned long)il);
3421}
3422
3423static void
3424il3945_cancel_deferred_work(struct il_priv *il)
3425{
3426 il3945_hw_cancel_deferred_work(il);
3427
3428 cancel_delayed_work_sync(&il->init_alive_start);
3429 cancel_delayed_work(&il->alive_start);
3430
3431 il_cancel_scan_deferred_work(il);
3432}
3433
3434static struct attribute *il3945_sysfs_entries[] = {
3435 &dev_attr_antenna.attr,
3436 &dev_attr_channels.attr,
3437 &dev_attr_dump_errors.attr,
3438 &dev_attr_flags.attr,
3439 &dev_attr_filter_flags.attr,
3440 &dev_attr_measurement.attr,
3441 &dev_attr_retry_rate.attr,
3442 &dev_attr_status.attr,
3443 &dev_attr_temperature.attr,
3444 &dev_attr_tx_power.attr,
3445#ifdef CONFIG_IWLEGACY_DEBUG
3446 &dev_attr_debug_level.attr,
3447#endif
3448 NULL
3449};
3450
3451static struct attribute_group il3945_attribute_group = {
3452 .name = NULL, /* put in device directory */
3453 .attrs = il3945_sysfs_entries,
3454};
3455
3456struct ieee80211_ops il3945_mac_ops = {
3457 .tx = il3945_mac_tx,
3458 .start = il3945_mac_start,
3459 .stop = il3945_mac_stop,
3460 .add_interface = il_mac_add_interface,
3461 .remove_interface = il_mac_remove_interface,
3462 .change_interface = il_mac_change_interface,
3463 .config = il_mac_config,
3464 .configure_filter = il3945_configure_filter,
3465 .set_key = il3945_mac_set_key,
3466 .conf_tx = il_mac_conf_tx,
3467 .reset_tsf = il_mac_reset_tsf,
3468 .bss_info_changed = il_mac_bss_info_changed,
3469 .hw_scan = il_mac_hw_scan,
3470 .sta_add = il3945_mac_sta_add,
3471 .sta_remove = il_mac_sta_remove,
3472 .tx_last_beacon = il_mac_tx_last_beacon,
3473};
3474
3475static int
3476il3945_init_drv(struct il_priv *il)
3477{
3478 int ret;
3479 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3480
3481 il->retry_rate = 1;
3482 il->beacon_skb = NULL;
3483
3484 spin_lock_init(&il->sta_lock);
3485 spin_lock_init(&il->hcmd_lock);
3486
3487 INIT_LIST_HEAD(&il->free_frames);
3488
3489 mutex_init(&il->mutex);
3490
3491 il->ieee_channels = NULL;
3492 il->ieee_rates = NULL;
3493 il->band = IEEE80211_BAND_2GHZ;
3494
3495 il->iw_mode = NL80211_IFTYPE_STATION;
3496 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3497
3498 /* initialize force reset */
3499 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3500
3501 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3502 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3503 eeprom->version);
3504 ret = -EINVAL;
3505 goto err;
3506 }
3507 ret = il_init_channel_map(il);
3508 if (ret) {
3509 IL_ERR("initializing regulatory failed: %d\n", ret);
3510 goto err;
3511 }
3512
3513 /* Set up txpower settings in driver for all channels */
3514 if (il3945_txpower_set_from_eeprom(il)) {
3515 ret = -EIO;
3516 goto err_free_channel_map;
3517 }
3518
3519 ret = il_init_geos(il);
3520 if (ret) {
3521 IL_ERR("initializing geos failed: %d\n", ret);
3522 goto err_free_channel_map;
3523 }
3524 il3945_init_hw_rates(il, il->ieee_rates);
3525
3526 return 0;
3527
3528err_free_channel_map:
3529 il_free_channel_map(il);
3530err:
3531 return ret;
3532}
3533
3534#define IL3945_MAX_PROBE_REQUEST 200
3535
3536static int
3537il3945_setup_mac(struct il_priv *il)
3538{
3539 int ret;
3540 struct ieee80211_hw *hw = il->hw;
3541
3542 hw->rate_control_algorithm = "iwl-3945-rs";
3543 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3544 hw->vif_data_size = sizeof(struct il_vif_priv);
3545
3546 /* Tell mac80211 our characteristics */
3547 hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
3548
3549 hw->wiphy->interface_modes =
3550 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3551
3552 hw->wiphy->flags |=
3553 WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
3554 WIPHY_FLAG_IBSS_RSN;
3555
3556 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3557 /* we create the 802.11 header and a zero-length SSID element */
3558 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3559
3560 /* Default value; 4 EDCA QOS priorities */
3561 hw->queues = 4;
3562
3563 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
3564 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3565 &il->bands[IEEE80211_BAND_2GHZ];
3566
3567 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
3568 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3569 &il->bands[IEEE80211_BAND_5GHZ];
3570
3571 il_leds_init(il);
3572
3573 ret = ieee80211_register_hw(il->hw);
3574 if (ret) {
3575 IL_ERR("Failed to register hw (error %d)\n", ret);
3576 return ret;
3577 }
3578 il->mac80211_registered = 1;
3579
3580 return 0;
3581}
3582
3583static int
3584il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3585{
3586 int err = 0;
3587 struct il_priv *il;
3588 struct ieee80211_hw *hw;
3589 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3590 struct il3945_eeprom *eeprom;
3591 unsigned long flags;
3592
3593 /***********************
3594 * 1. Allocating HW data
3595 * ********************/
3596
3597 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3598 if (!hw) {
3599 err = -ENOMEM;
3600 goto out;
3601 }
3602 il = hw->priv;
3603 il->hw = hw;
3604 SET_IEEE80211_DEV(hw, &pdev->dev);
3605
3606 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3607
3608 /*
3609 * Disabling hardware scan means that mac80211 will perform scans
3610 * "the hard way", rather than using device's scan.
3611 */
3612 if (il3945_mod_params.disable_hw_scan) {
3613 D_INFO("Disabling hw_scan\n");
3614 il3945_mac_ops.hw_scan = NULL;
3615 }
3616
3617 D_INFO("*** LOAD DRIVER ***\n");
3618 il->cfg = cfg;
3619 il->ops = &il3945_ops;
3620#ifdef CONFIG_IWLEGACY_DEBUGFS
3621 il->debugfs_ops = &il3945_debugfs_ops;
3622#endif
3623 il->pci_dev = pdev;
3624 il->inta_mask = CSR_INI_SET_MASK;
3625
3626 /***************************
3627 * 2. Initializing PCI bus
3628 * *************************/
3629 pci_disable_link_state(pdev,
3630 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3631 PCIE_LINK_STATE_CLKPM);
3632
3633 if (pci_enable_device(pdev)) {
3634 err = -ENODEV;
3635 goto out_ieee80211_free_hw;
3636 }
3637
3638 pci_set_master(pdev);
3639
3640 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3641 if (!err)
3642 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3643 if (err) {
3644 IL_WARN("No suitable DMA available.\n");
3645 goto out_pci_disable_device;
3646 }
3647
3648 pci_set_drvdata(pdev, il);
3649 err = pci_request_regions(pdev, DRV_NAME);
3650 if (err)
3651 goto out_pci_disable_device;
3652
3653 /***********************
3654 * 3. Read REV Register
3655 * ********************/
3656 il->hw_base = pci_ioremap_bar(pdev, 0);
3657 if (!il->hw_base) {
3658 err = -ENODEV;
3659 goto out_pci_release_regions;
3660 }
3661
3662 D_INFO("pci_resource_len = 0x%08llx\n",
3663 (unsigned long long)pci_resource_len(pdev, 0));
3664 D_INFO("pci_resource_base = %p\n", il->hw_base);
3665
3666 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3667 * PCI Tx retries from interfering with C3 CPU state */
3668 pci_write_config_byte(pdev, 0x41, 0x00);
3669
3670 /* these spin locks will be used in apm_init and EEPROM access
3671 * we should init now
3672 */
3673 spin_lock_init(&il->reg_lock);
3674 spin_lock_init(&il->lock);
3675
3676 /*
3677 * stop and reset the on-board processor just in case it is in a
3678 * strange state ... like being left stranded by a primary kernel
3679 * and this is now the kdump kernel trying to start up
3680 */
3681 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3682
3683 /***********************
3684 * 4. Read EEPROM
3685 * ********************/
3686
3687 /* Read the EEPROM */
3688 err = il_eeprom_init(il);
3689 if (err) {
3690 IL_ERR("Unable to init EEPROM\n");
3691 goto out_iounmap;
3692 }
3693 /* MAC Address location in EEPROM same for 3945/4965 */
3694 eeprom = (struct il3945_eeprom *)il->eeprom;
3695 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3696 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3697
3698 /***********************
3699 * 5. Setup HW Constants
3700 * ********************/
3701 /* Device-specific setup */
3702 if (il3945_hw_set_hw_params(il)) {
3703 IL_ERR("failed to set hw settings\n");
3704 goto out_eeprom_free;
3705 }
3706
3707 /***********************
3708 * 6. Setup il
3709 * ********************/
3710
3711 err = il3945_init_drv(il);
3712 if (err) {
3713 IL_ERR("initializing driver failed\n");
3714 goto out_unset_hw_params;
3715 }
3716
3717 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3718
3719 /***********************
3720 * 7. Setup Services
3721 * ********************/
3722
3723 spin_lock_irqsave(&il->lock, flags);
3724 il_disable_interrupts(il);
3725 spin_unlock_irqrestore(&il->lock, flags);
3726
3727 pci_enable_msi(il->pci_dev);
3728
3729 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3730 if (err) {
3731 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3732 goto out_disable_msi;
3733 }
3734
3735 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3736 if (err) {
3737 IL_ERR("failed to create sysfs device attributes\n");
3738 goto out_release_irq;
3739 }
3740
3741 il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]);
3742 il3945_setup_deferred_work(il);
3743 il3945_setup_handlers(il);
3744 il_power_initialize(il);
3745
3746 /*********************************
3747 * 8. Setup and Register mac80211
3748 * *******************************/
3749
3750 il_enable_interrupts(il);
3751
3752 err = il3945_setup_mac(il);
3753 if (err)
3754 goto out_remove_sysfs;
3755
3756 err = il_dbgfs_register(il, DRV_NAME);
3757 if (err)
3758 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
3759 err);
3760
3761 /* Start monitoring the killswitch */
3762 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3763
3764 return 0;
3765
3766out_remove_sysfs:
3767 destroy_workqueue(il->workqueue);
3768 il->workqueue = NULL;
3769 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3770out_release_irq:
3771 free_irq(il->pci_dev->irq, il);
3772out_disable_msi:
3773 pci_disable_msi(il->pci_dev);
3774 il_free_geos(il);
3775 il_free_channel_map(il);
3776out_unset_hw_params:
3777 il3945_unset_hw_params(il);
3778out_eeprom_free:
3779 il_eeprom_free(il);
3780out_iounmap:
3781 iounmap(il->hw_base);
3782out_pci_release_regions:
3783 pci_release_regions(pdev);
3784out_pci_disable_device:
3785 pci_set_drvdata(pdev, NULL);
3786 pci_disable_device(pdev);
3787out_ieee80211_free_hw:
3788 ieee80211_free_hw(il->hw);
3789out:
3790 return err;
3791}
3792
3793static void __devexit
3794il3945_pci_remove(struct pci_dev *pdev)
3795{
3796 struct il_priv *il = pci_get_drvdata(pdev);
3797 unsigned long flags;
3798
3799 if (!il)
3800 return;
3801
3802 D_INFO("*** UNLOAD DRIVER ***\n");
3803
3804 il_dbgfs_unregister(il);
3805
3806 set_bit(S_EXIT_PENDING, &il->status);
3807
3808 il_leds_exit(il);
3809
3810 if (il->mac80211_registered) {
3811 ieee80211_unregister_hw(il->hw);
3812 il->mac80211_registered = 0;
3813 } else {
3814 il3945_down(il);
3815 }
3816
3817 /*
3818 * Make sure device is reset to low power before unloading driver.
3819 * This may be redundant with il_down(), but there are paths to
3820 * run il_down() without calling apm_ops.stop(), and there are
3821 * paths to avoid running il_down() at all before leaving driver.
3822 * This (inexpensive) call *makes sure* device is reset.
3823 */
3824 il_apm_stop(il);
3825
3826 /* make sure we flush any pending irq or
3827 * tasklet for the driver
3828 */
3829 spin_lock_irqsave(&il->lock, flags);
3830 il_disable_interrupts(il);
3831 spin_unlock_irqrestore(&il->lock, flags);
3832
3833 il3945_synchronize_irq(il);
3834
3835 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3836
3837 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3838
3839 il3945_dealloc_ucode_pci(il);
3840
3841 if (il->rxq.bd)
3842 il3945_rx_queue_free(il, &il->rxq);
3843 il3945_hw_txq_ctx_free(il);
3844
3845 il3945_unset_hw_params(il);
3846
3847 /*netif_stop_queue(dev); */
3848 flush_workqueue(il->workqueue);
3849
3850 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3851 * il->workqueue... so we can't take down the workqueue
3852 * until now... */
3853 destroy_workqueue(il->workqueue);
3854 il->workqueue = NULL;
3855
3856 free_irq(pdev->irq, il);
3857 pci_disable_msi(pdev);
3858
3859 iounmap(il->hw_base);
3860 pci_release_regions(pdev);
3861 pci_disable_device(pdev);
3862 pci_set_drvdata(pdev, NULL);
3863
3864 il_free_channel_map(il);
3865 il_free_geos(il);
3866 kfree(il->scan_cmd);
3867 if (il->beacon_skb)
3868 dev_kfree_skb(il->beacon_skb);
3869
3870 ieee80211_free_hw(il->hw);
3871}
3872
3873/*****************************************************************************
3874 *
3875 * driver and module entry point
3876 *
3877 *****************************************************************************/
3878
3879static struct pci_driver il3945_driver = {
3880 .name = DRV_NAME,
3881 .id_table = il3945_hw_card_ids,
3882 .probe = il3945_pci_probe,
3883 .remove = __devexit_p(il3945_pci_remove),
3884 .driver.pm = IL_LEGACY_PM_OPS,
3885};
3886
3887static int __init
3888il3945_init(void)
3889{
3890
3891 int ret;
3892 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3893 pr_info(DRV_COPYRIGHT "\n");
3894
3895 ret = il3945_rate_control_register();
3896 if (ret) {
3897 pr_err("Unable to register rate control algorithm: %d\n", ret);
3898 return ret;
3899 }
3900
3901 ret = pci_register_driver(&il3945_driver);
3902 if (ret) {
3903 pr_err("Unable to initialize PCI module\n");
3904 goto error_register;
3905 }
3906
3907 return ret;
3908
3909error_register:
3910 il3945_rate_control_unregister();
3911 return ret;
3912}
3913
3914static void __exit
3915il3945_exit(void)
3916{
3917 pci_unregister_driver(&il3945_driver);
3918 il3945_rate_control_unregister();
3919}
3920
3921MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3922
3923module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
3924MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3925module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
3926MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3927module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3928 S_IRUGO);
3929MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3930#ifdef CONFIG_IWLEGACY_DEBUG
3931module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
3932MODULE_PARM_DESC(debug, "debug output mask");
3933#endif
3934module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
3935MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3936
3937module_exit(il3945_exit);
3938module_init(il3945_init);