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1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/sched.h>
56#include <linux/string.h>
57#include <linux/timer.h>
58#include <linux/errno.h>
59#include <linux/ioport.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
62#include <linux/pci.h>
63#include <linux/netdevice.h>
64#include <linux/init.h>
65#include <linux/mii.h>
66#include <linux/etherdevice.h>
67#include <linux/skbuff.h>
68#include <linux/delay.h>
69#include <linux/ethtool.h>
70#include <linux/crc32.h>
71#include <linux/bitops.h>
72#include <linux/dma-mapping.h>
73
74#include <asm/processor.h> /* Processor type for cache alignment. */
75#include <asm/io.h>
76#include <asm/irq.h>
77#include <asm/uaccess.h> /* User space memory access functions */
78
79#include "sis900.h"
80
81#define SIS900_MODULE_NAME "sis900"
82#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83
84static const char version[] __devinitconst =
85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86
87static int max_interrupt_work = 40;
88static int multicast_filter_limit = 128;
89
90static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91
92#define SIS900_DEF_MSG \
93 (NETIF_MSG_DRV | \
94 NETIF_MSG_LINK | \
95 NETIF_MSG_RX_ERR | \
96 NETIF_MSG_TX_ERR)
97
98/* Time in jiffies before concluding the transmitter is hung. */
99#define TX_TIMEOUT (4*HZ)
100
101enum {
102 SIS_900 = 0,
103 SIS_7016
104};
105static const char * card_names[] = {
106 "SiS 900 PCI Fast Ethernet",
107 "SiS 7016 PCI Fast Ethernet"
108};
109static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = {
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
114 {0,}
115};
116MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117
118static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119
120static const struct mii_chip_info {
121 const char * name;
122 u16 phy_id0;
123 u16 phy_id1;
124 u8 phy_types;
125#define HOME 0x0001
126#define LAN 0x0002
127#define MIX 0x0003
128#define UNKNOWN 0x0
129} mii_chip_table[] = {
130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
137 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
143 {NULL,},
144};
145
146struct mii_phy {
147 struct mii_phy * next;
148 int phy_addr;
149 u16 phy_id0;
150 u16 phy_id1;
151 u16 status;
152 u8 phy_types;
153};
154
155typedef struct _BufferDesc {
156 u32 link;
157 u32 cmdsts;
158 u32 bufptr;
159} BufferDesc;
160
161struct sis900_private {
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
169 struct mii_if_info mii_info;
170
171 void __iomem *ioaddr;
172
173 struct timer_list timer; /* Link status detection timer. */
174 u8 autong_complete; /* 1: auto-negotiate complete */
175
176 u32 msg_enable;
177
178 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
179 unsigned int cur_tx, dirty_tx;
180
181 /* The saved address of a sent/receive-in-place packet buffer */
182 struct sk_buff *tx_skbuff[NUM_TX_DESC];
183 struct sk_buff *rx_skbuff[NUM_RX_DESC];
184 BufferDesc *tx_ring;
185 BufferDesc *rx_ring;
186
187 dma_addr_t tx_ring_dma;
188 dma_addr_t rx_ring_dma;
189
190 unsigned int tx_full; /* The Tx queue is full. */
191 u8 host_bridge_rev;
192 u8 chipset_rev;
193};
194
195MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
196MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
197MODULE_LICENSE("GPL");
198
199module_param(multicast_filter_limit, int, 0444);
200module_param(max_interrupt_work, int, 0444);
201module_param(sis900_debug, int, 0444);
202MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
203MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
204MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
205
206#define sw32(reg, val) iowrite32(val, ioaddr + (reg))
207#define sw8(reg, val) iowrite8(val, ioaddr + (reg))
208#define sr32(reg) ioread32(ioaddr + (reg))
209#define sr16(reg) ioread16(ioaddr + (reg))
210
211#ifdef CONFIG_NET_POLL_CONTROLLER
212static void sis900_poll(struct net_device *dev);
213#endif
214static int sis900_open(struct net_device *net_dev);
215static int sis900_mii_probe (struct net_device * net_dev);
216static void sis900_init_rxfilter (struct net_device * net_dev);
217static u16 read_eeprom(void __iomem *ioaddr, int location);
218static int mdio_read(struct net_device *net_dev, int phy_id, int location);
219static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
220static void sis900_timer(unsigned long data);
221static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
222static void sis900_tx_timeout(struct net_device *net_dev);
223static void sis900_init_tx_ring(struct net_device *net_dev);
224static void sis900_init_rx_ring(struct net_device *net_dev);
225static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
226 struct net_device *net_dev);
227static int sis900_rx(struct net_device *net_dev);
228static void sis900_finish_xmit (struct net_device *net_dev);
229static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
230static int sis900_close(struct net_device *net_dev);
231static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
232static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
233static void set_rx_mode(struct net_device *net_dev);
234static void sis900_reset(struct net_device *net_dev);
235static void sis630_set_eq(struct net_device *net_dev, u8 revision);
236static int sis900_set_config(struct net_device *dev, struct ifmap *map);
237static u16 sis900_default_phy(struct net_device * net_dev);
238static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
239static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
240static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
241static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
242static const struct ethtool_ops sis900_ethtool_ops;
243
244/**
245 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
246 * @pci_dev: the sis900 pci device
247 * @net_dev: the net device to get address for
248 *
249 * Older SiS900 and friends, use EEPROM to store MAC address.
250 * MAC address is read from read_eeprom() into @net_dev->dev_addr and
251 * @net_dev->perm_addr.
252 */
253
254static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
255{
256 struct sis900_private *sis_priv = netdev_priv(net_dev);
257 void __iomem *ioaddr = sis_priv->ioaddr;
258 u16 signature;
259 int i;
260
261 /* check to see if we have sane EEPROM */
262 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
263 if (signature == 0xffff || signature == 0x0000) {
264 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
265 pci_name(pci_dev), signature);
266 return 0;
267 }
268
269 /* get MAC address from EEPROM */
270 for (i = 0; i < 3; i++)
271 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
272
273 /* Store MAC Address in perm_addr */
274 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
275
276 return 1;
277}
278
279/**
280 * sis630e_get_mac_addr - Get MAC address for SiS630E model
281 * @pci_dev: the sis900 pci device
282 * @net_dev: the net device to get address for
283 *
284 * SiS630E model, use APC CMOS RAM to store MAC address.
285 * APC CMOS RAM is accessed through ISA bridge.
286 * MAC address is read into @net_dev->dev_addr and
287 * @net_dev->perm_addr.
288 */
289
290static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
291 struct net_device *net_dev)
292{
293 struct pci_dev *isa_bridge = NULL;
294 u8 reg;
295 int i;
296
297 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
298 if (!isa_bridge)
299 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
300 if (!isa_bridge) {
301 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
302 pci_name(pci_dev));
303 return 0;
304 }
305 pci_read_config_byte(isa_bridge, 0x48, ®);
306 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
307
308 for (i = 0; i < 6; i++) {
309 outb(0x09 + i, 0x70);
310 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
311 }
312
313 /* Store MAC Address in perm_addr */
314 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
315
316 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
317 pci_dev_put(isa_bridge);
318
319 return 1;
320}
321
322
323/**
324 * sis635_get_mac_addr - Get MAC address for SIS635 model
325 * @pci_dev: the sis900 pci device
326 * @net_dev: the net device to get address for
327 *
328 * SiS635 model, set MAC Reload Bit to load Mac address from APC
329 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
330 * @net_dev->dev_addr and @net_dev->perm_addr.
331 */
332
333static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
334 struct net_device *net_dev)
335{
336 struct sis900_private *sis_priv = netdev_priv(net_dev);
337 void __iomem *ioaddr = sis_priv->ioaddr;
338 u32 rfcrSave;
339 u32 i;
340
341 rfcrSave = sr32(rfcr);
342
343 sw32(cr, rfcrSave | RELOAD);
344 sw32(cr, 0);
345
346 /* disable packet filtering before setting filter */
347 sw32(rfcr, rfcrSave & ~RFEN);
348
349 /* load MAC addr to filter data register */
350 for (i = 0 ; i < 3 ; i++) {
351 sw32(rfcr, (i << RFADDR_shift));
352 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
353 }
354
355 /* Store MAC Address in perm_addr */
356 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
357
358 /* enable packet filtering */
359 sw32(rfcr, rfcrSave | RFEN);
360
361 return 1;
362}
363
364/**
365 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
366 * @pci_dev: the sis900 pci device
367 * @net_dev: the net device to get address for
368 *
369 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
370 * is shared by
371 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
372 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
373 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
374 * EEDONE signal to refuse EEPROM access by LAN.
375 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
376 * The signature field in SiS962 or SiS963 spec is meaningless.
377 * MAC address is read into @net_dev->dev_addr and @net_dev->perm_addr.
378 */
379
380static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
381 struct net_device *net_dev)
382{
383 struct sis900_private *sis_priv = netdev_priv(net_dev);
384 void __iomem *ioaddr = sis_priv->ioaddr;
385 int wait, rc = 0;
386
387 sw32(mear, EEREQ);
388 for (wait = 0; wait < 2000; wait++) {
389 if (sr32(mear) & EEGNT) {
390 u16 *mac = (u16 *)net_dev->dev_addr;
391 int i;
392
393 /* get MAC address from EEPROM */
394 for (i = 0; i < 3; i++)
395 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
396
397 /* Store MAC Address in perm_addr */
398 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
399
400 rc = 1;
401 break;
402 }
403 udelay(1);
404 }
405 sw32(mear, EEDONE);
406 return rc;
407}
408
409static const struct net_device_ops sis900_netdev_ops = {
410 .ndo_open = sis900_open,
411 .ndo_stop = sis900_close,
412 .ndo_start_xmit = sis900_start_xmit,
413 .ndo_set_config = sis900_set_config,
414 .ndo_set_rx_mode = set_rx_mode,
415 .ndo_change_mtu = eth_change_mtu,
416 .ndo_validate_addr = eth_validate_addr,
417 .ndo_set_mac_address = eth_mac_addr,
418 .ndo_do_ioctl = mii_ioctl,
419 .ndo_tx_timeout = sis900_tx_timeout,
420#ifdef CONFIG_NET_POLL_CONTROLLER
421 .ndo_poll_controller = sis900_poll,
422#endif
423};
424
425/**
426 * sis900_probe - Probe for sis900 device
427 * @pci_dev: the sis900 pci device
428 * @pci_id: the pci device ID
429 *
430 * Check and probe sis900 net device for @pci_dev.
431 * Get mac address according to the chip revision,
432 * and assign SiS900-specific entries in the device structure.
433 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
434 */
435
436static int __devinit sis900_probe(struct pci_dev *pci_dev,
437 const struct pci_device_id *pci_id)
438{
439 struct sis900_private *sis_priv;
440 struct net_device *net_dev;
441 struct pci_dev *dev;
442 dma_addr_t ring_dma;
443 void *ring_space;
444 void __iomem *ioaddr;
445 int i, ret;
446 const char *card_name = card_names[pci_id->driver_data];
447 const char *dev_name = pci_name(pci_dev);
448
449/* when built into the kernel, we only print version if device is found */
450#ifndef MODULE
451 static int printed_version;
452 if (!printed_version++)
453 printk(version);
454#endif
455
456 /* setup various bits in PCI command register */
457 ret = pci_enable_device(pci_dev);
458 if(ret) return ret;
459
460 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
461 if(i){
462 printk(KERN_ERR "sis900.c: architecture does not support "
463 "32bit PCI busmaster DMA\n");
464 return i;
465 }
466
467 pci_set_master(pci_dev);
468
469 net_dev = alloc_etherdev(sizeof(struct sis900_private));
470 if (!net_dev)
471 return -ENOMEM;
472 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
473
474 /* We do a request_region() to register /proc/ioports info. */
475 ret = pci_request_regions(pci_dev, "sis900");
476 if (ret)
477 goto err_out;
478
479 /* IO region. */
480 ioaddr = pci_iomap(pci_dev, 0, 0);
481 if (!ioaddr)
482 goto err_out_cleardev;
483
484 sis_priv = netdev_priv(net_dev);
485 sis_priv->ioaddr = ioaddr;
486 sis_priv->pci_dev = pci_dev;
487 spin_lock_init(&sis_priv->lock);
488
489 pci_set_drvdata(pci_dev, net_dev);
490
491 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
492 if (!ring_space) {
493 ret = -ENOMEM;
494 goto err_out_unmap;
495 }
496 sis_priv->tx_ring = ring_space;
497 sis_priv->tx_ring_dma = ring_dma;
498
499 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
500 if (!ring_space) {
501 ret = -ENOMEM;
502 goto err_unmap_tx;
503 }
504 sis_priv->rx_ring = ring_space;
505 sis_priv->rx_ring_dma = ring_dma;
506
507 /* The SiS900-specific entries in the device structure. */
508 net_dev->netdev_ops = &sis900_netdev_ops;
509 net_dev->watchdog_timeo = TX_TIMEOUT;
510 net_dev->ethtool_ops = &sis900_ethtool_ops;
511
512 if (sis900_debug > 0)
513 sis_priv->msg_enable = sis900_debug;
514 else
515 sis_priv->msg_enable = SIS900_DEF_MSG;
516
517 sis_priv->mii_info.dev = net_dev;
518 sis_priv->mii_info.mdio_read = mdio_read;
519 sis_priv->mii_info.mdio_write = mdio_write;
520 sis_priv->mii_info.phy_id_mask = 0x1f;
521 sis_priv->mii_info.reg_num_mask = 0x1f;
522
523 /* Get Mac address according to the chip revision */
524 sis_priv->chipset_rev = pci_dev->revision;
525 if(netif_msg_probe(sis_priv))
526 printk(KERN_DEBUG "%s: detected revision %2.2x, "
527 "trying to get MAC address...\n",
528 dev_name, sis_priv->chipset_rev);
529
530 ret = 0;
531 if (sis_priv->chipset_rev == SIS630E_900_REV)
532 ret = sis630e_get_mac_addr(pci_dev, net_dev);
533 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
534 ret = sis635_get_mac_addr(pci_dev, net_dev);
535 else if (sis_priv->chipset_rev == SIS96x_900_REV)
536 ret = sis96x_get_mac_addr(pci_dev, net_dev);
537 else
538 ret = sis900_get_mac_addr(pci_dev, net_dev);
539
540 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
541 eth_hw_addr_random(net_dev);
542 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
543 "using random generated one\n", dev_name);
544 }
545
546 /* 630ET : set the mii access mode as software-mode */
547 if (sis_priv->chipset_rev == SIS630ET_900_REV)
548 sw32(cr, ACCESSMODE | sr32(cr));
549
550 /* probe for mii transceiver */
551 if (sis900_mii_probe(net_dev) == 0) {
552 printk(KERN_WARNING "%s: Error probing MII device.\n",
553 dev_name);
554 ret = -ENODEV;
555 goto err_unmap_rx;
556 }
557
558 /* save our host bridge revision */
559 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
560 if (dev) {
561 sis_priv->host_bridge_rev = dev->revision;
562 pci_dev_put(dev);
563 }
564
565 ret = register_netdev(net_dev);
566 if (ret)
567 goto err_unmap_rx;
568
569 /* print some information about our NIC */
570 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
571 net_dev->name, card_name, ioaddr, pci_dev->irq,
572 net_dev->dev_addr);
573
574 /* Detect Wake on Lan support */
575 ret = (sr32(CFGPMC) & PMESP) >> 27;
576 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
577 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
578
579 return 0;
580
581err_unmap_rx:
582 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
583 sis_priv->rx_ring_dma);
584err_unmap_tx:
585 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
586 sis_priv->tx_ring_dma);
587err_out_unmap:
588 pci_iounmap(pci_dev, ioaddr);
589err_out_cleardev:
590 pci_set_drvdata(pci_dev, NULL);
591 pci_release_regions(pci_dev);
592 err_out:
593 free_netdev(net_dev);
594 return ret;
595}
596
597/**
598 * sis900_mii_probe - Probe MII PHY for sis900
599 * @net_dev: the net device to probe for
600 *
601 * Search for total of 32 possible mii phy addresses.
602 * Identify and set current phy if found one,
603 * return error if it failed to found.
604 */
605
606static int __devinit sis900_mii_probe(struct net_device * net_dev)
607{
608 struct sis900_private *sis_priv = netdev_priv(net_dev);
609 const char *dev_name = pci_name(sis_priv->pci_dev);
610 u16 poll_bit = MII_STAT_LINK, status = 0;
611 unsigned long timeout = jiffies + 5 * HZ;
612 int phy_addr;
613
614 sis_priv->mii = NULL;
615
616 /* search for total of 32 possible mii phy addresses */
617 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
618 struct mii_phy * mii_phy = NULL;
619 u16 mii_status;
620 int i;
621
622 mii_phy = NULL;
623 for(i = 0; i < 2; i++)
624 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
625
626 if (mii_status == 0xffff || mii_status == 0x0000) {
627 if (netif_msg_probe(sis_priv))
628 printk(KERN_DEBUG "%s: MII at address %d"
629 " not accessible\n",
630 dev_name, phy_addr);
631 continue;
632 }
633
634 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
635 mii_phy = sis_priv->first_mii;
636 while (mii_phy) {
637 struct mii_phy *phy;
638 phy = mii_phy;
639 mii_phy = mii_phy->next;
640 kfree(phy);
641 }
642 return 0;
643 }
644
645 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
646 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
647 mii_phy->phy_addr = phy_addr;
648 mii_phy->status = mii_status;
649 mii_phy->next = sis_priv->mii;
650 sis_priv->mii = mii_phy;
651 sis_priv->first_mii = mii_phy;
652
653 for (i = 0; mii_chip_table[i].phy_id1; i++)
654 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
655 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
656 mii_phy->phy_types = mii_chip_table[i].phy_types;
657 if (mii_chip_table[i].phy_types == MIX)
658 mii_phy->phy_types =
659 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
660 printk(KERN_INFO "%s: %s transceiver found "
661 "at address %d.\n",
662 dev_name,
663 mii_chip_table[i].name,
664 phy_addr);
665 break;
666 }
667
668 if( !mii_chip_table[i].phy_id1 ) {
669 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
670 dev_name, phy_addr);
671 mii_phy->phy_types = UNKNOWN;
672 }
673 }
674
675 if (sis_priv->mii == NULL) {
676 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
677 return 0;
678 }
679
680 /* select default PHY for mac */
681 sis_priv->mii = NULL;
682 sis900_default_phy( net_dev );
683
684 /* Reset phy if default phy is internal sis900 */
685 if ((sis_priv->mii->phy_id0 == 0x001D) &&
686 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
687 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
688
689 /* workaround for ICS1893 PHY */
690 if ((sis_priv->mii->phy_id0 == 0x0015) &&
691 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
692 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
693
694 if(status & MII_STAT_LINK){
695 while (poll_bit) {
696 yield();
697
698 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
699 if (time_after_eq(jiffies, timeout)) {
700 printk(KERN_WARNING "%s: reset phy and link down now\n",
701 dev_name);
702 return -ETIME;
703 }
704 }
705 }
706
707 if (sis_priv->chipset_rev == SIS630E_900_REV) {
708 /* SiS 630E has some bugs on default value of PHY registers */
709 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
710 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
711 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
712 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
713 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
714 }
715
716 if (sis_priv->mii->status & MII_STAT_LINK)
717 netif_carrier_on(net_dev);
718 else
719 netif_carrier_off(net_dev);
720
721 return 1;
722}
723
724/**
725 * sis900_default_phy - Select default PHY for sis900 mac.
726 * @net_dev: the net device to probe for
727 *
728 * Select first detected PHY with link as default.
729 * If no one is link on, select PHY whose types is HOME as default.
730 * If HOME doesn't exist, select LAN.
731 */
732
733static u16 sis900_default_phy(struct net_device * net_dev)
734{
735 struct sis900_private *sis_priv = netdev_priv(net_dev);
736 struct mii_phy *phy = NULL, *phy_home = NULL,
737 *default_phy = NULL, *phy_lan = NULL;
738 u16 status;
739
740 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
741 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
742 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
743
744 /* Link ON & Not select default PHY & not ghost PHY */
745 if ((status & MII_STAT_LINK) && !default_phy &&
746 (phy->phy_types != UNKNOWN))
747 default_phy = phy;
748 else {
749 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
750 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
751 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
752 if (phy->phy_types == HOME)
753 phy_home = phy;
754 else if(phy->phy_types == LAN)
755 phy_lan = phy;
756 }
757 }
758
759 if (!default_phy && phy_home)
760 default_phy = phy_home;
761 else if (!default_phy && phy_lan)
762 default_phy = phy_lan;
763 else if (!default_phy)
764 default_phy = sis_priv->first_mii;
765
766 if (sis_priv->mii != default_phy) {
767 sis_priv->mii = default_phy;
768 sis_priv->cur_phy = default_phy->phy_addr;
769 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
770 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
771 }
772
773 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
774
775 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
776 status &= (~MII_CNTL_ISOLATE);
777
778 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
779 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
780 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
781
782 return status;
783}
784
785
786/**
787 * sis900_set_capability - set the media capability of network adapter.
788 * @net_dev : the net device to probe for
789 * @phy : default PHY
790 *
791 * Set the media capability of network adapter according to
792 * mii status register. It's necessary before auto-negotiate.
793 */
794
795static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
796{
797 u16 cap;
798 u16 status;
799
800 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
801 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
802
803 cap = MII_NWAY_CSMA_CD |
804 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
805 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
806 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
807 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
808
809 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
810}
811
812
813/* Delay between EEPROM clock transitions. */
814#define eeprom_delay() sr32(mear)
815
816/**
817 * read_eeprom - Read Serial EEPROM
818 * @ioaddr: base i/o address
819 * @location: the EEPROM location to read
820 *
821 * Read Serial EEPROM through EEPROM Access Register.
822 * Note that location is in word (16 bits) unit
823 */
824
825static u16 __devinit read_eeprom(void __iomem *ioaddr, int location)
826{
827 u32 read_cmd = location | EEread;
828 int i;
829 u16 retval = 0;
830
831 sw32(mear, 0);
832 eeprom_delay();
833 sw32(mear, EECS);
834 eeprom_delay();
835
836 /* Shift the read command (9) bits out. */
837 for (i = 8; i >= 0; i--) {
838 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
839
840 sw32(mear, dataval);
841 eeprom_delay();
842 sw32(mear, dataval | EECLK);
843 eeprom_delay();
844 }
845 sw32(mear, EECS);
846 eeprom_delay();
847
848 /* read the 16-bits data in */
849 for (i = 16; i > 0; i--) {
850 sw32(mear, EECS);
851 eeprom_delay();
852 sw32(mear, EECS | EECLK);
853 eeprom_delay();
854 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
855 eeprom_delay();
856 }
857
858 /* Terminate the EEPROM access. */
859 sw32(mear, 0);
860 eeprom_delay();
861
862 return retval;
863}
864
865/* Read and write the MII management registers using software-generated
866 serial MDIO protocol. Note that the command bits and data bits are
867 send out separately */
868#define mdio_delay() sr32(mear)
869
870static void mdio_idle(struct sis900_private *sp)
871{
872 void __iomem *ioaddr = sp->ioaddr;
873
874 sw32(mear, MDIO | MDDIR);
875 mdio_delay();
876 sw32(mear, MDIO | MDDIR | MDC);
877}
878
879/* Synchronize the MII management interface by shifting 32 one bits out. */
880static void mdio_reset(struct sis900_private *sp)
881{
882 void __iomem *ioaddr = sp->ioaddr;
883 int i;
884
885 for (i = 31; i >= 0; i--) {
886 sw32(mear, MDDIR | MDIO);
887 mdio_delay();
888 sw32(mear, MDDIR | MDIO | MDC);
889 mdio_delay();
890 }
891}
892
893/**
894 * mdio_read - read MII PHY register
895 * @net_dev: the net device to read
896 * @phy_id: the phy address to read
897 * @location: the phy regiester id to read
898 *
899 * Read MII registers through MDIO and MDC
900 * using MDIO management frame structure and protocol(defined by ISO/IEC).
901 * Please see SiS7014 or ICS spec
902 */
903
904static int mdio_read(struct net_device *net_dev, int phy_id, int location)
905{
906 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
907 struct sis900_private *sp = netdev_priv(net_dev);
908 void __iomem *ioaddr = sp->ioaddr;
909 u16 retval = 0;
910 int i;
911
912 mdio_reset(sp);
913 mdio_idle(sp);
914
915 for (i = 15; i >= 0; i--) {
916 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
917
918 sw32(mear, dataval);
919 mdio_delay();
920 sw32(mear, dataval | MDC);
921 mdio_delay();
922 }
923
924 /* Read the 16 data bits. */
925 for (i = 16; i > 0; i--) {
926 sw32(mear, 0);
927 mdio_delay();
928 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
929 sw32(mear, MDC);
930 mdio_delay();
931 }
932 sw32(mear, 0x00);
933
934 return retval;
935}
936
937/**
938 * mdio_write - write MII PHY register
939 * @net_dev: the net device to write
940 * @phy_id: the phy address to write
941 * @location: the phy regiester id to write
942 * @value: the register value to write with
943 *
944 * Write MII registers with @value through MDIO and MDC
945 * using MDIO management frame structure and protocol(defined by ISO/IEC)
946 * please see SiS7014 or ICS spec
947 */
948
949static void mdio_write(struct net_device *net_dev, int phy_id, int location,
950 int value)
951{
952 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
953 struct sis900_private *sp = netdev_priv(net_dev);
954 void __iomem *ioaddr = sp->ioaddr;
955 int i;
956
957 mdio_reset(sp);
958 mdio_idle(sp);
959
960 /* Shift the command bits out. */
961 for (i = 15; i >= 0; i--) {
962 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
963
964 sw8(mear, dataval);
965 mdio_delay();
966 sw8(mear, dataval | MDC);
967 mdio_delay();
968 }
969 mdio_delay();
970
971 /* Shift the value bits out. */
972 for (i = 15; i >= 0; i--) {
973 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
974
975 sw32(mear, dataval);
976 mdio_delay();
977 sw32(mear, dataval | MDC);
978 mdio_delay();
979 }
980 mdio_delay();
981
982 /* Clear out extra bits. */
983 for (i = 2; i > 0; i--) {
984 sw8(mear, 0);
985 mdio_delay();
986 sw8(mear, MDC);
987 mdio_delay();
988 }
989 sw32(mear, 0x00);
990}
991
992
993/**
994 * sis900_reset_phy - reset sis900 mii phy.
995 * @net_dev: the net device to write
996 * @phy_addr: default phy address
997 *
998 * Some specific phy can't work properly without reset.
999 * This function will be called during initialization and
1000 * link status change from ON to DOWN.
1001 */
1002
1003static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
1004{
1005 int i;
1006 u16 status;
1007
1008 for (i = 0; i < 2; i++)
1009 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1010
1011 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
1012
1013 return status;
1014}
1015
1016#ifdef CONFIG_NET_POLL_CONTROLLER
1017/*
1018 * Polling 'interrupt' - used by things like netconsole to send skbs
1019 * without having to re-enable interrupts. It's not called while
1020 * the interrupt routine is executing.
1021*/
1022static void sis900_poll(struct net_device *dev)
1023{
1024 struct sis900_private *sp = netdev_priv(dev);
1025 const int irq = sp->pci_dev->irq;
1026
1027 disable_irq(irq);
1028 sis900_interrupt(irq, dev);
1029 enable_irq(irq);
1030}
1031#endif
1032
1033/**
1034 * sis900_open - open sis900 device
1035 * @net_dev: the net device to open
1036 *
1037 * Do some initialization and start net interface.
1038 * enable interrupts and set sis900 timer.
1039 */
1040
1041static int
1042sis900_open(struct net_device *net_dev)
1043{
1044 struct sis900_private *sis_priv = netdev_priv(net_dev);
1045 void __iomem *ioaddr = sis_priv->ioaddr;
1046 int ret;
1047
1048 /* Soft reset the chip. */
1049 sis900_reset(net_dev);
1050
1051 /* Equalizer workaround Rule */
1052 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1053
1054 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1055 net_dev->name, net_dev);
1056 if (ret)
1057 return ret;
1058
1059 sis900_init_rxfilter(net_dev);
1060
1061 sis900_init_tx_ring(net_dev);
1062 sis900_init_rx_ring(net_dev);
1063
1064 set_rx_mode(net_dev);
1065
1066 netif_start_queue(net_dev);
1067
1068 /* Workaround for EDB */
1069 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1070
1071 /* Enable all known interrupts by setting the interrupt mask. */
1072 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1073 sw32(cr, RxENA | sr32(cr));
1074 sw32(ier, IE);
1075
1076 sis900_check_mode(net_dev, sis_priv->mii);
1077
1078 /* Set the timer to switch to check for link beat and perhaps switch
1079 to an alternate media type. */
1080 init_timer(&sis_priv->timer);
1081 sis_priv->timer.expires = jiffies + HZ;
1082 sis_priv->timer.data = (unsigned long)net_dev;
1083 sis_priv->timer.function = sis900_timer;
1084 add_timer(&sis_priv->timer);
1085
1086 return 0;
1087}
1088
1089/**
1090 * sis900_init_rxfilter - Initialize the Rx filter
1091 * @net_dev: the net device to initialize for
1092 *
1093 * Set receive filter address to our MAC address
1094 * and enable packet filtering.
1095 */
1096
1097static void
1098sis900_init_rxfilter (struct net_device * net_dev)
1099{
1100 struct sis900_private *sis_priv = netdev_priv(net_dev);
1101 void __iomem *ioaddr = sis_priv->ioaddr;
1102 u32 rfcrSave;
1103 u32 i;
1104
1105 rfcrSave = sr32(rfcr);
1106
1107 /* disable packet filtering before setting filter */
1108 sw32(rfcr, rfcrSave & ~RFEN);
1109
1110 /* load MAC addr to filter data register */
1111 for (i = 0 ; i < 3 ; i++) {
1112 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1113
1114 sw32(rfcr, i << RFADDR_shift);
1115 sw32(rfdr, w);
1116
1117 if (netif_msg_hw(sis_priv)) {
1118 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1119 net_dev->name, i, sr32(rfdr));
1120 }
1121 }
1122
1123 /* enable packet filtering */
1124 sw32(rfcr, rfcrSave | RFEN);
1125}
1126
1127/**
1128 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1129 * @net_dev: the net device to initialize for
1130 *
1131 * Initialize the Tx descriptor ring,
1132 */
1133
1134static void
1135sis900_init_tx_ring(struct net_device *net_dev)
1136{
1137 struct sis900_private *sis_priv = netdev_priv(net_dev);
1138 void __iomem *ioaddr = sis_priv->ioaddr;
1139 int i;
1140
1141 sis_priv->tx_full = 0;
1142 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1143
1144 for (i = 0; i < NUM_TX_DESC; i++) {
1145 sis_priv->tx_skbuff[i] = NULL;
1146
1147 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1148 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1149 sis_priv->tx_ring[i].cmdsts = 0;
1150 sis_priv->tx_ring[i].bufptr = 0;
1151 }
1152
1153 /* load Transmit Descriptor Register */
1154 sw32(txdp, sis_priv->tx_ring_dma);
1155 if (netif_msg_hw(sis_priv))
1156 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1157 net_dev->name, sr32(txdp));
1158}
1159
1160/**
1161 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1162 * @net_dev: the net device to initialize for
1163 *
1164 * Initialize the Rx descriptor ring,
1165 * and pre-allocate recevie buffers (socket buffer)
1166 */
1167
1168static void
1169sis900_init_rx_ring(struct net_device *net_dev)
1170{
1171 struct sis900_private *sis_priv = netdev_priv(net_dev);
1172 void __iomem *ioaddr = sis_priv->ioaddr;
1173 int i;
1174
1175 sis_priv->cur_rx = 0;
1176 sis_priv->dirty_rx = 0;
1177
1178 /* init RX descriptor */
1179 for (i = 0; i < NUM_RX_DESC; i++) {
1180 sis_priv->rx_skbuff[i] = NULL;
1181
1182 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1183 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1184 sis_priv->rx_ring[i].cmdsts = 0;
1185 sis_priv->rx_ring[i].bufptr = 0;
1186 }
1187
1188 /* allocate sock buffers */
1189 for (i = 0; i < NUM_RX_DESC; i++) {
1190 struct sk_buff *skb;
1191
1192 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1193 /* not enough memory for skbuff, this makes a "hole"
1194 on the buffer ring, it is not clear how the
1195 hardware will react to this kind of degenerated
1196 buffer */
1197 break;
1198 }
1199 sis_priv->rx_skbuff[i] = skb;
1200 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1201 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1202 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1203 }
1204 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1205
1206 /* load Receive Descriptor Register */
1207 sw32(rxdp, sis_priv->rx_ring_dma);
1208 if (netif_msg_hw(sis_priv))
1209 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1210 net_dev->name, sr32(rxdp));
1211}
1212
1213/**
1214 * sis630_set_eq - set phy equalizer value for 630 LAN
1215 * @net_dev: the net device to set equalizer value
1216 * @revision: 630 LAN revision number
1217 *
1218 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1219 * PHY register 14h(Test)
1220 * Bit 14: 0 -- Automatically detect (default)
1221 * 1 -- Manually set Equalizer filter
1222 * Bit 13: 0 -- (Default)
1223 * 1 -- Speed up convergence of equalizer setting
1224 * Bit 9 : 0 -- (Default)
1225 * 1 -- Disable Baseline Wander
1226 * Bit 3~7 -- Equalizer filter setting
1227 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1228 * Then calculate equalizer value
1229 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1230 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1231 * Calculate Equalizer value:
1232 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
1233 * When the equalizer is stable, this value is not a fixed value. It will be within
1234 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1235 * 0 <= max <= 4 --> set equalizer to max
1236 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1237 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1238 */
1239
1240static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1241{
1242 struct sis900_private *sis_priv = netdev_priv(net_dev);
1243 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1244 int i, maxcount=10;
1245
1246 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1247 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1248 return;
1249
1250 if (netif_carrier_ok(net_dev)) {
1251 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1252 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1253 (0x2200 | reg14h) & 0xBFFF);
1254 for (i=0; i < maxcount; i++) {
1255 eq_value = (0x00F8 & mdio_read(net_dev,
1256 sis_priv->cur_phy, MII_RESV)) >> 3;
1257 if (i == 0)
1258 max_value=min_value=eq_value;
1259 max_value = (eq_value > max_value) ?
1260 eq_value : max_value;
1261 min_value = (eq_value < min_value) ?
1262 eq_value : min_value;
1263 }
1264 /* 630E rule to determine the equalizer value */
1265 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1266 revision == SIS630ET_900_REV) {
1267 if (max_value < 5)
1268 eq_value = max_value;
1269 else if (max_value >= 5 && max_value < 15)
1270 eq_value = (max_value == min_value) ?
1271 max_value+2 : max_value+1;
1272 else if (max_value >= 15)
1273 eq_value=(max_value == min_value) ?
1274 max_value+6 : max_value+5;
1275 }
1276 /* 630B0&B1 rule to determine the equalizer value */
1277 if (revision == SIS630A_900_REV &&
1278 (sis_priv->host_bridge_rev == SIS630B0 ||
1279 sis_priv->host_bridge_rev == SIS630B1)) {
1280 if (max_value == 0)
1281 eq_value = 3;
1282 else
1283 eq_value = (max_value + min_value + 1)/2;
1284 }
1285 /* write equalizer value and setting */
1286 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1287 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1288 reg14h = (reg14h | 0x6000) & 0xFDFF;
1289 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1290 } else {
1291 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1292 if (revision == SIS630A_900_REV &&
1293 (sis_priv->host_bridge_rev == SIS630B0 ||
1294 sis_priv->host_bridge_rev == SIS630B1))
1295 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1296 (reg14h | 0x2200) & 0xBFFF);
1297 else
1298 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1299 (reg14h | 0x2000) & 0xBFFF);
1300 }
1301}
1302
1303/**
1304 * sis900_timer - sis900 timer routine
1305 * @data: pointer to sis900 net device
1306 *
1307 * On each timer ticks we check two things,
1308 * link status (ON/OFF) and link mode (10/100/Full/Half)
1309 */
1310
1311static void sis900_timer(unsigned long data)
1312{
1313 struct net_device *net_dev = (struct net_device *)data;
1314 struct sis900_private *sis_priv = netdev_priv(net_dev);
1315 struct mii_phy *mii_phy = sis_priv->mii;
1316 static const int next_tick = 5*HZ;
1317 u16 status;
1318
1319 if (!sis_priv->autong_complete){
1320 int uninitialized_var(speed), duplex = 0;
1321
1322 sis900_read_mode(net_dev, &speed, &duplex);
1323 if (duplex){
1324 sis900_set_mode(sis_priv, speed, duplex);
1325 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1326 netif_start_queue(net_dev);
1327 }
1328
1329 sis_priv->timer.expires = jiffies + HZ;
1330 add_timer(&sis_priv->timer);
1331 return;
1332 }
1333
1334 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1335 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1336
1337 /* Link OFF -> ON */
1338 if (!netif_carrier_ok(net_dev)) {
1339 LookForLink:
1340 /* Search for new PHY */
1341 status = sis900_default_phy(net_dev);
1342 mii_phy = sis_priv->mii;
1343
1344 if (status & MII_STAT_LINK){
1345 sis900_check_mode(net_dev, mii_phy);
1346 netif_carrier_on(net_dev);
1347 }
1348 } else {
1349 /* Link ON -> OFF */
1350 if (!(status & MII_STAT_LINK)){
1351 netif_carrier_off(net_dev);
1352 if(netif_msg_link(sis_priv))
1353 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1354
1355 /* Change mode issue */
1356 if ((mii_phy->phy_id0 == 0x001D) &&
1357 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1358 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1359
1360 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1361
1362 goto LookForLink;
1363 }
1364 }
1365
1366 sis_priv->timer.expires = jiffies + next_tick;
1367 add_timer(&sis_priv->timer);
1368}
1369
1370/**
1371 * sis900_check_mode - check the media mode for sis900
1372 * @net_dev: the net device to be checked
1373 * @mii_phy: the mii phy
1374 *
1375 * Older driver gets the media mode from mii status output
1376 * register. Now we set our media capability and auto-negotiate
1377 * to get the upper bound of speed and duplex between two ends.
1378 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1379 * and autong_complete should be set to 1.
1380 */
1381
1382static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1383{
1384 struct sis900_private *sis_priv = netdev_priv(net_dev);
1385 void __iomem *ioaddr = sis_priv->ioaddr;
1386 int speed, duplex;
1387
1388 if (mii_phy->phy_types == LAN) {
1389 sw32(cfg, ~EXD & sr32(cfg));
1390 sis900_set_capability(net_dev , mii_phy);
1391 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1392 } else {
1393 sw32(cfg, EXD | sr32(cfg));
1394 speed = HW_SPEED_HOME;
1395 duplex = FDX_CAPABLE_HALF_SELECTED;
1396 sis900_set_mode(sis_priv, speed, duplex);
1397 sis_priv->autong_complete = 1;
1398 }
1399}
1400
1401/**
1402 * sis900_set_mode - Set the media mode of mac register.
1403 * @sp: the device private data
1404 * @speed : the transmit speed to be determined
1405 * @duplex: the duplex mode to be determined
1406 *
1407 * Set the media mode of mac register txcfg/rxcfg according to
1408 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1409 * bus is used instead of PCI bus. When this bit is set 1, the
1410 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1411 * double words.
1412 */
1413
1414static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1415{
1416 void __iomem *ioaddr = sp->ioaddr;
1417 u32 tx_flags = 0, rx_flags = 0;
1418
1419 if (sr32( cfg) & EDB_MASTER_EN) {
1420 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1421 (TX_FILL_THRESH << TxFILLT_shift);
1422 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1423 } else {
1424 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1425 (TX_FILL_THRESH << TxFILLT_shift);
1426 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1427 }
1428
1429 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1430 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1431 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1432 } else {
1433 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1434 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1435 }
1436
1437 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1438 tx_flags |= (TxCSI | TxHBI);
1439 rx_flags |= RxATX;
1440 }
1441
1442#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1443 /* Can accept Jumbo packet */
1444 rx_flags |= RxAJAB;
1445#endif
1446
1447 sw32(txcfg, tx_flags);
1448 sw32(rxcfg, rx_flags);
1449}
1450
1451/**
1452 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1453 * @net_dev: the net device to read mode for
1454 * @phy_addr: mii phy address
1455 *
1456 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1457 * autong_complete should be set to 0 when starting auto-negotiation.
1458 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1459 * sis900_timer will wait for link on again if autong_complete = 0.
1460 */
1461
1462static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1463{
1464 struct sis900_private *sis_priv = netdev_priv(net_dev);
1465 int i = 0;
1466 u32 status;
1467
1468 for (i = 0; i < 2; i++)
1469 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1470
1471 if (!(status & MII_STAT_LINK)){
1472 if(netif_msg_link(sis_priv))
1473 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1474 sis_priv->autong_complete = 1;
1475 netif_carrier_off(net_dev);
1476 return;
1477 }
1478
1479 /* (Re)start AutoNegotiate */
1480 mdio_write(net_dev, phy_addr, MII_CONTROL,
1481 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1482 sis_priv->autong_complete = 0;
1483}
1484
1485
1486/**
1487 * sis900_read_mode - read media mode for sis900 internal phy
1488 * @net_dev: the net device to read mode for
1489 * @speed : the transmit speed to be determined
1490 * @duplex : the duplex mode to be determined
1491 *
1492 * The capability of remote end will be put in mii register autorec
1493 * after auto-negotiation. Use AND operation to get the upper bound
1494 * of speed and duplex between two ends.
1495 */
1496
1497static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1498{
1499 struct sis900_private *sis_priv = netdev_priv(net_dev);
1500 struct mii_phy *phy = sis_priv->mii;
1501 int phy_addr = sis_priv->cur_phy;
1502 u32 status;
1503 u16 autoadv, autorec;
1504 int i;
1505
1506 for (i = 0; i < 2; i++)
1507 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1508
1509 if (!(status & MII_STAT_LINK))
1510 return;
1511
1512 /* AutoNegotiate completed */
1513 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1514 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1515 status = autoadv & autorec;
1516
1517 *speed = HW_SPEED_10_MBPS;
1518 *duplex = FDX_CAPABLE_HALF_SELECTED;
1519
1520 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1521 *speed = HW_SPEED_100_MBPS;
1522 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1523 *duplex = FDX_CAPABLE_FULL_SELECTED;
1524
1525 sis_priv->autong_complete = 1;
1526
1527 /* Workaround for Realtek RTL8201 PHY issue */
1528 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1529 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1530 *duplex = FDX_CAPABLE_FULL_SELECTED;
1531 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1532 *speed = HW_SPEED_100_MBPS;
1533 }
1534
1535 if(netif_msg_link(sis_priv))
1536 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1537 net_dev->name,
1538 *speed == HW_SPEED_100_MBPS ?
1539 "100mbps" : "10mbps",
1540 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1541 "full" : "half");
1542}
1543
1544/**
1545 * sis900_tx_timeout - sis900 transmit timeout routine
1546 * @net_dev: the net device to transmit
1547 *
1548 * print transmit timeout status
1549 * disable interrupts and do some tasks
1550 */
1551
1552static void sis900_tx_timeout(struct net_device *net_dev)
1553{
1554 struct sis900_private *sis_priv = netdev_priv(net_dev);
1555 void __iomem *ioaddr = sis_priv->ioaddr;
1556 unsigned long flags;
1557 int i;
1558
1559 if (netif_msg_tx_err(sis_priv)) {
1560 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1561 net_dev->name, sr32(cr), sr32(isr));
1562 }
1563
1564 /* Disable interrupts by clearing the interrupt mask. */
1565 sw32(imr, 0x0000);
1566
1567 /* use spinlock to prevent interrupt handler accessing buffer ring */
1568 spin_lock_irqsave(&sis_priv->lock, flags);
1569
1570 /* discard unsent packets */
1571 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1572 for (i = 0; i < NUM_TX_DESC; i++) {
1573 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1574
1575 if (skb) {
1576 pci_unmap_single(sis_priv->pci_dev,
1577 sis_priv->tx_ring[i].bufptr, skb->len,
1578 PCI_DMA_TODEVICE);
1579 dev_kfree_skb_irq(skb);
1580 sis_priv->tx_skbuff[i] = NULL;
1581 sis_priv->tx_ring[i].cmdsts = 0;
1582 sis_priv->tx_ring[i].bufptr = 0;
1583 net_dev->stats.tx_dropped++;
1584 }
1585 }
1586 sis_priv->tx_full = 0;
1587 netif_wake_queue(net_dev);
1588
1589 spin_unlock_irqrestore(&sis_priv->lock, flags);
1590
1591 net_dev->trans_start = jiffies; /* prevent tx timeout */
1592
1593 /* load Transmit Descriptor Register */
1594 sw32(txdp, sis_priv->tx_ring_dma);
1595
1596 /* Enable all known interrupts by setting the interrupt mask. */
1597 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1598}
1599
1600/**
1601 * sis900_start_xmit - sis900 start transmit routine
1602 * @skb: socket buffer pointer to put the data being transmitted
1603 * @net_dev: the net device to transmit with
1604 *
1605 * Set the transmit buffer descriptor,
1606 * and write TxENA to enable transmit state machine.
1607 * tell upper layer if the buffer is full
1608 */
1609
1610static netdev_tx_t
1611sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1612{
1613 struct sis900_private *sis_priv = netdev_priv(net_dev);
1614 void __iomem *ioaddr = sis_priv->ioaddr;
1615 unsigned int entry;
1616 unsigned long flags;
1617 unsigned int index_cur_tx, index_dirty_tx;
1618 unsigned int count_dirty_tx;
1619
1620 /* Don't transmit data before the complete of auto-negotiation */
1621 if(!sis_priv->autong_complete){
1622 netif_stop_queue(net_dev);
1623 return NETDEV_TX_BUSY;
1624 }
1625
1626 spin_lock_irqsave(&sis_priv->lock, flags);
1627
1628 /* Calculate the next Tx descriptor entry. */
1629 entry = sis_priv->cur_tx % NUM_TX_DESC;
1630 sis_priv->tx_skbuff[entry] = skb;
1631
1632 /* set the transmit buffer descriptor and enable Transmit State Machine */
1633 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1634 skb->data, skb->len, PCI_DMA_TODEVICE);
1635 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1636 sw32(cr, TxENA | sr32(cr));
1637
1638 sis_priv->cur_tx ++;
1639 index_cur_tx = sis_priv->cur_tx;
1640 index_dirty_tx = sis_priv->dirty_tx;
1641
1642 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1643 count_dirty_tx ++;
1644
1645 if (index_cur_tx == index_dirty_tx) {
1646 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1647 sis_priv->tx_full = 1;
1648 netif_stop_queue(net_dev);
1649 } else if (count_dirty_tx < NUM_TX_DESC) {
1650 /* Typical path, tell upper layer that more transmission is possible */
1651 netif_start_queue(net_dev);
1652 } else {
1653 /* buffer full, tell upper layer no more transmission */
1654 sis_priv->tx_full = 1;
1655 netif_stop_queue(net_dev);
1656 }
1657
1658 spin_unlock_irqrestore(&sis_priv->lock, flags);
1659
1660 if (netif_msg_tx_queued(sis_priv))
1661 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1662 "to slot %d.\n",
1663 net_dev->name, skb->data, (int)skb->len, entry);
1664
1665 return NETDEV_TX_OK;
1666}
1667
1668/**
1669 * sis900_interrupt - sis900 interrupt handler
1670 * @irq: the irq number
1671 * @dev_instance: the client data object
1672 *
1673 * The interrupt handler does all of the Rx thread work,
1674 * and cleans up after the Tx thread
1675 */
1676
1677static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1678{
1679 struct net_device *net_dev = dev_instance;
1680 struct sis900_private *sis_priv = netdev_priv(net_dev);
1681 int boguscnt = max_interrupt_work;
1682 void __iomem *ioaddr = sis_priv->ioaddr;
1683 u32 status;
1684 unsigned int handled = 0;
1685
1686 spin_lock (&sis_priv->lock);
1687
1688 do {
1689 status = sr32(isr);
1690
1691 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1692 /* nothing intresting happened */
1693 break;
1694 handled = 1;
1695
1696 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1697 if (status & (RxORN | RxERR | RxOK))
1698 /* Rx interrupt */
1699 sis900_rx(net_dev);
1700
1701 if (status & (TxURN | TxERR | TxIDLE))
1702 /* Tx interrupt */
1703 sis900_finish_xmit(net_dev);
1704
1705 /* something strange happened !!! */
1706 if (status & HIBERR) {
1707 if(netif_msg_intr(sis_priv))
1708 printk(KERN_INFO "%s: Abnormal interrupt, "
1709 "status %#8.8x.\n", net_dev->name, status);
1710 break;
1711 }
1712 if (--boguscnt < 0) {
1713 if(netif_msg_intr(sis_priv))
1714 printk(KERN_INFO "%s: Too much work at interrupt, "
1715 "interrupt status = %#8.8x.\n",
1716 net_dev->name, status);
1717 break;
1718 }
1719 } while (1);
1720
1721 if(netif_msg_intr(sis_priv))
1722 printk(KERN_DEBUG "%s: exiting interrupt, "
1723 "interrupt status = 0x%#8.8x.\n",
1724 net_dev->name, sr32(isr));
1725
1726 spin_unlock (&sis_priv->lock);
1727 return IRQ_RETVAL(handled);
1728}
1729
1730/**
1731 * sis900_rx - sis900 receive routine
1732 * @net_dev: the net device which receives data
1733 *
1734 * Process receive interrupt events,
1735 * put buffer to higher layer and refill buffer pool
1736 * Note: This function is called by interrupt handler,
1737 * don't do "too much" work here
1738 */
1739
1740static int sis900_rx(struct net_device *net_dev)
1741{
1742 struct sis900_private *sis_priv = netdev_priv(net_dev);
1743 void __iomem *ioaddr = sis_priv->ioaddr;
1744 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1745 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1746 int rx_work_limit;
1747
1748 if (netif_msg_rx_status(sis_priv))
1749 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1750 "status:0x%8.8x\n",
1751 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1752 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1753
1754 while (rx_status & OWN) {
1755 unsigned int rx_size;
1756 unsigned int data_size;
1757
1758 if (--rx_work_limit < 0)
1759 break;
1760
1761 data_size = rx_status & DSIZE;
1762 rx_size = data_size - CRC_SIZE;
1763
1764#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1765 /* ``TOOLONG'' flag means jumbo packet received. */
1766 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1767 rx_status &= (~ ((unsigned int)TOOLONG));
1768#endif
1769
1770 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1771 /* corrupted packet received */
1772 if (netif_msg_rx_err(sis_priv))
1773 printk(KERN_DEBUG "%s: Corrupted packet "
1774 "received, buffer status = 0x%8.8x/%d.\n",
1775 net_dev->name, rx_status, data_size);
1776 net_dev->stats.rx_errors++;
1777 if (rx_status & OVERRUN)
1778 net_dev->stats.rx_over_errors++;
1779 if (rx_status & (TOOLONG|RUNT))
1780 net_dev->stats.rx_length_errors++;
1781 if (rx_status & (RXISERR | FAERR))
1782 net_dev->stats.rx_frame_errors++;
1783 if (rx_status & CRCERR)
1784 net_dev->stats.rx_crc_errors++;
1785 /* reset buffer descriptor state */
1786 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1787 } else {
1788 struct sk_buff * skb;
1789 struct sk_buff * rx_skb;
1790
1791 pci_unmap_single(sis_priv->pci_dev,
1792 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1793 PCI_DMA_FROMDEVICE);
1794
1795 /* refill the Rx buffer, what if there is not enough
1796 * memory for new socket buffer ?? */
1797 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1798 /*
1799 * Not enough memory to refill the buffer
1800 * so we need to recycle the old one so
1801 * as to avoid creating a memory hole
1802 * in the rx ring
1803 */
1804 skb = sis_priv->rx_skbuff[entry];
1805 net_dev->stats.rx_dropped++;
1806 goto refill_rx_ring;
1807 }
1808
1809 /* This situation should never happen, but due to
1810 some unknown bugs, it is possible that
1811 we are working on NULL sk_buff :-( */
1812 if (sis_priv->rx_skbuff[entry] == NULL) {
1813 if (netif_msg_rx_err(sis_priv))
1814 printk(KERN_WARNING "%s: NULL pointer "
1815 "encountered in Rx ring\n"
1816 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1817 net_dev->name, sis_priv->cur_rx,
1818 sis_priv->dirty_rx);
1819 dev_kfree_skb(skb);
1820 break;
1821 }
1822
1823 /* give the socket buffer to upper layers */
1824 rx_skb = sis_priv->rx_skbuff[entry];
1825 skb_put(rx_skb, rx_size);
1826 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1827 netif_rx(rx_skb);
1828
1829 /* some network statistics */
1830 if ((rx_status & BCAST) == MCAST)
1831 net_dev->stats.multicast++;
1832 net_dev->stats.rx_bytes += rx_size;
1833 net_dev->stats.rx_packets++;
1834 sis_priv->dirty_rx++;
1835refill_rx_ring:
1836 sis_priv->rx_skbuff[entry] = skb;
1837 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1838 sis_priv->rx_ring[entry].bufptr =
1839 pci_map_single(sis_priv->pci_dev, skb->data,
1840 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1841 }
1842 sis_priv->cur_rx++;
1843 entry = sis_priv->cur_rx % NUM_RX_DESC;
1844 rx_status = sis_priv->rx_ring[entry].cmdsts;
1845 } // while
1846
1847 /* refill the Rx buffer, what if the rate of refilling is slower
1848 * than consuming ?? */
1849 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1850 struct sk_buff *skb;
1851
1852 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1853
1854 if (sis_priv->rx_skbuff[entry] == NULL) {
1855 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1856 /* not enough memory for skbuff, this makes a
1857 * "hole" on the buffer ring, it is not clear
1858 * how the hardware will react to this kind
1859 * of degenerated buffer */
1860 if (netif_msg_rx_err(sis_priv))
1861 printk(KERN_INFO "%s: Memory squeeze, "
1862 "deferring packet.\n",
1863 net_dev->name);
1864 net_dev->stats.rx_dropped++;
1865 break;
1866 }
1867 sis_priv->rx_skbuff[entry] = skb;
1868 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1869 sis_priv->rx_ring[entry].bufptr =
1870 pci_map_single(sis_priv->pci_dev, skb->data,
1871 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1872 }
1873 }
1874 /* re-enable the potentially idle receive state matchine */
1875 sw32(cr , RxENA | sr32(cr));
1876
1877 return 0;
1878}
1879
1880/**
1881 * sis900_finish_xmit - finish up transmission of packets
1882 * @net_dev: the net device to be transmitted on
1883 *
1884 * Check for error condition and free socket buffer etc
1885 * schedule for more transmission as needed
1886 * Note: This function is called by interrupt handler,
1887 * don't do "too much" work here
1888 */
1889
1890static void sis900_finish_xmit (struct net_device *net_dev)
1891{
1892 struct sis900_private *sis_priv = netdev_priv(net_dev);
1893
1894 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1895 struct sk_buff *skb;
1896 unsigned int entry;
1897 u32 tx_status;
1898
1899 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1900 tx_status = sis_priv->tx_ring[entry].cmdsts;
1901
1902 if (tx_status & OWN) {
1903 /* The packet is not transmitted yet (owned by hardware) !
1904 * Note: the interrupt is generated only when Tx Machine
1905 * is idle, so this is an almost impossible case */
1906 break;
1907 }
1908
1909 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1910 /* packet unsuccessfully transmitted */
1911 if (netif_msg_tx_err(sis_priv))
1912 printk(KERN_DEBUG "%s: Transmit "
1913 "error, Tx status %8.8x.\n",
1914 net_dev->name, tx_status);
1915 net_dev->stats.tx_errors++;
1916 if (tx_status & UNDERRUN)
1917 net_dev->stats.tx_fifo_errors++;
1918 if (tx_status & ABORT)
1919 net_dev->stats.tx_aborted_errors++;
1920 if (tx_status & NOCARRIER)
1921 net_dev->stats.tx_carrier_errors++;
1922 if (tx_status & OWCOLL)
1923 net_dev->stats.tx_window_errors++;
1924 } else {
1925 /* packet successfully transmitted */
1926 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1927 net_dev->stats.tx_bytes += tx_status & DSIZE;
1928 net_dev->stats.tx_packets++;
1929 }
1930 /* Free the original skb. */
1931 skb = sis_priv->tx_skbuff[entry];
1932 pci_unmap_single(sis_priv->pci_dev,
1933 sis_priv->tx_ring[entry].bufptr, skb->len,
1934 PCI_DMA_TODEVICE);
1935 dev_kfree_skb_irq(skb);
1936 sis_priv->tx_skbuff[entry] = NULL;
1937 sis_priv->tx_ring[entry].bufptr = 0;
1938 sis_priv->tx_ring[entry].cmdsts = 0;
1939 }
1940
1941 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1942 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1943 /* The ring is no longer full, clear tx_full and schedule
1944 * more transmission by netif_wake_queue(net_dev) */
1945 sis_priv->tx_full = 0;
1946 netif_wake_queue (net_dev);
1947 }
1948}
1949
1950/**
1951 * sis900_close - close sis900 device
1952 * @net_dev: the net device to be closed
1953 *
1954 * Disable interrupts, stop the Tx and Rx Status Machine
1955 * free Tx and RX socket buffer
1956 */
1957
1958static int sis900_close(struct net_device *net_dev)
1959{
1960 struct sis900_private *sis_priv = netdev_priv(net_dev);
1961 struct pci_dev *pdev = sis_priv->pci_dev;
1962 void __iomem *ioaddr = sis_priv->ioaddr;
1963 struct sk_buff *skb;
1964 int i;
1965
1966 netif_stop_queue(net_dev);
1967
1968 /* Disable interrupts by clearing the interrupt mask. */
1969 sw32(imr, 0x0000);
1970 sw32(ier, 0x0000);
1971
1972 /* Stop the chip's Tx and Rx Status Machine */
1973 sw32(cr, RxDIS | TxDIS | sr32(cr));
1974
1975 del_timer(&sis_priv->timer);
1976
1977 free_irq(pdev->irq, net_dev);
1978
1979 /* Free Tx and RX skbuff */
1980 for (i = 0; i < NUM_RX_DESC; i++) {
1981 skb = sis_priv->rx_skbuff[i];
1982 if (skb) {
1983 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
1984 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1985 dev_kfree_skb(skb);
1986 sis_priv->rx_skbuff[i] = NULL;
1987 }
1988 }
1989 for (i = 0; i < NUM_TX_DESC; i++) {
1990 skb = sis_priv->tx_skbuff[i];
1991 if (skb) {
1992 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
1993 skb->len, PCI_DMA_TODEVICE);
1994 dev_kfree_skb(skb);
1995 sis_priv->tx_skbuff[i] = NULL;
1996 }
1997 }
1998
1999 /* Green! Put the chip in low-power mode. */
2000
2001 return 0;
2002}
2003
2004/**
2005 * sis900_get_drvinfo - Return information about driver
2006 * @net_dev: the net device to probe
2007 * @info: container for info returned
2008 *
2009 * Process ethtool command such as "ehtool -i" to show information
2010 */
2011
2012static void sis900_get_drvinfo(struct net_device *net_dev,
2013 struct ethtool_drvinfo *info)
2014{
2015 struct sis900_private *sis_priv = netdev_priv(net_dev);
2016
2017 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
2018 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
2019 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
2020 sizeof(info->bus_info));
2021}
2022
2023static u32 sis900_get_msglevel(struct net_device *net_dev)
2024{
2025 struct sis900_private *sis_priv = netdev_priv(net_dev);
2026 return sis_priv->msg_enable;
2027}
2028
2029static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2030{
2031 struct sis900_private *sis_priv = netdev_priv(net_dev);
2032 sis_priv->msg_enable = value;
2033}
2034
2035static u32 sis900_get_link(struct net_device *net_dev)
2036{
2037 struct sis900_private *sis_priv = netdev_priv(net_dev);
2038 return mii_link_ok(&sis_priv->mii_info);
2039}
2040
2041static int sis900_get_settings(struct net_device *net_dev,
2042 struct ethtool_cmd *cmd)
2043{
2044 struct sis900_private *sis_priv = netdev_priv(net_dev);
2045 spin_lock_irq(&sis_priv->lock);
2046 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2047 spin_unlock_irq(&sis_priv->lock);
2048 return 0;
2049}
2050
2051static int sis900_set_settings(struct net_device *net_dev,
2052 struct ethtool_cmd *cmd)
2053{
2054 struct sis900_private *sis_priv = netdev_priv(net_dev);
2055 int rt;
2056 spin_lock_irq(&sis_priv->lock);
2057 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2058 spin_unlock_irq(&sis_priv->lock);
2059 return rt;
2060}
2061
2062static int sis900_nway_reset(struct net_device *net_dev)
2063{
2064 struct sis900_private *sis_priv = netdev_priv(net_dev);
2065 return mii_nway_restart(&sis_priv->mii_info);
2066}
2067
2068/**
2069 * sis900_set_wol - Set up Wake on Lan registers
2070 * @net_dev: the net device to probe
2071 * @wol: container for info passed to the driver
2072 *
2073 * Process ethtool command "wol" to setup wake on lan features.
2074 * SiS900 supports sending WoL events if a correct packet is received,
2075 * but there is no simple way to filter them to only a subset (broadcast,
2076 * multicast, unicast or arp).
2077 */
2078
2079static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2080{
2081 struct sis900_private *sis_priv = netdev_priv(net_dev);
2082 void __iomem *ioaddr = sis_priv->ioaddr;
2083 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2084
2085 if (wol->wolopts == 0) {
2086 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2087 cfgpmcsr &= ~PME_EN;
2088 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2089 sw32(pmctrl, pmctrl_bits);
2090 if (netif_msg_wol(sis_priv))
2091 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2092 return 0;
2093 }
2094
2095 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2096 | WAKE_BCAST | WAKE_ARP))
2097 return -EINVAL;
2098
2099 if (wol->wolopts & WAKE_MAGIC)
2100 pmctrl_bits |= MAGICPKT;
2101 if (wol->wolopts & WAKE_PHY)
2102 pmctrl_bits |= LINKON;
2103
2104 sw32(pmctrl, pmctrl_bits);
2105
2106 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2107 cfgpmcsr |= PME_EN;
2108 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2109 if (netif_msg_wol(sis_priv))
2110 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2111
2112 return 0;
2113}
2114
2115static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2116{
2117 struct sis900_private *sp = netdev_priv(net_dev);
2118 void __iomem *ioaddr = sp->ioaddr;
2119 u32 pmctrl_bits;
2120
2121 pmctrl_bits = sr32(pmctrl);
2122 if (pmctrl_bits & MAGICPKT)
2123 wol->wolopts |= WAKE_MAGIC;
2124 if (pmctrl_bits & LINKON)
2125 wol->wolopts |= WAKE_PHY;
2126
2127 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2128}
2129
2130static const struct ethtool_ops sis900_ethtool_ops = {
2131 .get_drvinfo = sis900_get_drvinfo,
2132 .get_msglevel = sis900_get_msglevel,
2133 .set_msglevel = sis900_set_msglevel,
2134 .get_link = sis900_get_link,
2135 .get_settings = sis900_get_settings,
2136 .set_settings = sis900_set_settings,
2137 .nway_reset = sis900_nway_reset,
2138 .get_wol = sis900_get_wol,
2139 .set_wol = sis900_set_wol
2140};
2141
2142/**
2143 * mii_ioctl - process MII i/o control command
2144 * @net_dev: the net device to command for
2145 * @rq: parameter for command
2146 * @cmd: the i/o command
2147 *
2148 * Process MII command like read/write MII register
2149 */
2150
2151static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2152{
2153 struct sis900_private *sis_priv = netdev_priv(net_dev);
2154 struct mii_ioctl_data *data = if_mii(rq);
2155
2156 switch(cmd) {
2157 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2158 data->phy_id = sis_priv->mii->phy_addr;
2159 /* Fall Through */
2160
2161 case SIOCGMIIREG: /* Read MII PHY register. */
2162 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2163 return 0;
2164
2165 case SIOCSMIIREG: /* Write MII PHY register. */
2166 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2167 return 0;
2168 default:
2169 return -EOPNOTSUPP;
2170 }
2171}
2172
2173/**
2174 * sis900_set_config - Set media type by net_device.set_config
2175 * @dev: the net device for media type change
2176 * @map: ifmap passed by ifconfig
2177 *
2178 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2179 * we support only port changes. All other runtime configuration
2180 * changes will be ignored
2181 */
2182
2183static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2184{
2185 struct sis900_private *sis_priv = netdev_priv(dev);
2186 struct mii_phy *mii_phy = sis_priv->mii;
2187
2188 u16 status;
2189
2190 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2191 /* we switch on the ifmap->port field. I couldn't find anything
2192 * like a definition or standard for the values of that field.
2193 * I think the meaning of those values is device specific. But
2194 * since I would like to change the media type via the ifconfig
2195 * command I use the definition from linux/netdevice.h
2196 * (which seems to be different from the ifport(pcmcia) definition) */
2197 switch(map->port){
2198 case IF_PORT_UNKNOWN: /* use auto here */
2199 dev->if_port = map->port;
2200 /* we are going to change the media type, so the Link
2201 * will be temporary down and we need to reflect that
2202 * here. When the Link comes up again, it will be
2203 * sensed by the sis_timer procedure, which also does
2204 * all the rest for us */
2205 netif_carrier_off(dev);
2206
2207 /* read current state */
2208 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2209
2210 /* enable auto negotiation and reset the negotioation
2211 * (I don't really know what the auto negatiotiation
2212 * reset really means, but it sounds for me right to
2213 * do one here) */
2214 mdio_write(dev, mii_phy->phy_addr,
2215 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2216
2217 break;
2218
2219 case IF_PORT_10BASET: /* 10BaseT */
2220 dev->if_port = map->port;
2221
2222 /* we are going to change the media type, so the Link
2223 * will be temporary down and we need to reflect that
2224 * here. When the Link comes up again, it will be
2225 * sensed by the sis_timer procedure, which also does
2226 * all the rest for us */
2227 netif_carrier_off(dev);
2228
2229 /* set Speed to 10Mbps */
2230 /* read current state */
2231 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2232
2233 /* disable auto negotiation and force 10MBit mode*/
2234 mdio_write(dev, mii_phy->phy_addr,
2235 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2236 MII_CNTL_AUTO));
2237 break;
2238
2239 case IF_PORT_100BASET: /* 100BaseT */
2240 case IF_PORT_100BASETX: /* 100BaseTx */
2241 dev->if_port = map->port;
2242
2243 /* we are going to change the media type, so the Link
2244 * will be temporary down and we need to reflect that
2245 * here. When the Link comes up again, it will be
2246 * sensed by the sis_timer procedure, which also does
2247 * all the rest for us */
2248 netif_carrier_off(dev);
2249
2250 /* set Speed to 100Mbps */
2251 /* disable auto negotiation and enable 100MBit Mode */
2252 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2253 mdio_write(dev, mii_phy->phy_addr,
2254 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2255 MII_CNTL_SPEED);
2256
2257 break;
2258
2259 case IF_PORT_10BASE2: /* 10Base2 */
2260 case IF_PORT_AUI: /* AUI */
2261 case IF_PORT_100BASEFX: /* 100BaseFx */
2262 /* These Modes are not supported (are they?)*/
2263 return -EOPNOTSUPP;
2264 break;
2265
2266 default:
2267 return -EINVAL;
2268 }
2269 }
2270 return 0;
2271}
2272
2273/**
2274 * sis900_mcast_bitnr - compute hashtable index
2275 * @addr: multicast address
2276 * @revision: revision id of chip
2277 *
2278 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2279 * hash table, which makes this function a little bit different from other drivers
2280 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2281 * multicast hash table.
2282 */
2283
2284static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2285{
2286
2287 u32 crc = ether_crc(6, addr);
2288
2289 /* leave 8 or 7 most siginifant bits */
2290 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2291 return (int)(crc >> 24);
2292 else
2293 return (int)(crc >> 25);
2294}
2295
2296/**
2297 * set_rx_mode - Set SiS900 receive mode
2298 * @net_dev: the net device to be set
2299 *
2300 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2301 * And set the appropriate multicast filter.
2302 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2303 */
2304
2305static void set_rx_mode(struct net_device *net_dev)
2306{
2307 struct sis900_private *sis_priv = netdev_priv(net_dev);
2308 void __iomem *ioaddr = sis_priv->ioaddr;
2309 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2310 int i, table_entries;
2311 u32 rx_mode;
2312
2313 /* 635 Hash Table entries = 256(2^16) */
2314 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2315 (sis_priv->chipset_rev == SIS900B_900_REV))
2316 table_entries = 16;
2317 else
2318 table_entries = 8;
2319
2320 if (net_dev->flags & IFF_PROMISC) {
2321 /* Accept any kinds of packets */
2322 rx_mode = RFPromiscuous;
2323 for (i = 0; i < table_entries; i++)
2324 mc_filter[i] = 0xffff;
2325 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
2326 (net_dev->flags & IFF_ALLMULTI)) {
2327 /* too many multicast addresses or accept all multicast packet */
2328 rx_mode = RFAAB | RFAAM;
2329 for (i = 0; i < table_entries; i++)
2330 mc_filter[i] = 0xffff;
2331 } else {
2332 /* Accept Broadcast packet, destination address matchs our
2333 * MAC address, use Receive Filter to reject unwanted MCAST
2334 * packets */
2335 struct netdev_hw_addr *ha;
2336 rx_mode = RFAAB;
2337
2338 netdev_for_each_mc_addr(ha, net_dev) {
2339 unsigned int bit_nr;
2340
2341 bit_nr = sis900_mcast_bitnr(ha->addr,
2342 sis_priv->chipset_rev);
2343 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2344 }
2345 }
2346
2347 /* update Multicast Hash Table in Receive Filter */
2348 for (i = 0; i < table_entries; i++) {
2349 /* why plus 0x04 ??, That makes the correct value for hash table. */
2350 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2351 sw32(rfdr, mc_filter[i]);
2352 }
2353
2354 sw32(rfcr, RFEN | rx_mode);
2355
2356 /* sis900 is capable of looping back packets at MAC level for
2357 * debugging purpose */
2358 if (net_dev->flags & IFF_LOOPBACK) {
2359 u32 cr_saved;
2360 /* We must disable Tx/Rx before setting loopback mode */
2361 cr_saved = sr32(cr);
2362 sw32(cr, cr_saved | TxDIS | RxDIS);
2363 /* enable loopback */
2364 sw32(txcfg, sr32(txcfg) | TxMLB);
2365 sw32(rxcfg, sr32(rxcfg) | RxATX);
2366 /* restore cr */
2367 sw32(cr, cr_saved);
2368 }
2369}
2370
2371/**
2372 * sis900_reset - Reset sis900 MAC
2373 * @net_dev: the net device to reset
2374 *
2375 * reset sis900 MAC and wait until finished
2376 * reset through command register
2377 * change backoff algorithm for 900B0 & 635 M/B
2378 */
2379
2380static void sis900_reset(struct net_device *net_dev)
2381{
2382 struct sis900_private *sis_priv = netdev_priv(net_dev);
2383 void __iomem *ioaddr = sis_priv->ioaddr;
2384 u32 status = TxRCMP | RxRCMP;
2385 int i;
2386
2387 sw32(ier, 0);
2388 sw32(imr, 0);
2389 sw32(rfcr, 0);
2390
2391 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2392
2393 /* Check that the chip has finished the reset. */
2394 for (i = 0; status && (i < 1000); i++)
2395 status ^= sr32(isr) & status;
2396
2397 if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2398 sis_priv->chipset_rev == SIS900B_900_REV)
2399 sw32(cfg, PESEL | RND_CNT);
2400 else
2401 sw32(cfg, PESEL);
2402}
2403
2404/**
2405 * sis900_remove - Remove sis900 device
2406 * @pci_dev: the pci device to be removed
2407 *
2408 * remove and release SiS900 net device
2409 */
2410
2411static void __devexit sis900_remove(struct pci_dev *pci_dev)
2412{
2413 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2414 struct sis900_private *sis_priv = netdev_priv(net_dev);
2415
2416 unregister_netdev(net_dev);
2417
2418 while (sis_priv->first_mii) {
2419 struct mii_phy *phy = sis_priv->first_mii;
2420
2421 sis_priv->first_mii = phy->next;
2422 kfree(phy);
2423 }
2424
2425 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2426 sis_priv->rx_ring_dma);
2427 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2428 sis_priv->tx_ring_dma);
2429 pci_iounmap(pci_dev, sis_priv->ioaddr);
2430 free_netdev(net_dev);
2431 pci_release_regions(pci_dev);
2432 pci_set_drvdata(pci_dev, NULL);
2433}
2434
2435#ifdef CONFIG_PM
2436
2437static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2438{
2439 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2440 struct sis900_private *sis_priv = netdev_priv(net_dev);
2441 void __iomem *ioaddr = sis_priv->ioaddr;
2442
2443 if(!netif_running(net_dev))
2444 return 0;
2445
2446 netif_stop_queue(net_dev);
2447 netif_device_detach(net_dev);
2448
2449 /* Stop the chip's Tx and Rx Status Machine */
2450 sw32(cr, RxDIS | TxDIS | sr32(cr));
2451
2452 pci_set_power_state(pci_dev, PCI_D3hot);
2453 pci_save_state(pci_dev);
2454
2455 return 0;
2456}
2457
2458static int sis900_resume(struct pci_dev *pci_dev)
2459{
2460 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2461 struct sis900_private *sis_priv = netdev_priv(net_dev);
2462 void __iomem *ioaddr = sis_priv->ioaddr;
2463
2464 if(!netif_running(net_dev))
2465 return 0;
2466 pci_restore_state(pci_dev);
2467 pci_set_power_state(pci_dev, PCI_D0);
2468
2469 sis900_init_rxfilter(net_dev);
2470
2471 sis900_init_tx_ring(net_dev);
2472 sis900_init_rx_ring(net_dev);
2473
2474 set_rx_mode(net_dev);
2475
2476 netif_device_attach(net_dev);
2477 netif_start_queue(net_dev);
2478
2479 /* Workaround for EDB */
2480 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2481
2482 /* Enable all known interrupts by setting the interrupt mask. */
2483 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
2484 sw32(cr, RxENA | sr32(cr));
2485 sw32(ier, IE);
2486
2487 sis900_check_mode(net_dev, sis_priv->mii);
2488
2489 return 0;
2490}
2491#endif /* CONFIG_PM */
2492
2493static struct pci_driver sis900_pci_driver = {
2494 .name = SIS900_MODULE_NAME,
2495 .id_table = sis900_pci_tbl,
2496 .probe = sis900_probe,
2497 .remove = __devexit_p(sis900_remove),
2498#ifdef CONFIG_PM
2499 .suspend = sis900_suspend,
2500 .resume = sis900_resume,
2501#endif /* CONFIG_PM */
2502};
2503
2504static int __init sis900_init_module(void)
2505{
2506/* when a module, this is printed whether or not devices are found in probe */
2507#ifdef MODULE
2508 printk(version);
2509#endif
2510
2511 return pci_register_driver(&sis900_pci_driver);
2512}
2513
2514static void __exit sis900_cleanup_module(void)
2515{
2516 pci_unregister_driver(&sis900_pci_driver);
2517}
2518
2519module_init(sis900_init_module);
2520module_exit(sis900_cleanup_module);
2521