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1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/delay.h>
16#include <linux/notifier.h>
17#include <linux/ip.h>
18#include <linux/tcp.h>
19#include <linux/in.h>
20#include <linux/crc32.h>
21#include <linux/ethtool.h>
22#include <linux/topology.h>
23#include <linux/gfp.h>
24#include <linux/cpu_rmap.h>
25#include "net_driver.h"
26#include "efx.h"
27#include "nic.h"
28#include "selftest.h"
29
30#include "mcdi.h"
31#include "workarounds.h"
32
33/**************************************************************************
34 *
35 * Type name strings
36 *
37 **************************************************************************
38 */
39
40/* Loopback mode names (see LOOPBACK_MODE()) */
41const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
70};
71
72const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_WORLD] = "WORLD",
77 [RESET_TYPE_DISABLE] = "DISABLE",
78 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
79 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
80 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
81 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
82 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
83 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
84 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
85};
86
87#define EFX_MAX_MTU (9 * 1024)
88
89/* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 */
93static struct workqueue_struct *reset_workqueue;
94
95/**************************************************************************
96 *
97 * Configurable values
98 *
99 *************************************************************************/
100
101/*
102 * Use separate channels for TX and RX events
103 *
104 * Set this to 1 to use separate channels for TX and RX. It allows us
105 * to control interrupt affinity separately for TX and RX.
106 *
107 * This is only used in MSI-X interrupt mode
108 */
109static unsigned int separate_tx_channels;
110module_param(separate_tx_channels, uint, 0444);
111MODULE_PARM_DESC(separate_tx_channels,
112 "Use separate channels for TX and RX");
113
114/* This is the weight assigned to each of the (per-channel) virtual
115 * NAPI devices.
116 */
117static int napi_weight = 64;
118
119/* This is the time (in jiffies) between invocations of the hardware
120 * monitor. On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 */
124static unsigned int efx_monitor_interval = 1 * HZ;
125
126/* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
128 *
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
131 */
132static unsigned int rx_irq_mod_usec = 60;
133
134/* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
136 *
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
142 */
143static unsigned int tx_irq_mod_usec = 150;
144
145/* This is the first interrupt mode to try out of:
146 * 0 => MSI-X
147 * 1 => MSI
148 * 2 => legacy
149 */
150static unsigned int interrupt_mode;
151
152/* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
155 *
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each core.
158 */
159static unsigned int rss_cpus;
160module_param(rss_cpus, uint, 0444);
161MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162
163static int phy_flash_cfg;
164module_param(phy_flash_cfg, int, 0644);
165MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166
167static unsigned irq_adapt_low_thresh = 8000;
168module_param(irq_adapt_low_thresh, uint, 0644);
169MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
171
172static unsigned irq_adapt_high_thresh = 16000;
173module_param(irq_adapt_high_thresh, uint, 0644);
174MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
176
177static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
178 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
179 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
180 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
181module_param(debug, uint, 0);
182MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
183
184/**************************************************************************
185 *
186 * Utility functions and prototypes
187 *
188 *************************************************************************/
189
190static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
191static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
192static void efx_remove_channel(struct efx_channel *channel);
193static void efx_remove_channels(struct efx_nic *efx);
194static const struct efx_channel_type efx_default_channel_type;
195static void efx_remove_port(struct efx_nic *efx);
196static void efx_init_napi_channel(struct efx_channel *channel);
197static void efx_fini_napi(struct efx_nic *efx);
198static void efx_fini_napi_channel(struct efx_channel *channel);
199static void efx_fini_struct(struct efx_nic *efx);
200static void efx_start_all(struct efx_nic *efx);
201static void efx_stop_all(struct efx_nic *efx);
202
203#define EFX_ASSERT_RESET_SERIALISED(efx) \
204 do { \
205 if ((efx->state == STATE_RUNNING) || \
206 (efx->state == STATE_DISABLED)) \
207 ASSERT_RTNL(); \
208 } while (0)
209
210/**************************************************************************
211 *
212 * Event queue processing
213 *
214 *************************************************************************/
215
216/* Process channel's event queue
217 *
218 * This function is responsible for processing the event queue of a
219 * single channel. The caller must guarantee that this function will
220 * never be concurrently called more than once on the same channel,
221 * though different channels may be being processed concurrently.
222 */
223static int efx_process_channel(struct efx_channel *channel, int budget)
224{
225 int spent;
226
227 if (unlikely(!channel->enabled))
228 return 0;
229
230 spent = efx_nic_process_eventq(channel, budget);
231 if (spent && efx_channel_has_rx_queue(channel)) {
232 struct efx_rx_queue *rx_queue =
233 efx_channel_get_rx_queue(channel);
234
235 /* Deliver last RX packet. */
236 if (channel->rx_pkt) {
237 __efx_rx_packet(channel, channel->rx_pkt);
238 channel->rx_pkt = NULL;
239 }
240 if (rx_queue->enabled) {
241 efx_rx_strategy(channel);
242 efx_fast_push_rx_descriptors(rx_queue);
243 }
244 }
245
246 return spent;
247}
248
249/* Mark channel as finished processing
250 *
251 * Note that since we will not receive further interrupts for this
252 * channel before we finish processing and call the eventq_read_ack()
253 * method, there is no need to use the interrupt hold-off timers.
254 */
255static inline void efx_channel_processed(struct efx_channel *channel)
256{
257 /* The interrupt handler for this channel may set work_pending
258 * as soon as we acknowledge the events we've seen. Make sure
259 * it's cleared before then. */
260 channel->work_pending = false;
261 smp_wmb();
262
263 efx_nic_eventq_read_ack(channel);
264}
265
266/* NAPI poll handler
267 *
268 * NAPI guarantees serialisation of polls of the same device, which
269 * provides the guarantee required by efx_process_channel().
270 */
271static int efx_poll(struct napi_struct *napi, int budget)
272{
273 struct efx_channel *channel =
274 container_of(napi, struct efx_channel, napi_str);
275 struct efx_nic *efx = channel->efx;
276 int spent;
277
278 netif_vdbg(efx, intr, efx->net_dev,
279 "channel %d NAPI poll executing on CPU %d\n",
280 channel->channel, raw_smp_processor_id());
281
282 spent = efx_process_channel(channel, budget);
283
284 if (spent < budget) {
285 if (efx_channel_has_rx_queue(channel) &&
286 efx->irq_rx_adaptive &&
287 unlikely(++channel->irq_count == 1000)) {
288 if (unlikely(channel->irq_mod_score <
289 irq_adapt_low_thresh)) {
290 if (channel->irq_moderation > 1) {
291 channel->irq_moderation -= 1;
292 efx->type->push_irq_moderation(channel);
293 }
294 } else if (unlikely(channel->irq_mod_score >
295 irq_adapt_high_thresh)) {
296 if (channel->irq_moderation <
297 efx->irq_rx_moderation) {
298 channel->irq_moderation += 1;
299 efx->type->push_irq_moderation(channel);
300 }
301 }
302 channel->irq_count = 0;
303 channel->irq_mod_score = 0;
304 }
305
306 efx_filter_rfs_expire(channel);
307
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
312 */
313 napi_complete(napi);
314 efx_channel_processed(channel);
315 }
316
317 return spent;
318}
319
320/* Process the eventq of the specified channel immediately on this CPU
321 *
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
325 *
326 * This is for use only during a loopback self-test. It must not
327 * deliver any packets up the stack as this can result in deadlock.
328 */
329void efx_process_channel_now(struct efx_channel *channel)
330{
331 struct efx_nic *efx = channel->efx;
332
333 BUG_ON(channel->channel >= efx->n_channels);
334 BUG_ON(!channel->enabled);
335 BUG_ON(!efx->loopback_selftest);
336
337 /* Disable interrupts and wait for ISRs to complete */
338 efx_nic_disable_interrupts(efx);
339 if (efx->legacy_irq) {
340 synchronize_irq(efx->legacy_irq);
341 efx->legacy_irq_enabled = false;
342 }
343 if (channel->irq)
344 synchronize_irq(channel->irq);
345
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel->napi_str);
348
349 /* Poll the channel */
350 efx_process_channel(channel, channel->eventq_mask + 1);
351
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel);
355
356 napi_enable(&channel->napi_str);
357 if (efx->legacy_irq)
358 efx->legacy_irq_enabled = true;
359 efx_nic_enable_interrupts(efx);
360}
361
362/* Create event queue
363 * Event queue memory allocations are done only once. If the channel
364 * is reset, the memory buffer will be reused; this guards against
365 * errors during channel reset and also simplifies interrupt handling.
366 */
367static int efx_probe_eventq(struct efx_channel *channel)
368{
369 struct efx_nic *efx = channel->efx;
370 unsigned long entries;
371
372 netif_dbg(efx, probe, efx->net_dev,
373 "chan %d create event queue\n", channel->channel);
374
375 /* Build an event queue with room for one event per tx and rx buffer,
376 * plus some extra for link state events and MCDI completions. */
377 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
378 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
379 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
380
381 return efx_nic_probe_eventq(channel);
382}
383
384/* Prepare channel's event queue */
385static void efx_init_eventq(struct efx_channel *channel)
386{
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d init event queue\n", channel->channel);
389
390 channel->eventq_read_ptr = 0;
391
392 efx_nic_init_eventq(channel);
393}
394
395/* Enable event queue processing and NAPI */
396static void efx_start_eventq(struct efx_channel *channel)
397{
398 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
399 "chan %d start event queue\n", channel->channel);
400
401 /* The interrupt handler for this channel may set work_pending
402 * as soon as we enable it. Make sure it's cleared before
403 * then. Similarly, make sure it sees the enabled flag set.
404 */
405 channel->work_pending = false;
406 channel->enabled = true;
407 smp_wmb();
408
409 napi_enable(&channel->napi_str);
410 efx_nic_eventq_read_ack(channel);
411}
412
413/* Disable event queue processing and NAPI */
414static void efx_stop_eventq(struct efx_channel *channel)
415{
416 if (!channel->enabled)
417 return;
418
419 napi_disable(&channel->napi_str);
420 channel->enabled = false;
421}
422
423static void efx_fini_eventq(struct efx_channel *channel)
424{
425 netif_dbg(channel->efx, drv, channel->efx->net_dev,
426 "chan %d fini event queue\n", channel->channel);
427
428 efx_nic_fini_eventq(channel);
429}
430
431static void efx_remove_eventq(struct efx_channel *channel)
432{
433 netif_dbg(channel->efx, drv, channel->efx->net_dev,
434 "chan %d remove event queue\n", channel->channel);
435
436 efx_nic_remove_eventq(channel);
437}
438
439/**************************************************************************
440 *
441 * Channel handling
442 *
443 *************************************************************************/
444
445/* Allocate and initialise a channel structure. */
446static struct efx_channel *
447efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
448{
449 struct efx_channel *channel;
450 struct efx_rx_queue *rx_queue;
451 struct efx_tx_queue *tx_queue;
452 int j;
453
454 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
455 if (!channel)
456 return NULL;
457
458 channel->efx = efx;
459 channel->channel = i;
460 channel->type = &efx_default_channel_type;
461
462 for (j = 0; j < EFX_TXQ_TYPES; j++) {
463 tx_queue = &channel->tx_queue[j];
464 tx_queue->efx = efx;
465 tx_queue->queue = i * EFX_TXQ_TYPES + j;
466 tx_queue->channel = channel;
467 }
468
469 rx_queue = &channel->rx_queue;
470 rx_queue->efx = efx;
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
473
474 return channel;
475}
476
477/* Allocate and initialise a channel structure, copying parameters
478 * (but not resources) from an old channel structure.
479 */
480static struct efx_channel *
481efx_copy_channel(const struct efx_channel *old_channel)
482{
483 struct efx_channel *channel;
484 struct efx_rx_queue *rx_queue;
485 struct efx_tx_queue *tx_queue;
486 int j;
487
488 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
489 if (!channel)
490 return NULL;
491
492 *channel = *old_channel;
493
494 channel->napi_dev = NULL;
495 memset(&channel->eventq, 0, sizeof(channel->eventq));
496
497 for (j = 0; j < EFX_TXQ_TYPES; j++) {
498 tx_queue = &channel->tx_queue[j];
499 if (tx_queue->channel)
500 tx_queue->channel = channel;
501 tx_queue->buffer = NULL;
502 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
503 }
504
505 rx_queue = &channel->rx_queue;
506 rx_queue->buffer = NULL;
507 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
508 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
509 (unsigned long)rx_queue);
510
511 return channel;
512}
513
514static int efx_probe_channel(struct efx_channel *channel)
515{
516 struct efx_tx_queue *tx_queue;
517 struct efx_rx_queue *rx_queue;
518 int rc;
519
520 netif_dbg(channel->efx, probe, channel->efx->net_dev,
521 "creating channel %d\n", channel->channel);
522
523 rc = channel->type->pre_probe(channel);
524 if (rc)
525 goto fail;
526
527 rc = efx_probe_eventq(channel);
528 if (rc)
529 goto fail;
530
531 efx_for_each_channel_tx_queue(tx_queue, channel) {
532 rc = efx_probe_tx_queue(tx_queue);
533 if (rc)
534 goto fail;
535 }
536
537 efx_for_each_channel_rx_queue(rx_queue, channel) {
538 rc = efx_probe_rx_queue(rx_queue);
539 if (rc)
540 goto fail;
541 }
542
543 channel->n_rx_frm_trunc = 0;
544
545 return 0;
546
547fail:
548 efx_remove_channel(channel);
549 return rc;
550}
551
552static void
553efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
554{
555 struct efx_nic *efx = channel->efx;
556 const char *type;
557 int number;
558
559 number = channel->channel;
560 if (efx->tx_channel_offset == 0) {
561 type = "";
562 } else if (channel->channel < efx->tx_channel_offset) {
563 type = "-rx";
564 } else {
565 type = "-tx";
566 number -= efx->tx_channel_offset;
567 }
568 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
569}
570
571static void efx_set_channel_names(struct efx_nic *efx)
572{
573 struct efx_channel *channel;
574
575 efx_for_each_channel(channel, efx)
576 channel->type->get_name(channel,
577 efx->channel_name[channel->channel],
578 sizeof(efx->channel_name[0]));
579}
580
581static int efx_probe_channels(struct efx_nic *efx)
582{
583 struct efx_channel *channel;
584 int rc;
585
586 /* Restart special buffer allocation */
587 efx->next_buffer_table = 0;
588
589 /* Probe channels in reverse, so that any 'extra' channels
590 * use the start of the buffer table. This allows the traffic
591 * channels to be resized without moving them or wasting the
592 * entries before them.
593 */
594 efx_for_each_channel_rev(channel, efx) {
595 rc = efx_probe_channel(channel);
596 if (rc) {
597 netif_err(efx, probe, efx->net_dev,
598 "failed to create channel %d\n",
599 channel->channel);
600 goto fail;
601 }
602 }
603 efx_set_channel_names(efx);
604
605 return 0;
606
607fail:
608 efx_remove_channels(efx);
609 return rc;
610}
611
612/* Channels are shutdown and reinitialised whilst the NIC is running
613 * to propagate configuration changes (mtu, checksum offload), or
614 * to clear hardware error conditions
615 */
616static void efx_start_datapath(struct efx_nic *efx)
617{
618 struct efx_tx_queue *tx_queue;
619 struct efx_rx_queue *rx_queue;
620 struct efx_channel *channel;
621
622 /* Calculate the rx buffer allocation parameters required to
623 * support the current MTU, including padding for header
624 * alignment and overruns.
625 */
626 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
627 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
628 efx->type->rx_buffer_hash_size +
629 efx->type->rx_buffer_padding);
630 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
631 sizeof(struct efx_rx_page_state));
632
633 /* Initialise the channels */
634 efx_for_each_channel(channel, efx) {
635 efx_for_each_channel_tx_queue(tx_queue, channel)
636 efx_init_tx_queue(tx_queue);
637
638 /* The rx buffer allocation strategy is MTU dependent */
639 efx_rx_strategy(channel);
640
641 efx_for_each_channel_rx_queue(rx_queue, channel) {
642 efx_init_rx_queue(rx_queue);
643 efx_nic_generate_fill_event(rx_queue);
644 }
645
646 WARN_ON(channel->rx_pkt != NULL);
647 efx_rx_strategy(channel);
648 }
649
650 if (netif_device_present(efx->net_dev))
651 netif_tx_wake_all_queues(efx->net_dev);
652}
653
654static void efx_stop_datapath(struct efx_nic *efx)
655{
656 struct efx_channel *channel;
657 struct efx_tx_queue *tx_queue;
658 struct efx_rx_queue *rx_queue;
659 struct pci_dev *dev = efx->pci_dev;
660 int rc;
661
662 EFX_ASSERT_RESET_SERIALISED(efx);
663 BUG_ON(efx->port_enabled);
664
665 /* Only perform flush if dma is enabled */
666 if (dev->is_busmaster) {
667 rc = efx_nic_flush_queues(efx);
668
669 if (rc && EFX_WORKAROUND_7803(efx)) {
670 /* Schedule a reset to recover from the flush failure. The
671 * descriptor caches reference memory we're about to free,
672 * but falcon_reconfigure_mac_wrapper() won't reconnect
673 * the MACs because of the pending reset. */
674 netif_err(efx, drv, efx->net_dev,
675 "Resetting to recover from flush failure\n");
676 efx_schedule_reset(efx, RESET_TYPE_ALL);
677 } else if (rc) {
678 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
679 } else {
680 netif_dbg(efx, drv, efx->net_dev,
681 "successfully flushed all queues\n");
682 }
683 }
684
685 efx_for_each_channel(channel, efx) {
686 /* RX packet processing is pipelined, so wait for the
687 * NAPI handler to complete. At least event queue 0
688 * might be kept active by non-data events, so don't
689 * use napi_synchronize() but actually disable NAPI
690 * temporarily.
691 */
692 if (efx_channel_has_rx_queue(channel)) {
693 efx_stop_eventq(channel);
694 efx_start_eventq(channel);
695 }
696
697 efx_for_each_channel_rx_queue(rx_queue, channel)
698 efx_fini_rx_queue(rx_queue);
699 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
700 efx_fini_tx_queue(tx_queue);
701 }
702}
703
704static void efx_remove_channel(struct efx_channel *channel)
705{
706 struct efx_tx_queue *tx_queue;
707 struct efx_rx_queue *rx_queue;
708
709 netif_dbg(channel->efx, drv, channel->efx->net_dev,
710 "destroy chan %d\n", channel->channel);
711
712 efx_for_each_channel_rx_queue(rx_queue, channel)
713 efx_remove_rx_queue(rx_queue);
714 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
715 efx_remove_tx_queue(tx_queue);
716 efx_remove_eventq(channel);
717}
718
719static void efx_remove_channels(struct efx_nic *efx)
720{
721 struct efx_channel *channel;
722
723 efx_for_each_channel(channel, efx)
724 efx_remove_channel(channel);
725}
726
727int
728efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
729{
730 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
731 u32 old_rxq_entries, old_txq_entries;
732 unsigned i, next_buffer_table = 0;
733 int rc = 0;
734
735 /* Not all channels should be reallocated. We must avoid
736 * reallocating their buffer table entries.
737 */
738 efx_for_each_channel(channel, efx) {
739 struct efx_rx_queue *rx_queue;
740 struct efx_tx_queue *tx_queue;
741
742 if (channel->type->copy)
743 continue;
744 next_buffer_table = max(next_buffer_table,
745 channel->eventq.index +
746 channel->eventq.entries);
747 efx_for_each_channel_rx_queue(rx_queue, channel)
748 next_buffer_table = max(next_buffer_table,
749 rx_queue->rxd.index +
750 rx_queue->rxd.entries);
751 efx_for_each_channel_tx_queue(tx_queue, channel)
752 next_buffer_table = max(next_buffer_table,
753 tx_queue->txd.index +
754 tx_queue->txd.entries);
755 }
756
757 efx_stop_all(efx);
758 efx_stop_interrupts(efx, true);
759
760 /* Clone channels (where possible) */
761 memset(other_channel, 0, sizeof(other_channel));
762 for (i = 0; i < efx->n_channels; i++) {
763 channel = efx->channel[i];
764 if (channel->type->copy)
765 channel = channel->type->copy(channel);
766 if (!channel) {
767 rc = -ENOMEM;
768 goto out;
769 }
770 other_channel[i] = channel;
771 }
772
773 /* Swap entry counts and channel pointers */
774 old_rxq_entries = efx->rxq_entries;
775 old_txq_entries = efx->txq_entries;
776 efx->rxq_entries = rxq_entries;
777 efx->txq_entries = txq_entries;
778 for (i = 0; i < efx->n_channels; i++) {
779 channel = efx->channel[i];
780 efx->channel[i] = other_channel[i];
781 other_channel[i] = channel;
782 }
783
784 /* Restart buffer table allocation */
785 efx->next_buffer_table = next_buffer_table;
786
787 for (i = 0; i < efx->n_channels; i++) {
788 channel = efx->channel[i];
789 if (!channel->type->copy)
790 continue;
791 rc = efx_probe_channel(channel);
792 if (rc)
793 goto rollback;
794 efx_init_napi_channel(efx->channel[i]);
795 }
796
797out:
798 /* Destroy unused channel structures */
799 for (i = 0; i < efx->n_channels; i++) {
800 channel = other_channel[i];
801 if (channel && channel->type->copy) {
802 efx_fini_napi_channel(channel);
803 efx_remove_channel(channel);
804 kfree(channel);
805 }
806 }
807
808 efx_start_interrupts(efx, true);
809 efx_start_all(efx);
810 return rc;
811
812rollback:
813 /* Swap back */
814 efx->rxq_entries = old_rxq_entries;
815 efx->txq_entries = old_txq_entries;
816 for (i = 0; i < efx->n_channels; i++) {
817 channel = efx->channel[i];
818 efx->channel[i] = other_channel[i];
819 other_channel[i] = channel;
820 }
821 goto out;
822}
823
824void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
825{
826 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
827}
828
829static const struct efx_channel_type efx_default_channel_type = {
830 .pre_probe = efx_channel_dummy_op_int,
831 .get_name = efx_get_channel_name,
832 .copy = efx_copy_channel,
833 .keep_eventq = false,
834};
835
836int efx_channel_dummy_op_int(struct efx_channel *channel)
837{
838 return 0;
839}
840
841/**************************************************************************
842 *
843 * Port handling
844 *
845 **************************************************************************/
846
847/* This ensures that the kernel is kept informed (via
848 * netif_carrier_on/off) of the link status, and also maintains the
849 * link status's stop on the port's TX queue.
850 */
851void efx_link_status_changed(struct efx_nic *efx)
852{
853 struct efx_link_state *link_state = &efx->link_state;
854
855 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
856 * that no events are triggered between unregister_netdev() and the
857 * driver unloading. A more general condition is that NETDEV_CHANGE
858 * can only be generated between NETDEV_UP and NETDEV_DOWN */
859 if (!netif_running(efx->net_dev))
860 return;
861
862 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
863 efx->n_link_state_changes++;
864
865 if (link_state->up)
866 netif_carrier_on(efx->net_dev);
867 else
868 netif_carrier_off(efx->net_dev);
869 }
870
871 /* Status message for kernel log */
872 if (link_state->up)
873 netif_info(efx, link, efx->net_dev,
874 "link up at %uMbps %s-duplex (MTU %d)%s\n",
875 link_state->speed, link_state->fd ? "full" : "half",
876 efx->net_dev->mtu,
877 (efx->promiscuous ? " [PROMISC]" : ""));
878 else
879 netif_info(efx, link, efx->net_dev, "link down\n");
880}
881
882void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
883{
884 efx->link_advertising = advertising;
885 if (advertising) {
886 if (advertising & ADVERTISED_Pause)
887 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
888 else
889 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
890 if (advertising & ADVERTISED_Asym_Pause)
891 efx->wanted_fc ^= EFX_FC_TX;
892 }
893}
894
895void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
896{
897 efx->wanted_fc = wanted_fc;
898 if (efx->link_advertising) {
899 if (wanted_fc & EFX_FC_RX)
900 efx->link_advertising |= (ADVERTISED_Pause |
901 ADVERTISED_Asym_Pause);
902 else
903 efx->link_advertising &= ~(ADVERTISED_Pause |
904 ADVERTISED_Asym_Pause);
905 if (wanted_fc & EFX_FC_TX)
906 efx->link_advertising ^= ADVERTISED_Asym_Pause;
907 }
908}
909
910static void efx_fini_port(struct efx_nic *efx);
911
912/* Push loopback/power/transmit disable settings to the PHY, and reconfigure
913 * the MAC appropriately. All other PHY configuration changes are pushed
914 * through phy_op->set_settings(), and pushed asynchronously to the MAC
915 * through efx_monitor().
916 *
917 * Callers must hold the mac_lock
918 */
919int __efx_reconfigure_port(struct efx_nic *efx)
920{
921 enum efx_phy_mode phy_mode;
922 int rc;
923
924 WARN_ON(!mutex_is_locked(&efx->mac_lock));
925
926 /* Serialise the promiscuous flag with efx_set_rx_mode. */
927 netif_addr_lock_bh(efx->net_dev);
928 netif_addr_unlock_bh(efx->net_dev);
929
930 /* Disable PHY transmit in mac level loopbacks */
931 phy_mode = efx->phy_mode;
932 if (LOOPBACK_INTERNAL(efx))
933 efx->phy_mode |= PHY_MODE_TX_DISABLED;
934 else
935 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
936
937 rc = efx->type->reconfigure_port(efx);
938
939 if (rc)
940 efx->phy_mode = phy_mode;
941
942 return rc;
943}
944
945/* Reinitialise the MAC to pick up new PHY settings, even if the port is
946 * disabled. */
947int efx_reconfigure_port(struct efx_nic *efx)
948{
949 int rc;
950
951 EFX_ASSERT_RESET_SERIALISED(efx);
952
953 mutex_lock(&efx->mac_lock);
954 rc = __efx_reconfigure_port(efx);
955 mutex_unlock(&efx->mac_lock);
956
957 return rc;
958}
959
960/* Asynchronous work item for changing MAC promiscuity and multicast
961 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
962 * MAC directly. */
963static void efx_mac_work(struct work_struct *data)
964{
965 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
966
967 mutex_lock(&efx->mac_lock);
968 if (efx->port_enabled)
969 efx->type->reconfigure_mac(efx);
970 mutex_unlock(&efx->mac_lock);
971}
972
973static int efx_probe_port(struct efx_nic *efx)
974{
975 int rc;
976
977 netif_dbg(efx, probe, efx->net_dev, "create port\n");
978
979 if (phy_flash_cfg)
980 efx->phy_mode = PHY_MODE_SPECIAL;
981
982 /* Connect up MAC/PHY operations table */
983 rc = efx->type->probe_port(efx);
984 if (rc)
985 return rc;
986
987 /* Initialise MAC address to permanent address */
988 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
989
990 return 0;
991}
992
993static int efx_init_port(struct efx_nic *efx)
994{
995 int rc;
996
997 netif_dbg(efx, drv, efx->net_dev, "init port\n");
998
999 mutex_lock(&efx->mac_lock);
1000
1001 rc = efx->phy_op->init(efx);
1002 if (rc)
1003 goto fail1;
1004
1005 efx->port_initialized = true;
1006
1007 /* Reconfigure the MAC before creating dma queues (required for
1008 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1009 efx->type->reconfigure_mac(efx);
1010
1011 /* Ensure the PHY advertises the correct flow control settings */
1012 rc = efx->phy_op->reconfigure(efx);
1013 if (rc)
1014 goto fail2;
1015
1016 mutex_unlock(&efx->mac_lock);
1017 return 0;
1018
1019fail2:
1020 efx->phy_op->fini(efx);
1021fail1:
1022 mutex_unlock(&efx->mac_lock);
1023 return rc;
1024}
1025
1026static void efx_start_port(struct efx_nic *efx)
1027{
1028 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1029 BUG_ON(efx->port_enabled);
1030
1031 mutex_lock(&efx->mac_lock);
1032 efx->port_enabled = true;
1033
1034 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1035 * and then cancelled by efx_flush_all() */
1036 efx->type->reconfigure_mac(efx);
1037
1038 mutex_unlock(&efx->mac_lock);
1039}
1040
1041/* Prevent efx_mac_work() and efx_monitor() from working */
1042static void efx_stop_port(struct efx_nic *efx)
1043{
1044 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1045
1046 mutex_lock(&efx->mac_lock);
1047 efx->port_enabled = false;
1048 mutex_unlock(&efx->mac_lock);
1049
1050 /* Serialise against efx_set_multicast_list() */
1051 netif_addr_lock_bh(efx->net_dev);
1052 netif_addr_unlock_bh(efx->net_dev);
1053}
1054
1055static void efx_fini_port(struct efx_nic *efx)
1056{
1057 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1058
1059 if (!efx->port_initialized)
1060 return;
1061
1062 efx->phy_op->fini(efx);
1063 efx->port_initialized = false;
1064
1065 efx->link_state.up = false;
1066 efx_link_status_changed(efx);
1067}
1068
1069static void efx_remove_port(struct efx_nic *efx)
1070{
1071 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1072
1073 efx->type->remove_port(efx);
1074}
1075
1076/**************************************************************************
1077 *
1078 * NIC handling
1079 *
1080 **************************************************************************/
1081
1082/* This configures the PCI device to enable I/O and DMA. */
1083static int efx_init_io(struct efx_nic *efx)
1084{
1085 struct pci_dev *pci_dev = efx->pci_dev;
1086 dma_addr_t dma_mask = efx->type->max_dma_mask;
1087 int rc;
1088
1089 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1090
1091 rc = pci_enable_device(pci_dev);
1092 if (rc) {
1093 netif_err(efx, probe, efx->net_dev,
1094 "failed to enable PCI device\n");
1095 goto fail1;
1096 }
1097
1098 pci_set_master(pci_dev);
1099
1100 /* Set the PCI DMA mask. Try all possibilities from our
1101 * genuine mask down to 32 bits, because some architectures
1102 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1103 * masks event though they reject 46 bit masks.
1104 */
1105 while (dma_mask > 0x7fffffffUL) {
1106 if (pci_dma_supported(pci_dev, dma_mask)) {
1107 rc = pci_set_dma_mask(pci_dev, dma_mask);
1108 if (rc == 0)
1109 break;
1110 }
1111 dma_mask >>= 1;
1112 }
1113 if (rc) {
1114 netif_err(efx, probe, efx->net_dev,
1115 "could not find a suitable DMA mask\n");
1116 goto fail2;
1117 }
1118 netif_dbg(efx, probe, efx->net_dev,
1119 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1120 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1121 if (rc) {
1122 /* pci_set_consistent_dma_mask() is not *allowed* to
1123 * fail with a mask that pci_set_dma_mask() accepted,
1124 * but just in case...
1125 */
1126 netif_err(efx, probe, efx->net_dev,
1127 "failed to set consistent DMA mask\n");
1128 goto fail2;
1129 }
1130
1131 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1132 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1133 if (rc) {
1134 netif_err(efx, probe, efx->net_dev,
1135 "request for memory BAR failed\n");
1136 rc = -EIO;
1137 goto fail3;
1138 }
1139 efx->membase = ioremap_nocache(efx->membase_phys,
1140 efx->type->mem_map_size);
1141 if (!efx->membase) {
1142 netif_err(efx, probe, efx->net_dev,
1143 "could not map memory BAR at %llx+%x\n",
1144 (unsigned long long)efx->membase_phys,
1145 efx->type->mem_map_size);
1146 rc = -ENOMEM;
1147 goto fail4;
1148 }
1149 netif_dbg(efx, probe, efx->net_dev,
1150 "memory BAR at %llx+%x (virtual %p)\n",
1151 (unsigned long long)efx->membase_phys,
1152 efx->type->mem_map_size, efx->membase);
1153
1154 return 0;
1155
1156 fail4:
1157 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1158 fail3:
1159 efx->membase_phys = 0;
1160 fail2:
1161 pci_disable_device(efx->pci_dev);
1162 fail1:
1163 return rc;
1164}
1165
1166static void efx_fini_io(struct efx_nic *efx)
1167{
1168 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1169
1170 if (efx->membase) {
1171 iounmap(efx->membase);
1172 efx->membase = NULL;
1173 }
1174
1175 if (efx->membase_phys) {
1176 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1177 efx->membase_phys = 0;
1178 }
1179
1180 pci_disable_device(efx->pci_dev);
1181}
1182
1183static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1184{
1185 cpumask_var_t thread_mask;
1186 unsigned int count;
1187 int cpu;
1188
1189 if (rss_cpus) {
1190 count = rss_cpus;
1191 } else {
1192 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1193 netif_warn(efx, probe, efx->net_dev,
1194 "RSS disabled due to allocation failure\n");
1195 return 1;
1196 }
1197
1198 count = 0;
1199 for_each_online_cpu(cpu) {
1200 if (!cpumask_test_cpu(cpu, thread_mask)) {
1201 ++count;
1202 cpumask_or(thread_mask, thread_mask,
1203 topology_thread_cpumask(cpu));
1204 }
1205 }
1206
1207 free_cpumask_var(thread_mask);
1208 }
1209
1210 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1211 * table entries that are inaccessible to VFs
1212 */
1213 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1214 count > efx_vf_size(efx)) {
1215 netif_warn(efx, probe, efx->net_dev,
1216 "Reducing number of RSS channels from %u to %u for "
1217 "VF support. Increase vf-msix-limit to use more "
1218 "channels on the PF.\n",
1219 count, efx_vf_size(efx));
1220 count = efx_vf_size(efx);
1221 }
1222
1223 return count;
1224}
1225
1226static int
1227efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1228{
1229#ifdef CONFIG_RFS_ACCEL
1230 unsigned int i;
1231 int rc;
1232
1233 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1234 if (!efx->net_dev->rx_cpu_rmap)
1235 return -ENOMEM;
1236 for (i = 0; i < efx->n_rx_channels; i++) {
1237 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1238 xentries[i].vector);
1239 if (rc) {
1240 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1241 efx->net_dev->rx_cpu_rmap = NULL;
1242 return rc;
1243 }
1244 }
1245#endif
1246 return 0;
1247}
1248
1249/* Probe the number and type of interrupts we are able to obtain, and
1250 * the resulting numbers of channels and RX queues.
1251 */
1252static int efx_probe_interrupts(struct efx_nic *efx)
1253{
1254 unsigned int max_channels =
1255 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1256 unsigned int extra_channels = 0;
1257 unsigned int i, j;
1258 int rc;
1259
1260 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1261 if (efx->extra_channel_type[i])
1262 ++extra_channels;
1263
1264 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1265 struct msix_entry xentries[EFX_MAX_CHANNELS];
1266 unsigned int n_channels;
1267
1268 n_channels = efx_wanted_parallelism(efx);
1269 if (separate_tx_channels)
1270 n_channels *= 2;
1271 n_channels += extra_channels;
1272 n_channels = min(n_channels, max_channels);
1273
1274 for (i = 0; i < n_channels; i++)
1275 xentries[i].entry = i;
1276 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1277 if (rc > 0) {
1278 netif_err(efx, drv, efx->net_dev,
1279 "WARNING: Insufficient MSI-X vectors"
1280 " available (%d < %u).\n", rc, n_channels);
1281 netif_err(efx, drv, efx->net_dev,
1282 "WARNING: Performance may be reduced.\n");
1283 EFX_BUG_ON_PARANOID(rc >= n_channels);
1284 n_channels = rc;
1285 rc = pci_enable_msix(efx->pci_dev, xentries,
1286 n_channels);
1287 }
1288
1289 if (rc == 0) {
1290 efx->n_channels = n_channels;
1291 if (n_channels > extra_channels)
1292 n_channels -= extra_channels;
1293 if (separate_tx_channels) {
1294 efx->n_tx_channels = max(n_channels / 2, 1U);
1295 efx->n_rx_channels = max(n_channels -
1296 efx->n_tx_channels,
1297 1U);
1298 } else {
1299 efx->n_tx_channels = n_channels;
1300 efx->n_rx_channels = n_channels;
1301 }
1302 rc = efx_init_rx_cpu_rmap(efx, xentries);
1303 if (rc) {
1304 pci_disable_msix(efx->pci_dev);
1305 return rc;
1306 }
1307 for (i = 0; i < efx->n_channels; i++)
1308 efx_get_channel(efx, i)->irq =
1309 xentries[i].vector;
1310 } else {
1311 /* Fall back to single channel MSI */
1312 efx->interrupt_mode = EFX_INT_MODE_MSI;
1313 netif_err(efx, drv, efx->net_dev,
1314 "could not enable MSI-X\n");
1315 }
1316 }
1317
1318 /* Try single interrupt MSI */
1319 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1320 efx->n_channels = 1;
1321 efx->n_rx_channels = 1;
1322 efx->n_tx_channels = 1;
1323 rc = pci_enable_msi(efx->pci_dev);
1324 if (rc == 0) {
1325 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1326 } else {
1327 netif_err(efx, drv, efx->net_dev,
1328 "could not enable MSI\n");
1329 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1330 }
1331 }
1332
1333 /* Assume legacy interrupts */
1334 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1335 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1336 efx->n_rx_channels = 1;
1337 efx->n_tx_channels = 1;
1338 efx->legacy_irq = efx->pci_dev->irq;
1339 }
1340
1341 /* Assign extra channels if possible */
1342 j = efx->n_channels;
1343 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1344 if (!efx->extra_channel_type[i])
1345 continue;
1346 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1347 efx->n_channels <= extra_channels) {
1348 efx->extra_channel_type[i]->handle_no_channel(efx);
1349 } else {
1350 --j;
1351 efx_get_channel(efx, j)->type =
1352 efx->extra_channel_type[i];
1353 }
1354 }
1355
1356 /* RSS might be usable on VFs even if it is disabled on the PF */
1357 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1358 efx->n_rx_channels : efx_vf_size(efx));
1359
1360 return 0;
1361}
1362
1363/* Enable interrupts, then probe and start the event queues */
1364static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1365{
1366 struct efx_channel *channel;
1367
1368 if (efx->legacy_irq)
1369 efx->legacy_irq_enabled = true;
1370 efx_nic_enable_interrupts(efx);
1371
1372 efx_for_each_channel(channel, efx) {
1373 if (!channel->type->keep_eventq || !may_keep_eventq)
1374 efx_init_eventq(channel);
1375 efx_start_eventq(channel);
1376 }
1377
1378 efx_mcdi_mode_event(efx);
1379}
1380
1381static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1382{
1383 struct efx_channel *channel;
1384
1385 efx_mcdi_mode_poll(efx);
1386
1387 efx_nic_disable_interrupts(efx);
1388 if (efx->legacy_irq) {
1389 synchronize_irq(efx->legacy_irq);
1390 efx->legacy_irq_enabled = false;
1391 }
1392
1393 efx_for_each_channel(channel, efx) {
1394 if (channel->irq)
1395 synchronize_irq(channel->irq);
1396
1397 efx_stop_eventq(channel);
1398 if (!channel->type->keep_eventq || !may_keep_eventq)
1399 efx_fini_eventq(channel);
1400 }
1401}
1402
1403static void efx_remove_interrupts(struct efx_nic *efx)
1404{
1405 struct efx_channel *channel;
1406
1407 /* Remove MSI/MSI-X interrupts */
1408 efx_for_each_channel(channel, efx)
1409 channel->irq = 0;
1410 pci_disable_msi(efx->pci_dev);
1411 pci_disable_msix(efx->pci_dev);
1412
1413 /* Remove legacy interrupt */
1414 efx->legacy_irq = 0;
1415}
1416
1417static void efx_set_channels(struct efx_nic *efx)
1418{
1419 struct efx_channel *channel;
1420 struct efx_tx_queue *tx_queue;
1421
1422 efx->tx_channel_offset =
1423 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1424
1425 /* We need to adjust the TX queue numbers if we have separate
1426 * RX-only and TX-only channels.
1427 */
1428 efx_for_each_channel(channel, efx) {
1429 efx_for_each_channel_tx_queue(tx_queue, channel)
1430 tx_queue->queue -= (efx->tx_channel_offset *
1431 EFX_TXQ_TYPES);
1432 }
1433}
1434
1435static int efx_probe_nic(struct efx_nic *efx)
1436{
1437 size_t i;
1438 int rc;
1439
1440 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1441
1442 /* Carry out hardware-type specific initialisation */
1443 rc = efx->type->probe(efx);
1444 if (rc)
1445 return rc;
1446
1447 /* Determine the number of channels and queues by trying to hook
1448 * in MSI-X interrupts. */
1449 rc = efx_probe_interrupts(efx);
1450 if (rc)
1451 goto fail;
1452
1453 efx->type->dimension_resources(efx);
1454
1455 if (efx->n_channels > 1)
1456 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1457 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1458 efx->rx_indir_table[i] =
1459 ethtool_rxfh_indir_default(i, efx->rss_spread);
1460
1461 efx_set_channels(efx);
1462 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1463 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1464
1465 /* Initialise the interrupt moderation settings */
1466 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1467 true);
1468
1469 return 0;
1470
1471fail:
1472 efx->type->remove(efx);
1473 return rc;
1474}
1475
1476static void efx_remove_nic(struct efx_nic *efx)
1477{
1478 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1479
1480 efx_remove_interrupts(efx);
1481 efx->type->remove(efx);
1482}
1483
1484/**************************************************************************
1485 *
1486 * NIC startup/shutdown
1487 *
1488 *************************************************************************/
1489
1490static int efx_probe_all(struct efx_nic *efx)
1491{
1492 int rc;
1493
1494 rc = efx_probe_nic(efx);
1495 if (rc) {
1496 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1497 goto fail1;
1498 }
1499
1500 rc = efx_probe_port(efx);
1501 if (rc) {
1502 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1503 goto fail2;
1504 }
1505
1506 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1507 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1508 rc = -EINVAL;
1509 goto fail3;
1510 }
1511 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1512
1513 rc = efx_probe_filters(efx);
1514 if (rc) {
1515 netif_err(efx, probe, efx->net_dev,
1516 "failed to create filter tables\n");
1517 goto fail3;
1518 }
1519
1520 rc = efx_probe_channels(efx);
1521 if (rc)
1522 goto fail4;
1523
1524 return 0;
1525
1526 fail4:
1527 efx_remove_filters(efx);
1528 fail3:
1529 efx_remove_port(efx);
1530 fail2:
1531 efx_remove_nic(efx);
1532 fail1:
1533 return rc;
1534}
1535
1536/* Called after previous invocation(s) of efx_stop_all, restarts the port,
1537 * kernel transmit queues and NAPI processing, and ensures that the port is
1538 * scheduled to be reconfigured. This function is safe to call multiple
1539 * times when the NIC is in any state.
1540 */
1541static void efx_start_all(struct efx_nic *efx)
1542{
1543 EFX_ASSERT_RESET_SERIALISED(efx);
1544
1545 /* Check that it is appropriate to restart the interface. All
1546 * of these flags are safe to read under just the rtnl lock */
1547 if (efx->port_enabled)
1548 return;
1549 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1550 return;
1551 if (!netif_running(efx->net_dev))
1552 return;
1553
1554 efx_start_port(efx);
1555 efx_start_datapath(efx);
1556
1557 /* Start the hardware monitor if there is one. Otherwise (we're link
1558 * event driven), we have to poll the PHY because after an event queue
1559 * flush, we could have a missed a link state change */
1560 if (efx->type->monitor != NULL) {
1561 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1562 efx_monitor_interval);
1563 } else {
1564 mutex_lock(&efx->mac_lock);
1565 if (efx->phy_op->poll(efx))
1566 efx_link_status_changed(efx);
1567 mutex_unlock(&efx->mac_lock);
1568 }
1569
1570 efx->type->start_stats(efx);
1571}
1572
1573/* Flush all delayed work. Should only be called when no more delayed work
1574 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1575 * since we're holding the rtnl_lock at this point. */
1576static void efx_flush_all(struct efx_nic *efx)
1577{
1578 /* Make sure the hardware monitor and event self-test are stopped */
1579 cancel_delayed_work_sync(&efx->monitor_work);
1580 efx_selftest_async_cancel(efx);
1581 /* Stop scheduled port reconfigurations */
1582 cancel_work_sync(&efx->mac_work);
1583}
1584
1585/* Quiesce hardware and software without bringing the link down.
1586 * Safe to call multiple times, when the nic and interface is in any
1587 * state. The caller is guaranteed to subsequently be in a position
1588 * to modify any hardware and software state they see fit without
1589 * taking locks. */
1590static void efx_stop_all(struct efx_nic *efx)
1591{
1592 EFX_ASSERT_RESET_SERIALISED(efx);
1593
1594 /* port_enabled can be read safely under the rtnl lock */
1595 if (!efx->port_enabled)
1596 return;
1597
1598 efx->type->stop_stats(efx);
1599 efx_stop_port(efx);
1600
1601 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1602 efx_flush_all(efx);
1603
1604 /* Stop the kernel transmit interface late, so the watchdog
1605 * timer isn't ticking over the flush */
1606 netif_tx_disable(efx->net_dev);
1607
1608 efx_stop_datapath(efx);
1609}
1610
1611static void efx_remove_all(struct efx_nic *efx)
1612{
1613 efx_remove_channels(efx);
1614 efx_remove_filters(efx);
1615 efx_remove_port(efx);
1616 efx_remove_nic(efx);
1617}
1618
1619/**************************************************************************
1620 *
1621 * Interrupt moderation
1622 *
1623 **************************************************************************/
1624
1625static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1626{
1627 if (usecs == 0)
1628 return 0;
1629 if (usecs * 1000 < quantum_ns)
1630 return 1; /* never round down to 0 */
1631 return usecs * 1000 / quantum_ns;
1632}
1633
1634/* Set interrupt moderation parameters */
1635int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1636 unsigned int rx_usecs, bool rx_adaptive,
1637 bool rx_may_override_tx)
1638{
1639 struct efx_channel *channel;
1640 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1641 efx->timer_quantum_ns,
1642 1000);
1643 unsigned int tx_ticks;
1644 unsigned int rx_ticks;
1645
1646 EFX_ASSERT_RESET_SERIALISED(efx);
1647
1648 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1649 return -EINVAL;
1650
1651 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1652 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1653
1654 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1655 !rx_may_override_tx) {
1656 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1657 "RX and TX IRQ moderation must be equal\n");
1658 return -EINVAL;
1659 }
1660
1661 efx->irq_rx_adaptive = rx_adaptive;
1662 efx->irq_rx_moderation = rx_ticks;
1663 efx_for_each_channel(channel, efx) {
1664 if (efx_channel_has_rx_queue(channel))
1665 channel->irq_moderation = rx_ticks;
1666 else if (efx_channel_has_tx_queues(channel))
1667 channel->irq_moderation = tx_ticks;
1668 }
1669
1670 return 0;
1671}
1672
1673void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1674 unsigned int *rx_usecs, bool *rx_adaptive)
1675{
1676 /* We must round up when converting ticks to microseconds
1677 * because we round down when converting the other way.
1678 */
1679
1680 *rx_adaptive = efx->irq_rx_adaptive;
1681 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1682 efx->timer_quantum_ns,
1683 1000);
1684
1685 /* If channels are shared between RX and TX, so is IRQ
1686 * moderation. Otherwise, IRQ moderation is the same for all
1687 * TX channels and is not adaptive.
1688 */
1689 if (efx->tx_channel_offset == 0)
1690 *tx_usecs = *rx_usecs;
1691 else
1692 *tx_usecs = DIV_ROUND_UP(
1693 efx->channel[efx->tx_channel_offset]->irq_moderation *
1694 efx->timer_quantum_ns,
1695 1000);
1696}
1697
1698/**************************************************************************
1699 *
1700 * Hardware monitor
1701 *
1702 **************************************************************************/
1703
1704/* Run periodically off the general workqueue */
1705static void efx_monitor(struct work_struct *data)
1706{
1707 struct efx_nic *efx = container_of(data, struct efx_nic,
1708 monitor_work.work);
1709
1710 netif_vdbg(efx, timer, efx->net_dev,
1711 "hardware monitor executing on CPU %d\n",
1712 raw_smp_processor_id());
1713 BUG_ON(efx->type->monitor == NULL);
1714
1715 /* If the mac_lock is already held then it is likely a port
1716 * reconfiguration is already in place, which will likely do
1717 * most of the work of monitor() anyway. */
1718 if (mutex_trylock(&efx->mac_lock)) {
1719 if (efx->port_enabled)
1720 efx->type->monitor(efx);
1721 mutex_unlock(&efx->mac_lock);
1722 }
1723
1724 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1725 efx_monitor_interval);
1726}
1727
1728/**************************************************************************
1729 *
1730 * ioctls
1731 *
1732 *************************************************************************/
1733
1734/* Net device ioctl
1735 * Context: process, rtnl_lock() held.
1736 */
1737static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1738{
1739 struct efx_nic *efx = netdev_priv(net_dev);
1740 struct mii_ioctl_data *data = if_mii(ifr);
1741
1742 EFX_ASSERT_RESET_SERIALISED(efx);
1743
1744 /* Convert phy_id from older PRTAD/DEVAD format */
1745 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1746 (data->phy_id & 0xfc00) == 0x0400)
1747 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1748
1749 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1750}
1751
1752/**************************************************************************
1753 *
1754 * NAPI interface
1755 *
1756 **************************************************************************/
1757
1758static void efx_init_napi_channel(struct efx_channel *channel)
1759{
1760 struct efx_nic *efx = channel->efx;
1761
1762 channel->napi_dev = efx->net_dev;
1763 netif_napi_add(channel->napi_dev, &channel->napi_str,
1764 efx_poll, napi_weight);
1765}
1766
1767static void efx_init_napi(struct efx_nic *efx)
1768{
1769 struct efx_channel *channel;
1770
1771 efx_for_each_channel(channel, efx)
1772 efx_init_napi_channel(channel);
1773}
1774
1775static void efx_fini_napi_channel(struct efx_channel *channel)
1776{
1777 if (channel->napi_dev)
1778 netif_napi_del(&channel->napi_str);
1779 channel->napi_dev = NULL;
1780}
1781
1782static void efx_fini_napi(struct efx_nic *efx)
1783{
1784 struct efx_channel *channel;
1785
1786 efx_for_each_channel(channel, efx)
1787 efx_fini_napi_channel(channel);
1788}
1789
1790/**************************************************************************
1791 *
1792 * Kernel netpoll interface
1793 *
1794 *************************************************************************/
1795
1796#ifdef CONFIG_NET_POLL_CONTROLLER
1797
1798/* Although in the common case interrupts will be disabled, this is not
1799 * guaranteed. However, all our work happens inside the NAPI callback,
1800 * so no locking is required.
1801 */
1802static void efx_netpoll(struct net_device *net_dev)
1803{
1804 struct efx_nic *efx = netdev_priv(net_dev);
1805 struct efx_channel *channel;
1806
1807 efx_for_each_channel(channel, efx)
1808 efx_schedule_channel(channel);
1809}
1810
1811#endif
1812
1813/**************************************************************************
1814 *
1815 * Kernel net device interface
1816 *
1817 *************************************************************************/
1818
1819/* Context: process, rtnl_lock() held. */
1820static int efx_net_open(struct net_device *net_dev)
1821{
1822 struct efx_nic *efx = netdev_priv(net_dev);
1823 EFX_ASSERT_RESET_SERIALISED(efx);
1824
1825 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1826 raw_smp_processor_id());
1827
1828 if (efx->state == STATE_DISABLED)
1829 return -EIO;
1830 if (efx->phy_mode & PHY_MODE_SPECIAL)
1831 return -EBUSY;
1832 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1833 return -EIO;
1834
1835 /* Notify the kernel of the link state polled during driver load,
1836 * before the monitor starts running */
1837 efx_link_status_changed(efx);
1838
1839 efx_start_all(efx);
1840 efx_selftest_async_start(efx);
1841 return 0;
1842}
1843
1844/* Context: process, rtnl_lock() held.
1845 * Note that the kernel will ignore our return code; this method
1846 * should really be a void.
1847 */
1848static int efx_net_stop(struct net_device *net_dev)
1849{
1850 struct efx_nic *efx = netdev_priv(net_dev);
1851
1852 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1853 raw_smp_processor_id());
1854
1855 if (efx->state != STATE_DISABLED) {
1856 /* Stop the device and flush all the channels */
1857 efx_stop_all(efx);
1858 }
1859
1860 return 0;
1861}
1862
1863/* Context: process, dev_base_lock or RTNL held, non-blocking. */
1864static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1865 struct rtnl_link_stats64 *stats)
1866{
1867 struct efx_nic *efx = netdev_priv(net_dev);
1868 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1869
1870 spin_lock_bh(&efx->stats_lock);
1871
1872 efx->type->update_stats(efx);
1873
1874 stats->rx_packets = mac_stats->rx_packets;
1875 stats->tx_packets = mac_stats->tx_packets;
1876 stats->rx_bytes = mac_stats->rx_bytes;
1877 stats->tx_bytes = mac_stats->tx_bytes;
1878 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1879 stats->multicast = mac_stats->rx_multicast;
1880 stats->collisions = mac_stats->tx_collision;
1881 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1882 mac_stats->rx_length_error);
1883 stats->rx_crc_errors = mac_stats->rx_bad;
1884 stats->rx_frame_errors = mac_stats->rx_align_error;
1885 stats->rx_fifo_errors = mac_stats->rx_overflow;
1886 stats->rx_missed_errors = mac_stats->rx_missed;
1887 stats->tx_window_errors = mac_stats->tx_late_collision;
1888
1889 stats->rx_errors = (stats->rx_length_errors +
1890 stats->rx_crc_errors +
1891 stats->rx_frame_errors +
1892 mac_stats->rx_symbol_error);
1893 stats->tx_errors = (stats->tx_window_errors +
1894 mac_stats->tx_bad);
1895
1896 spin_unlock_bh(&efx->stats_lock);
1897
1898 return stats;
1899}
1900
1901/* Context: netif_tx_lock held, BHs disabled. */
1902static void efx_watchdog(struct net_device *net_dev)
1903{
1904 struct efx_nic *efx = netdev_priv(net_dev);
1905
1906 netif_err(efx, tx_err, efx->net_dev,
1907 "TX stuck with port_enabled=%d: resetting channels\n",
1908 efx->port_enabled);
1909
1910 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1911}
1912
1913
1914/* Context: process, rtnl_lock() held. */
1915static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1916{
1917 struct efx_nic *efx = netdev_priv(net_dev);
1918
1919 EFX_ASSERT_RESET_SERIALISED(efx);
1920
1921 if (new_mtu > EFX_MAX_MTU)
1922 return -EINVAL;
1923
1924 efx_stop_all(efx);
1925
1926 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1927
1928 mutex_lock(&efx->mac_lock);
1929 /* Reconfigure the MAC before enabling the dma queues so that
1930 * the RX buffers don't overflow */
1931 net_dev->mtu = new_mtu;
1932 efx->type->reconfigure_mac(efx);
1933 mutex_unlock(&efx->mac_lock);
1934
1935 efx_start_all(efx);
1936 return 0;
1937}
1938
1939static int efx_set_mac_address(struct net_device *net_dev, void *data)
1940{
1941 struct efx_nic *efx = netdev_priv(net_dev);
1942 struct sockaddr *addr = data;
1943 char *new_addr = addr->sa_data;
1944
1945 EFX_ASSERT_RESET_SERIALISED(efx);
1946
1947 if (!is_valid_ether_addr(new_addr)) {
1948 netif_err(efx, drv, efx->net_dev,
1949 "invalid ethernet MAC address requested: %pM\n",
1950 new_addr);
1951 return -EADDRNOTAVAIL;
1952 }
1953
1954 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1955 efx_sriov_mac_address_changed(efx);
1956
1957 /* Reconfigure the MAC */
1958 mutex_lock(&efx->mac_lock);
1959 efx->type->reconfigure_mac(efx);
1960 mutex_unlock(&efx->mac_lock);
1961
1962 return 0;
1963}
1964
1965/* Context: netif_addr_lock held, BHs disabled. */
1966static void efx_set_rx_mode(struct net_device *net_dev)
1967{
1968 struct efx_nic *efx = netdev_priv(net_dev);
1969 struct netdev_hw_addr *ha;
1970 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1971 u32 crc;
1972 int bit;
1973
1974 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1975
1976 /* Build multicast hash table */
1977 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1978 memset(mc_hash, 0xff, sizeof(*mc_hash));
1979 } else {
1980 memset(mc_hash, 0x00, sizeof(*mc_hash));
1981 netdev_for_each_mc_addr(ha, net_dev) {
1982 crc = ether_crc_le(ETH_ALEN, ha->addr);
1983 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1984 set_bit_le(bit, mc_hash->byte);
1985 }
1986
1987 /* Broadcast packets go through the multicast hash filter.
1988 * ether_crc_le() of the broadcast address is 0xbe2612ff
1989 * so we always add bit 0xff to the mask.
1990 */
1991 set_bit_le(0xff, mc_hash->byte);
1992 }
1993
1994 if (efx->port_enabled)
1995 queue_work(efx->workqueue, &efx->mac_work);
1996 /* Otherwise efx_start_port() will do this */
1997}
1998
1999static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2000{
2001 struct efx_nic *efx = netdev_priv(net_dev);
2002
2003 /* If disabling RX n-tuple filtering, clear existing filters */
2004 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2005 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2006
2007 return 0;
2008}
2009
2010static const struct net_device_ops efx_netdev_ops = {
2011 .ndo_open = efx_net_open,
2012 .ndo_stop = efx_net_stop,
2013 .ndo_get_stats64 = efx_net_stats,
2014 .ndo_tx_timeout = efx_watchdog,
2015 .ndo_start_xmit = efx_hard_start_xmit,
2016 .ndo_validate_addr = eth_validate_addr,
2017 .ndo_do_ioctl = efx_ioctl,
2018 .ndo_change_mtu = efx_change_mtu,
2019 .ndo_set_mac_address = efx_set_mac_address,
2020 .ndo_set_rx_mode = efx_set_rx_mode,
2021 .ndo_set_features = efx_set_features,
2022#ifdef CONFIG_SFC_SRIOV
2023 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2024 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2025 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2026 .ndo_get_vf_config = efx_sriov_get_vf_config,
2027#endif
2028#ifdef CONFIG_NET_POLL_CONTROLLER
2029 .ndo_poll_controller = efx_netpoll,
2030#endif
2031 .ndo_setup_tc = efx_setup_tc,
2032#ifdef CONFIG_RFS_ACCEL
2033 .ndo_rx_flow_steer = efx_filter_rfs,
2034#endif
2035};
2036
2037static void efx_update_name(struct efx_nic *efx)
2038{
2039 strcpy(efx->name, efx->net_dev->name);
2040 efx_mtd_rename(efx);
2041 efx_set_channel_names(efx);
2042}
2043
2044static int efx_netdev_event(struct notifier_block *this,
2045 unsigned long event, void *ptr)
2046{
2047 struct net_device *net_dev = ptr;
2048
2049 if (net_dev->netdev_ops == &efx_netdev_ops &&
2050 event == NETDEV_CHANGENAME)
2051 efx_update_name(netdev_priv(net_dev));
2052
2053 return NOTIFY_DONE;
2054}
2055
2056static struct notifier_block efx_netdev_notifier = {
2057 .notifier_call = efx_netdev_event,
2058};
2059
2060static ssize_t
2061show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2062{
2063 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2064 return sprintf(buf, "%d\n", efx->phy_type);
2065}
2066static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
2067
2068static int efx_register_netdev(struct efx_nic *efx)
2069{
2070 struct net_device *net_dev = efx->net_dev;
2071 struct efx_channel *channel;
2072 int rc;
2073
2074 net_dev->watchdog_timeo = 5 * HZ;
2075 net_dev->irq = efx->pci_dev->irq;
2076 net_dev->netdev_ops = &efx_netdev_ops;
2077 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2078 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2079
2080 rtnl_lock();
2081
2082 rc = dev_alloc_name(net_dev, net_dev->name);
2083 if (rc < 0)
2084 goto fail_locked;
2085 efx_update_name(efx);
2086
2087 rc = register_netdevice(net_dev);
2088 if (rc)
2089 goto fail_locked;
2090
2091 efx_for_each_channel(channel, efx) {
2092 struct efx_tx_queue *tx_queue;
2093 efx_for_each_channel_tx_queue(tx_queue, channel)
2094 efx_init_tx_queue_core_txq(tx_queue);
2095 }
2096
2097 /* Always start with carrier off; PHY events will detect the link */
2098 netif_carrier_off(net_dev);
2099
2100 rtnl_unlock();
2101
2102 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2103 if (rc) {
2104 netif_err(efx, drv, efx->net_dev,
2105 "failed to init net dev attributes\n");
2106 goto fail_registered;
2107 }
2108
2109 return 0;
2110
2111fail_locked:
2112 rtnl_unlock();
2113 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2114 return rc;
2115
2116fail_registered:
2117 unregister_netdev(net_dev);
2118 return rc;
2119}
2120
2121static void efx_unregister_netdev(struct efx_nic *efx)
2122{
2123 struct efx_channel *channel;
2124 struct efx_tx_queue *tx_queue;
2125
2126 if (!efx->net_dev)
2127 return;
2128
2129 BUG_ON(netdev_priv(efx->net_dev) != efx);
2130
2131 /* Free up any skbs still remaining. This has to happen before
2132 * we try to unregister the netdev as running their destructors
2133 * may be needed to get the device ref. count to 0. */
2134 efx_for_each_channel(channel, efx) {
2135 efx_for_each_channel_tx_queue(tx_queue, channel)
2136 efx_release_tx_buffers(tx_queue);
2137 }
2138
2139 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2140 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2141 unregister_netdev(efx->net_dev);
2142}
2143
2144/**************************************************************************
2145 *
2146 * Device reset and suspend
2147 *
2148 **************************************************************************/
2149
2150/* Tears down the entire software state and most of the hardware state
2151 * before reset. */
2152void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2153{
2154 EFX_ASSERT_RESET_SERIALISED(efx);
2155
2156 efx_stop_all(efx);
2157 mutex_lock(&efx->mac_lock);
2158
2159 efx_stop_interrupts(efx, false);
2160 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2161 efx->phy_op->fini(efx);
2162 efx->type->fini(efx);
2163}
2164
2165/* This function will always ensure that the locks acquired in
2166 * efx_reset_down() are released. A failure return code indicates
2167 * that we were unable to reinitialise the hardware, and the
2168 * driver should be disabled. If ok is false, then the rx and tx
2169 * engines are not restarted, pending a RESET_DISABLE. */
2170int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2171{
2172 int rc;
2173
2174 EFX_ASSERT_RESET_SERIALISED(efx);
2175
2176 rc = efx->type->init(efx);
2177 if (rc) {
2178 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2179 goto fail;
2180 }
2181
2182 if (!ok)
2183 goto fail;
2184
2185 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2186 rc = efx->phy_op->init(efx);
2187 if (rc)
2188 goto fail;
2189 if (efx->phy_op->reconfigure(efx))
2190 netif_err(efx, drv, efx->net_dev,
2191 "could not restore PHY settings\n");
2192 }
2193
2194 efx->type->reconfigure_mac(efx);
2195
2196 efx_start_interrupts(efx, false);
2197 efx_restore_filters(efx);
2198 efx_sriov_reset(efx);
2199
2200 mutex_unlock(&efx->mac_lock);
2201
2202 efx_start_all(efx);
2203
2204 return 0;
2205
2206fail:
2207 efx->port_initialized = false;
2208
2209 mutex_unlock(&efx->mac_lock);
2210
2211 return rc;
2212}
2213
2214/* Reset the NIC using the specified method. Note that the reset may
2215 * fail, in which case the card will be left in an unusable state.
2216 *
2217 * Caller must hold the rtnl_lock.
2218 */
2219int efx_reset(struct efx_nic *efx, enum reset_type method)
2220{
2221 int rc, rc2;
2222 bool disabled;
2223
2224 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2225 RESET_TYPE(method));
2226
2227 netif_device_detach(efx->net_dev);
2228 efx_reset_down(efx, method);
2229
2230 rc = efx->type->reset(efx, method);
2231 if (rc) {
2232 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2233 goto out;
2234 }
2235
2236 /* Clear flags for the scopes we covered. We assume the NIC and
2237 * driver are now quiescent so that there is no race here.
2238 */
2239 efx->reset_pending &= -(1 << (method + 1));
2240
2241 /* Reinitialise bus-mastering, which may have been turned off before
2242 * the reset was scheduled. This is still appropriate, even in the
2243 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2244 * can respond to requests. */
2245 pci_set_master(efx->pci_dev);
2246
2247out:
2248 /* Leave device stopped if necessary */
2249 disabled = rc || method == RESET_TYPE_DISABLE;
2250 rc2 = efx_reset_up(efx, method, !disabled);
2251 if (rc2) {
2252 disabled = true;
2253 if (!rc)
2254 rc = rc2;
2255 }
2256
2257 if (disabled) {
2258 dev_close(efx->net_dev);
2259 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2260 efx->state = STATE_DISABLED;
2261 } else {
2262 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2263 netif_device_attach(efx->net_dev);
2264 }
2265 return rc;
2266}
2267
2268/* The worker thread exists so that code that cannot sleep can
2269 * schedule a reset for later.
2270 */
2271static void efx_reset_work(struct work_struct *data)
2272{
2273 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2274 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2275
2276 if (!pending)
2277 return;
2278
2279 /* If we're not RUNNING then don't reset. Leave the reset_pending
2280 * flags set so that efx_pci_probe_main will be retried */
2281 if (efx->state != STATE_RUNNING) {
2282 netif_info(efx, drv, efx->net_dev,
2283 "scheduled reset quenched. NIC not RUNNING\n");
2284 return;
2285 }
2286
2287 rtnl_lock();
2288 (void)efx_reset(efx, fls(pending) - 1);
2289 rtnl_unlock();
2290}
2291
2292void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2293{
2294 enum reset_type method;
2295
2296 switch (type) {
2297 case RESET_TYPE_INVISIBLE:
2298 case RESET_TYPE_ALL:
2299 case RESET_TYPE_WORLD:
2300 case RESET_TYPE_DISABLE:
2301 method = type;
2302 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2303 RESET_TYPE(method));
2304 break;
2305 default:
2306 method = efx->type->map_reset_reason(type);
2307 netif_dbg(efx, drv, efx->net_dev,
2308 "scheduling %s reset for %s\n",
2309 RESET_TYPE(method), RESET_TYPE(type));
2310 break;
2311 }
2312
2313 set_bit(method, &efx->reset_pending);
2314
2315 /* efx_process_channel() will no longer read events once a
2316 * reset is scheduled. So switch back to poll'd MCDI completions. */
2317 efx_mcdi_mode_poll(efx);
2318
2319 queue_work(reset_workqueue, &efx->reset_work);
2320}
2321
2322/**************************************************************************
2323 *
2324 * List of NICs we support
2325 *
2326 **************************************************************************/
2327
2328/* PCI device ID table */
2329static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2330 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2331 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2332 .driver_data = (unsigned long) &falcon_a1_nic_type},
2333 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2334 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2335 .driver_data = (unsigned long) &falcon_b0_nic_type},
2336 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2337 .driver_data = (unsigned long) &siena_a0_nic_type},
2338 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2339 .driver_data = (unsigned long) &siena_a0_nic_type},
2340 {0} /* end of list */
2341};
2342
2343/**************************************************************************
2344 *
2345 * Dummy PHY/MAC operations
2346 *
2347 * Can be used for some unimplemented operations
2348 * Needed so all function pointers are valid and do not have to be tested
2349 * before use
2350 *
2351 **************************************************************************/
2352int efx_port_dummy_op_int(struct efx_nic *efx)
2353{
2354 return 0;
2355}
2356void efx_port_dummy_op_void(struct efx_nic *efx) {}
2357
2358static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2359{
2360 return false;
2361}
2362
2363static const struct efx_phy_operations efx_dummy_phy_operations = {
2364 .init = efx_port_dummy_op_int,
2365 .reconfigure = efx_port_dummy_op_int,
2366 .poll = efx_port_dummy_op_poll,
2367 .fini = efx_port_dummy_op_void,
2368};
2369
2370/**************************************************************************
2371 *
2372 * Data housekeeping
2373 *
2374 **************************************************************************/
2375
2376/* This zeroes out and then fills in the invariants in a struct
2377 * efx_nic (including all sub-structures).
2378 */
2379static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2380 struct pci_dev *pci_dev, struct net_device *net_dev)
2381{
2382 int i;
2383
2384 /* Initialise common structures */
2385 memset(efx, 0, sizeof(*efx));
2386 spin_lock_init(&efx->biu_lock);
2387#ifdef CONFIG_SFC_MTD
2388 INIT_LIST_HEAD(&efx->mtd_list);
2389#endif
2390 INIT_WORK(&efx->reset_work, efx_reset_work);
2391 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2392 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2393 efx->pci_dev = pci_dev;
2394 efx->msg_enable = debug;
2395 efx->state = STATE_INIT;
2396 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2397
2398 efx->net_dev = net_dev;
2399 spin_lock_init(&efx->stats_lock);
2400 mutex_init(&efx->mac_lock);
2401 efx->phy_op = &efx_dummy_phy_operations;
2402 efx->mdio.dev = net_dev;
2403 INIT_WORK(&efx->mac_work, efx_mac_work);
2404 init_waitqueue_head(&efx->flush_wq);
2405
2406 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2407 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2408 if (!efx->channel[i])
2409 goto fail;
2410 }
2411
2412 efx->type = type;
2413
2414 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2415
2416 /* Higher numbered interrupt modes are less capable! */
2417 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2418 interrupt_mode);
2419
2420 /* Would be good to use the net_dev name, but we're too early */
2421 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2422 pci_name(pci_dev));
2423 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2424 if (!efx->workqueue)
2425 goto fail;
2426
2427 return 0;
2428
2429fail:
2430 efx_fini_struct(efx);
2431 return -ENOMEM;
2432}
2433
2434static void efx_fini_struct(struct efx_nic *efx)
2435{
2436 int i;
2437
2438 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2439 kfree(efx->channel[i]);
2440
2441 if (efx->workqueue) {
2442 destroy_workqueue(efx->workqueue);
2443 efx->workqueue = NULL;
2444 }
2445}
2446
2447/**************************************************************************
2448 *
2449 * PCI interface
2450 *
2451 **************************************************************************/
2452
2453/* Main body of final NIC shutdown code
2454 * This is called only at module unload (or hotplug removal).
2455 */
2456static void efx_pci_remove_main(struct efx_nic *efx)
2457{
2458#ifdef CONFIG_RFS_ACCEL
2459 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2460 efx->net_dev->rx_cpu_rmap = NULL;
2461#endif
2462 efx_stop_interrupts(efx, false);
2463 efx_nic_fini_interrupt(efx);
2464 efx_fini_port(efx);
2465 efx->type->fini(efx);
2466 efx_fini_napi(efx);
2467 efx_remove_all(efx);
2468}
2469
2470/* Final NIC shutdown
2471 * This is called only at module unload (or hotplug removal).
2472 */
2473static void efx_pci_remove(struct pci_dev *pci_dev)
2474{
2475 struct efx_nic *efx;
2476
2477 efx = pci_get_drvdata(pci_dev);
2478 if (!efx)
2479 return;
2480
2481 /* Mark the NIC as fini, then stop the interface */
2482 rtnl_lock();
2483 efx->state = STATE_FINI;
2484 dev_close(efx->net_dev);
2485
2486 /* Allow any queued efx_resets() to complete */
2487 rtnl_unlock();
2488
2489 efx_stop_interrupts(efx, false);
2490 efx_sriov_fini(efx);
2491 efx_unregister_netdev(efx);
2492
2493 efx_mtd_remove(efx);
2494
2495 /* Wait for any scheduled resets to complete. No more will be
2496 * scheduled from this point because efx_stop_all() has been
2497 * called, we are no longer registered with driverlink, and
2498 * the net_device's have been removed. */
2499 cancel_work_sync(&efx->reset_work);
2500
2501 efx_pci_remove_main(efx);
2502
2503 efx_fini_io(efx);
2504 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2505
2506 efx_fini_struct(efx);
2507 pci_set_drvdata(pci_dev, NULL);
2508 free_netdev(efx->net_dev);
2509};
2510
2511/* NIC VPD information
2512 * Called during probe to display the part number of the
2513 * installed NIC. VPD is potentially very large but this should
2514 * always appear within the first 512 bytes.
2515 */
2516#define SFC_VPD_LEN 512
2517static void efx_print_product_vpd(struct efx_nic *efx)
2518{
2519 struct pci_dev *dev = efx->pci_dev;
2520 char vpd_data[SFC_VPD_LEN];
2521 ssize_t vpd_size;
2522 int i, j;
2523
2524 /* Get the vpd data from the device */
2525 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2526 if (vpd_size <= 0) {
2527 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2528 return;
2529 }
2530
2531 /* Get the Read only section */
2532 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2533 if (i < 0) {
2534 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2535 return;
2536 }
2537
2538 j = pci_vpd_lrdt_size(&vpd_data[i]);
2539 i += PCI_VPD_LRDT_TAG_SIZE;
2540 if (i + j > vpd_size)
2541 j = vpd_size - i;
2542
2543 /* Get the Part number */
2544 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2545 if (i < 0) {
2546 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2547 return;
2548 }
2549
2550 j = pci_vpd_info_field_size(&vpd_data[i]);
2551 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2552 if (i + j > vpd_size) {
2553 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2554 return;
2555 }
2556
2557 netif_info(efx, drv, efx->net_dev,
2558 "Part Number : %.*s\n", j, &vpd_data[i]);
2559}
2560
2561
2562/* Main body of NIC initialisation
2563 * This is called at module load (or hotplug insertion, theoretically).
2564 */
2565static int efx_pci_probe_main(struct efx_nic *efx)
2566{
2567 int rc;
2568
2569 /* Do start-of-day initialisation */
2570 rc = efx_probe_all(efx);
2571 if (rc)
2572 goto fail1;
2573
2574 efx_init_napi(efx);
2575
2576 rc = efx->type->init(efx);
2577 if (rc) {
2578 netif_err(efx, probe, efx->net_dev,
2579 "failed to initialise NIC\n");
2580 goto fail3;
2581 }
2582
2583 rc = efx_init_port(efx);
2584 if (rc) {
2585 netif_err(efx, probe, efx->net_dev,
2586 "failed to initialise port\n");
2587 goto fail4;
2588 }
2589
2590 rc = efx_nic_init_interrupt(efx);
2591 if (rc)
2592 goto fail5;
2593 efx_start_interrupts(efx, false);
2594
2595 return 0;
2596
2597 fail5:
2598 efx_fini_port(efx);
2599 fail4:
2600 efx->type->fini(efx);
2601 fail3:
2602 efx_fini_napi(efx);
2603 efx_remove_all(efx);
2604 fail1:
2605 return rc;
2606}
2607
2608/* NIC initialisation
2609 *
2610 * This is called at module load (or hotplug insertion,
2611 * theoretically). It sets up PCI mappings, resets the NIC,
2612 * sets up and registers the network devices with the kernel and hooks
2613 * the interrupt service routine. It does not prepare the device for
2614 * transmission; this is left to the first time one of the network
2615 * interfaces is brought up (i.e. efx_net_open).
2616 */
2617static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2618 const struct pci_device_id *entry)
2619{
2620 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2621 struct net_device *net_dev;
2622 struct efx_nic *efx;
2623 int rc;
2624
2625 /* Allocate and initialise a struct net_device and struct efx_nic */
2626 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2627 EFX_MAX_RX_QUEUES);
2628 if (!net_dev)
2629 return -ENOMEM;
2630 net_dev->features |= (type->offload_features | NETIF_F_SG |
2631 NETIF_F_HIGHDMA | NETIF_F_TSO |
2632 NETIF_F_RXCSUM);
2633 if (type->offload_features & NETIF_F_V6_CSUM)
2634 net_dev->features |= NETIF_F_TSO6;
2635 /* Mask for features that also apply to VLAN devices */
2636 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2637 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2638 NETIF_F_RXCSUM);
2639 /* All offloads can be toggled */
2640 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2641 efx = netdev_priv(net_dev);
2642 pci_set_drvdata(pci_dev, efx);
2643 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2644 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2645 if (rc)
2646 goto fail1;
2647
2648 netif_info(efx, probe, efx->net_dev,
2649 "Solarflare NIC detected\n");
2650
2651 efx_print_product_vpd(efx);
2652
2653 /* Set up basic I/O (BAR mappings etc) */
2654 rc = efx_init_io(efx);
2655 if (rc)
2656 goto fail2;
2657
2658 rc = efx_pci_probe_main(efx);
2659
2660 /* Serialise against efx_reset(). No more resets will be
2661 * scheduled since efx_stop_all() has been called, and we have
2662 * not and never have been registered.
2663 */
2664 cancel_work_sync(&efx->reset_work);
2665
2666 if (rc)
2667 goto fail3;
2668
2669 /* If there was a scheduled reset during probe, the NIC is
2670 * probably hosed anyway.
2671 */
2672 if (efx->reset_pending) {
2673 rc = -EIO;
2674 goto fail4;
2675 }
2676
2677 /* Switch to the running state before we expose the device to the OS,
2678 * so that dev_open()|efx_start_all() will actually start the device */
2679 efx->state = STATE_RUNNING;
2680
2681 rc = efx_register_netdev(efx);
2682 if (rc)
2683 goto fail4;
2684
2685 rc = efx_sriov_init(efx);
2686 if (rc)
2687 netif_err(efx, probe, efx->net_dev,
2688 "SR-IOV can't be enabled rc %d\n", rc);
2689
2690 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2691
2692 /* Try to create MTDs, but allow this to fail */
2693 rtnl_lock();
2694 rc = efx_mtd_probe(efx);
2695 rtnl_unlock();
2696 if (rc)
2697 netif_warn(efx, probe, efx->net_dev,
2698 "failed to create MTDs (%d)\n", rc);
2699
2700 return 0;
2701
2702 fail4:
2703 efx_pci_remove_main(efx);
2704 fail3:
2705 efx_fini_io(efx);
2706 fail2:
2707 efx_fini_struct(efx);
2708 fail1:
2709 pci_set_drvdata(pci_dev, NULL);
2710 WARN_ON(rc > 0);
2711 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2712 free_netdev(net_dev);
2713 return rc;
2714}
2715
2716static int efx_pm_freeze(struct device *dev)
2717{
2718 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2719
2720 efx->state = STATE_FINI;
2721
2722 netif_device_detach(efx->net_dev);
2723
2724 efx_stop_all(efx);
2725 efx_stop_interrupts(efx, false);
2726
2727 return 0;
2728}
2729
2730static int efx_pm_thaw(struct device *dev)
2731{
2732 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2733
2734 efx->state = STATE_INIT;
2735
2736 efx_start_interrupts(efx, false);
2737
2738 mutex_lock(&efx->mac_lock);
2739 efx->phy_op->reconfigure(efx);
2740 mutex_unlock(&efx->mac_lock);
2741
2742 efx_start_all(efx);
2743
2744 netif_device_attach(efx->net_dev);
2745
2746 efx->state = STATE_RUNNING;
2747
2748 efx->type->resume_wol(efx);
2749
2750 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2751 queue_work(reset_workqueue, &efx->reset_work);
2752
2753 return 0;
2754}
2755
2756static int efx_pm_poweroff(struct device *dev)
2757{
2758 struct pci_dev *pci_dev = to_pci_dev(dev);
2759 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2760
2761 efx->type->fini(efx);
2762
2763 efx->reset_pending = 0;
2764
2765 pci_save_state(pci_dev);
2766 return pci_set_power_state(pci_dev, PCI_D3hot);
2767}
2768
2769/* Used for both resume and restore */
2770static int efx_pm_resume(struct device *dev)
2771{
2772 struct pci_dev *pci_dev = to_pci_dev(dev);
2773 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2774 int rc;
2775
2776 rc = pci_set_power_state(pci_dev, PCI_D0);
2777 if (rc)
2778 return rc;
2779 pci_restore_state(pci_dev);
2780 rc = pci_enable_device(pci_dev);
2781 if (rc)
2782 return rc;
2783 pci_set_master(efx->pci_dev);
2784 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2785 if (rc)
2786 return rc;
2787 rc = efx->type->init(efx);
2788 if (rc)
2789 return rc;
2790 efx_pm_thaw(dev);
2791 return 0;
2792}
2793
2794static int efx_pm_suspend(struct device *dev)
2795{
2796 int rc;
2797
2798 efx_pm_freeze(dev);
2799 rc = efx_pm_poweroff(dev);
2800 if (rc)
2801 efx_pm_resume(dev);
2802 return rc;
2803}
2804
2805static const struct dev_pm_ops efx_pm_ops = {
2806 .suspend = efx_pm_suspend,
2807 .resume = efx_pm_resume,
2808 .freeze = efx_pm_freeze,
2809 .thaw = efx_pm_thaw,
2810 .poweroff = efx_pm_poweroff,
2811 .restore = efx_pm_resume,
2812};
2813
2814static struct pci_driver efx_pci_driver = {
2815 .name = KBUILD_MODNAME,
2816 .id_table = efx_pci_table,
2817 .probe = efx_pci_probe,
2818 .remove = efx_pci_remove,
2819 .driver.pm = &efx_pm_ops,
2820};
2821
2822/**************************************************************************
2823 *
2824 * Kernel module interface
2825 *
2826 *************************************************************************/
2827
2828module_param(interrupt_mode, uint, 0444);
2829MODULE_PARM_DESC(interrupt_mode,
2830 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2831
2832static int __init efx_init_module(void)
2833{
2834 int rc;
2835
2836 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2837
2838 rc = register_netdevice_notifier(&efx_netdev_notifier);
2839 if (rc)
2840 goto err_notifier;
2841
2842 rc = efx_init_sriov();
2843 if (rc)
2844 goto err_sriov;
2845
2846 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2847 if (!reset_workqueue) {
2848 rc = -ENOMEM;
2849 goto err_reset;
2850 }
2851
2852 rc = pci_register_driver(&efx_pci_driver);
2853 if (rc < 0)
2854 goto err_pci;
2855
2856 return 0;
2857
2858 err_pci:
2859 destroy_workqueue(reset_workqueue);
2860 err_reset:
2861 efx_fini_sriov();
2862 err_sriov:
2863 unregister_netdevice_notifier(&efx_netdev_notifier);
2864 err_notifier:
2865 return rc;
2866}
2867
2868static void __exit efx_exit_module(void)
2869{
2870 printk(KERN_INFO "Solarflare NET driver unloading\n");
2871
2872 pci_unregister_driver(&efx_pci_driver);
2873 destroy_workqueue(reset_workqueue);
2874 efx_fini_sriov();
2875 unregister_netdevice_notifier(&efx_netdev_notifier);
2876
2877}
2878
2879module_init(efx_init_module);
2880module_exit(efx_exit_module);
2881
2882MODULE_AUTHOR("Solarflare Communications and "
2883 "Michael Brown <mbrown@fensystems.co.uk>");
2884MODULE_DESCRIPTION("Solarflare Communications network driver");
2885MODULE_LICENSE("GPL");
2886MODULE_DEVICE_TABLE(pci, efx_pci_table);