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1/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21#include <linux/clk.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/module.h>
25#include <linux/mtd/gpmi-nand.h>
26#include <linux/mtd/partitions.h>
27#include <linux/pinctrl/consumer.h>
28#include <linux/of.h>
29#include <linux/of_device.h>
30#include "gpmi-nand.h"
31
32/* add our owner bbt descriptor */
33static uint8_t scan_ff_pattern[] = { 0xff };
34static struct nand_bbt_descr gpmi_bbt_descr = {
35 .options = 0,
36 .offs = 0,
37 .len = 1,
38 .pattern = scan_ff_pattern
39};
40
41/* We will use all the (page + OOB). */
42static struct nand_ecclayout gpmi_hw_ecclayout = {
43 .eccbytes = 0,
44 .eccpos = { 0, },
45 .oobfree = { {.offset = 0, .length = 0} }
46};
47
48static irqreturn_t bch_irq(int irq, void *cookie)
49{
50 struct gpmi_nand_data *this = cookie;
51
52 gpmi_clear_bch(this);
53 complete(&this->bch_done);
54 return IRQ_HANDLED;
55}
56
57/*
58 * Calculate the ECC strength by hand:
59 * E : The ECC strength.
60 * G : the length of Galois Field.
61 * N : The chunk count of per page.
62 * O : the oobsize of the NAND chip.
63 * M : the metasize of per page.
64 *
65 * The formula is :
66 * E * G * N
67 * ------------ <= (O - M)
68 * 8
69 *
70 * So, we get E by:
71 * (O - M) * 8
72 * E <= -------------
73 * G * N
74 */
75static inline int get_ecc_strength(struct gpmi_nand_data *this)
76{
77 struct bch_geometry *geo = &this->bch_geometry;
78 struct mtd_info *mtd = &this->mtd;
79 int ecc_strength;
80
81 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
82 / (geo->gf_len * geo->ecc_chunk_count);
83
84 /* We need the minor even number. */
85 return round_down(ecc_strength, 2);
86}
87
88int common_nfc_set_geometry(struct gpmi_nand_data *this)
89{
90 struct bch_geometry *geo = &this->bch_geometry;
91 struct mtd_info *mtd = &this->mtd;
92 unsigned int metadata_size;
93 unsigned int status_size;
94 unsigned int block_mark_bit_offset;
95
96 /*
97 * The size of the metadata can be changed, though we set it to 10
98 * bytes now. But it can't be too large, because we have to save
99 * enough space for BCH.
100 */
101 geo->metadata_size = 10;
102
103 /* The default for the length of Galois Field. */
104 geo->gf_len = 13;
105
106 /* The default for chunk size. There is no oobsize greater then 512. */
107 geo->ecc_chunk_size = 512;
108 while (geo->ecc_chunk_size < mtd->oobsize)
109 geo->ecc_chunk_size *= 2; /* keep C >= O */
110
111 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
112
113 /* We use the same ECC strength for all chunks. */
114 geo->ecc_strength = get_ecc_strength(this);
115 if (!geo->ecc_strength) {
116 pr_err("We get a wrong ECC strength.\n");
117 return -EINVAL;
118 }
119
120 geo->page_size = mtd->writesize + mtd->oobsize;
121 geo->payload_size = mtd->writesize;
122
123 /*
124 * The auxiliary buffer contains the metadata and the ECC status. The
125 * metadata is padded to the nearest 32-bit boundary. The ECC status
126 * contains one byte for every ECC chunk, and is also padded to the
127 * nearest 32-bit boundary.
128 */
129 metadata_size = ALIGN(geo->metadata_size, 4);
130 status_size = ALIGN(geo->ecc_chunk_count, 4);
131
132 geo->auxiliary_size = metadata_size + status_size;
133 geo->auxiliary_status_offset = metadata_size;
134
135 if (!this->swap_block_mark)
136 return 0;
137
138 /*
139 * We need to compute the byte and bit offsets of
140 * the physical block mark within the ECC-based view of the page.
141 *
142 * NAND chip with 2K page shows below:
143 * (Block Mark)
144 * | |
145 * | D |
146 * |<---->|
147 * V V
148 * +---+----------+-+----------+-+----------+-+----------+-+
149 * | M | data |E| data |E| data |E| data |E|
150 * +---+----------+-+----------+-+----------+-+----------+-+
151 *
152 * The position of block mark moves forward in the ECC-based view
153 * of page, and the delta is:
154 *
155 * E * G * (N - 1)
156 * D = (---------------- + M)
157 * 8
158 *
159 * With the formula to compute the ECC strength, and the condition
160 * : C >= O (C is the ecc chunk size)
161 *
162 * It's easy to deduce to the following result:
163 *
164 * E * G (O - M) C - M C - M
165 * ----------- <= ------- <= -------- < ---------
166 * 8 N N (N - 1)
167 *
168 * So, we get:
169 *
170 * E * G * (N - 1)
171 * D = (---------------- + M) < C
172 * 8
173 *
174 * The above inequality means the position of block mark
175 * within the ECC-based view of the page is still in the data chunk,
176 * and it's NOT in the ECC bits of the chunk.
177 *
178 * Use the following to compute the bit position of the
179 * physical block mark within the ECC-based view of the page:
180 * (page_size - D) * 8
181 *
182 * --Huang Shijie
183 */
184 block_mark_bit_offset = mtd->writesize * 8 -
185 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
186 + geo->metadata_size * 8);
187
188 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
189 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
190 return 0;
191}
192
193struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
194{
195 int chipnr = this->current_chip;
196
197 return this->dma_chans[chipnr];
198}
199
200/* Can we use the upper's buffer directly for DMA? */
201void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
202{
203 struct scatterlist *sgl = &this->data_sgl;
204 int ret;
205
206 this->direct_dma_map_ok = true;
207
208 /* first try to map the upper buffer directly */
209 sg_init_one(sgl, this->upper_buf, this->upper_len);
210 ret = dma_map_sg(this->dev, sgl, 1, dr);
211 if (ret == 0) {
212 /* We have to use our own DMA buffer. */
213 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
214
215 if (dr == DMA_TO_DEVICE)
216 memcpy(this->data_buffer_dma, this->upper_buf,
217 this->upper_len);
218
219 ret = dma_map_sg(this->dev, sgl, 1, dr);
220 if (ret == 0)
221 pr_err("map failed.\n");
222
223 this->direct_dma_map_ok = false;
224 }
225}
226
227/* This will be called after the DMA operation is finished. */
228static void dma_irq_callback(void *param)
229{
230 struct gpmi_nand_data *this = param;
231 struct completion *dma_c = &this->dma_done;
232
233 complete(dma_c);
234
235 switch (this->dma_type) {
236 case DMA_FOR_COMMAND:
237 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
238 break;
239
240 case DMA_FOR_READ_DATA:
241 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
242 if (this->direct_dma_map_ok == false)
243 memcpy(this->upper_buf, this->data_buffer_dma,
244 this->upper_len);
245 break;
246
247 case DMA_FOR_WRITE_DATA:
248 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
249 break;
250
251 case DMA_FOR_READ_ECC_PAGE:
252 case DMA_FOR_WRITE_ECC_PAGE:
253 /* We have to wait the BCH interrupt to finish. */
254 break;
255
256 default:
257 pr_err("in wrong DMA operation.\n");
258 }
259}
260
261int start_dma_without_bch_irq(struct gpmi_nand_data *this,
262 struct dma_async_tx_descriptor *desc)
263{
264 struct completion *dma_c = &this->dma_done;
265 int err;
266
267 init_completion(dma_c);
268
269 desc->callback = dma_irq_callback;
270 desc->callback_param = this;
271 dmaengine_submit(desc);
272 dma_async_issue_pending(get_dma_chan(this));
273
274 /* Wait for the interrupt from the DMA block. */
275 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
276 if (!err) {
277 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
278 gpmi_dump_info(this);
279 return -ETIMEDOUT;
280 }
281 return 0;
282}
283
284/*
285 * This function is used in BCH reading or BCH writing pages.
286 * It will wait for the BCH interrupt as long as ONE second.
287 * Actually, we must wait for two interrupts :
288 * [1] firstly the DMA interrupt and
289 * [2] secondly the BCH interrupt.
290 */
291int start_dma_with_bch_irq(struct gpmi_nand_data *this,
292 struct dma_async_tx_descriptor *desc)
293{
294 struct completion *bch_c = &this->bch_done;
295 int err;
296
297 /* Prepare to receive an interrupt from the BCH block. */
298 init_completion(bch_c);
299
300 /* start the DMA */
301 start_dma_without_bch_irq(this, desc);
302
303 /* Wait for the interrupt from the BCH block. */
304 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
305 if (!err) {
306 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
307 gpmi_dump_info(this);
308 return -ETIMEDOUT;
309 }
310 return 0;
311}
312
313static int __devinit
314acquire_register_block(struct gpmi_nand_data *this, const char *res_name)
315{
316 struct platform_device *pdev = this->pdev;
317 struct resources *res = &this->resources;
318 struct resource *r;
319 void *p;
320
321 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
322 if (!r) {
323 pr_err("Can't get resource for %s\n", res_name);
324 return -ENXIO;
325 }
326
327 p = ioremap(r->start, resource_size(r));
328 if (!p) {
329 pr_err("Can't remap %s\n", res_name);
330 return -ENOMEM;
331 }
332
333 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
334 res->gpmi_regs = p;
335 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
336 res->bch_regs = p;
337 else
338 pr_err("unknown resource name : %s\n", res_name);
339
340 return 0;
341}
342
343static void release_register_block(struct gpmi_nand_data *this)
344{
345 struct resources *res = &this->resources;
346 if (res->gpmi_regs)
347 iounmap(res->gpmi_regs);
348 if (res->bch_regs)
349 iounmap(res->bch_regs);
350 res->gpmi_regs = NULL;
351 res->bch_regs = NULL;
352}
353
354static int __devinit
355acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
356{
357 struct platform_device *pdev = this->pdev;
358 struct resources *res = &this->resources;
359 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
360 struct resource *r;
361 int err;
362
363 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
364 if (!r) {
365 pr_err("Can't get resource for %s\n", res_name);
366 return -ENXIO;
367 }
368
369 err = request_irq(r->start, irq_h, 0, res_name, this);
370 if (err) {
371 pr_err("Can't own %s\n", res_name);
372 return err;
373 }
374
375 res->bch_low_interrupt = r->start;
376 res->bch_high_interrupt = r->end;
377 return 0;
378}
379
380static void release_bch_irq(struct gpmi_nand_data *this)
381{
382 struct resources *res = &this->resources;
383 int i = res->bch_low_interrupt;
384
385 for (; i <= res->bch_high_interrupt; i++)
386 free_irq(i, this);
387}
388
389static bool gpmi_dma_filter(struct dma_chan *chan, void *param)
390{
391 struct gpmi_nand_data *this = param;
392 int dma_channel = (int)this->private;
393
394 if (!mxs_dma_is_apbh(chan))
395 return false;
396 /*
397 * only catch the GPMI dma channels :
398 * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3
399 * (These four channels share the same IRQ!)
400 *
401 * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7
402 * (These eight channels share the same IRQ!)
403 */
404 if (dma_channel == chan->chan_id) {
405 chan->private = &this->dma_data;
406 return true;
407 }
408 return false;
409}
410
411static void release_dma_channels(struct gpmi_nand_data *this)
412{
413 unsigned int i;
414 for (i = 0; i < DMA_CHANS; i++)
415 if (this->dma_chans[i]) {
416 dma_release_channel(this->dma_chans[i]);
417 this->dma_chans[i] = NULL;
418 }
419}
420
421static int __devinit acquire_dma_channels(struct gpmi_nand_data *this)
422{
423 struct platform_device *pdev = this->pdev;
424 struct resource *r_dma;
425 struct device_node *dn;
426 int dma_channel;
427 unsigned int ret;
428 struct dma_chan *dma_chan;
429 dma_cap_mask_t mask;
430
431 /* dma channel, we only use the first one. */
432 dn = pdev->dev.of_node;
433 ret = of_property_read_u32(dn, "fsl,gpmi-dma-channel", &dma_channel);
434 if (ret) {
435 pr_err("unable to get DMA channel from dt.\n");
436 goto acquire_err;
437 }
438 this->private = (void *)dma_channel;
439
440 /* gpmi dma interrupt */
441 r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
442 GPMI_NAND_DMA_INTERRUPT_RES_NAME);
443 if (!r_dma) {
444 pr_err("Can't get resource for DMA\n");
445 goto acquire_err;
446 }
447 this->dma_data.chan_irq = r_dma->start;
448
449 /* request dma channel */
450 dma_cap_zero(mask);
451 dma_cap_set(DMA_SLAVE, mask);
452
453 dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);
454 if (!dma_chan) {
455 pr_err("dma_request_channel failed.\n");
456 goto acquire_err;
457 }
458
459 this->dma_chans[0] = dma_chan;
460 return 0;
461
462acquire_err:
463 release_dma_channels(this);
464 return -EINVAL;
465}
466
467static int __devinit acquire_resources(struct gpmi_nand_data *this)
468{
469 struct resources *res = &this->resources;
470 struct pinctrl *pinctrl;
471 int ret;
472
473 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
474 if (ret)
475 goto exit_regs;
476
477 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
478 if (ret)
479 goto exit_regs;
480
481 ret = acquire_bch_irq(this, bch_irq);
482 if (ret)
483 goto exit_regs;
484
485 ret = acquire_dma_channels(this);
486 if (ret)
487 goto exit_dma_channels;
488
489 pinctrl = devm_pinctrl_get_select_default(&this->pdev->dev);
490 if (IS_ERR(pinctrl)) {
491 ret = PTR_ERR(pinctrl);
492 goto exit_pin;
493 }
494
495 res->clock = clk_get(&this->pdev->dev, NULL);
496 if (IS_ERR(res->clock)) {
497 pr_err("can not get the clock\n");
498 ret = -ENOENT;
499 goto exit_clock;
500 }
501 return 0;
502
503exit_clock:
504exit_pin:
505 release_dma_channels(this);
506exit_dma_channels:
507 release_bch_irq(this);
508exit_regs:
509 release_register_block(this);
510 return ret;
511}
512
513static void release_resources(struct gpmi_nand_data *this)
514{
515 struct resources *r = &this->resources;
516
517 clk_put(r->clock);
518 release_register_block(this);
519 release_bch_irq(this);
520 release_dma_channels(this);
521}
522
523static int __devinit init_hardware(struct gpmi_nand_data *this)
524{
525 int ret;
526
527 /*
528 * This structure contains the "safe" GPMI timing that should succeed
529 * with any NAND Flash device
530 * (although, with less-than-optimal performance).
531 */
532 struct nand_timing safe_timing = {
533 .data_setup_in_ns = 80,
534 .data_hold_in_ns = 60,
535 .address_setup_in_ns = 25,
536 .gpmi_sample_delay_in_ns = 6,
537 .tREA_in_ns = -1,
538 .tRLOH_in_ns = -1,
539 .tRHOH_in_ns = -1,
540 };
541
542 /* Initialize the hardwares. */
543 ret = gpmi_init(this);
544 if (ret)
545 return ret;
546
547 this->timing = safe_timing;
548 return 0;
549}
550
551static int read_page_prepare(struct gpmi_nand_data *this,
552 void *destination, unsigned length,
553 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
554 void **use_virt, dma_addr_t *use_phys)
555{
556 struct device *dev = this->dev;
557
558 if (virt_addr_valid(destination)) {
559 dma_addr_t dest_phys;
560
561 dest_phys = dma_map_single(dev, destination,
562 length, DMA_FROM_DEVICE);
563 if (dma_mapping_error(dev, dest_phys)) {
564 if (alt_size < length) {
565 pr_err("Alternate buffer is too small\n");
566 return -ENOMEM;
567 }
568 goto map_failed;
569 }
570 *use_virt = destination;
571 *use_phys = dest_phys;
572 this->direct_dma_map_ok = true;
573 return 0;
574 }
575
576map_failed:
577 *use_virt = alt_virt;
578 *use_phys = alt_phys;
579 this->direct_dma_map_ok = false;
580 return 0;
581}
582
583static inline void read_page_end(struct gpmi_nand_data *this,
584 void *destination, unsigned length,
585 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
586 void *used_virt, dma_addr_t used_phys)
587{
588 if (this->direct_dma_map_ok)
589 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
590}
591
592static inline void read_page_swap_end(struct gpmi_nand_data *this,
593 void *destination, unsigned length,
594 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
595 void *used_virt, dma_addr_t used_phys)
596{
597 if (!this->direct_dma_map_ok)
598 memcpy(destination, alt_virt, length);
599}
600
601static int send_page_prepare(struct gpmi_nand_data *this,
602 const void *source, unsigned length,
603 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
604 const void **use_virt, dma_addr_t *use_phys)
605{
606 struct device *dev = this->dev;
607
608 if (virt_addr_valid(source)) {
609 dma_addr_t source_phys;
610
611 source_phys = dma_map_single(dev, (void *)source, length,
612 DMA_TO_DEVICE);
613 if (dma_mapping_error(dev, source_phys)) {
614 if (alt_size < length) {
615 pr_err("Alternate buffer is too small\n");
616 return -ENOMEM;
617 }
618 goto map_failed;
619 }
620 *use_virt = source;
621 *use_phys = source_phys;
622 return 0;
623 }
624map_failed:
625 /*
626 * Copy the content of the source buffer into the alternate
627 * buffer and set up the return values accordingly.
628 */
629 memcpy(alt_virt, source, length);
630
631 *use_virt = alt_virt;
632 *use_phys = alt_phys;
633 return 0;
634}
635
636static void send_page_end(struct gpmi_nand_data *this,
637 const void *source, unsigned length,
638 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
639 const void *used_virt, dma_addr_t used_phys)
640{
641 struct device *dev = this->dev;
642 if (used_virt == source)
643 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
644}
645
646static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
647{
648 struct device *dev = this->dev;
649
650 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
651 dma_free_coherent(dev, this->page_buffer_size,
652 this->page_buffer_virt,
653 this->page_buffer_phys);
654 kfree(this->cmd_buffer);
655 kfree(this->data_buffer_dma);
656
657 this->cmd_buffer = NULL;
658 this->data_buffer_dma = NULL;
659 this->page_buffer_virt = NULL;
660 this->page_buffer_size = 0;
661}
662
663/* Allocate the DMA buffers */
664static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
665{
666 struct bch_geometry *geo = &this->bch_geometry;
667 struct device *dev = this->dev;
668
669 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
670 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA);
671 if (this->cmd_buffer == NULL)
672 goto error_alloc;
673
674 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
675 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA);
676 if (this->data_buffer_dma == NULL)
677 goto error_alloc;
678
679 /*
680 * [3] Allocate the page buffer.
681 *
682 * Both the payload buffer and the auxiliary buffer must appear on
683 * 32-bit boundaries. We presume the size of the payload buffer is a
684 * power of two and is much larger than four, which guarantees the
685 * auxiliary buffer will appear on a 32-bit boundary.
686 */
687 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
688 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
689 &this->page_buffer_phys, GFP_DMA);
690 if (!this->page_buffer_virt)
691 goto error_alloc;
692
693
694 /* Slice up the page buffer. */
695 this->payload_virt = this->page_buffer_virt;
696 this->payload_phys = this->page_buffer_phys;
697 this->auxiliary_virt = this->payload_virt + geo->payload_size;
698 this->auxiliary_phys = this->payload_phys + geo->payload_size;
699 return 0;
700
701error_alloc:
702 gpmi_free_dma_buffer(this);
703 pr_err("allocate DMA buffer ret!!\n");
704 return -ENOMEM;
705}
706
707static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
708{
709 struct nand_chip *chip = mtd->priv;
710 struct gpmi_nand_data *this = chip->priv;
711 int ret;
712
713 /*
714 * Every operation begins with a command byte and a series of zero or
715 * more address bytes. These are distinguished by either the Address
716 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
717 * asserted. When MTD is ready to execute the command, it will deassert
718 * both latch enables.
719 *
720 * Rather than run a separate DMA operation for every single byte, we
721 * queue them up and run a single DMA operation for the entire series
722 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
723 */
724 if ((ctrl & (NAND_ALE | NAND_CLE))) {
725 if (data != NAND_CMD_NONE)
726 this->cmd_buffer[this->command_length++] = data;
727 return;
728 }
729
730 if (!this->command_length)
731 return;
732
733 ret = gpmi_send_command(this);
734 if (ret)
735 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
736
737 this->command_length = 0;
738}
739
740static int gpmi_dev_ready(struct mtd_info *mtd)
741{
742 struct nand_chip *chip = mtd->priv;
743 struct gpmi_nand_data *this = chip->priv;
744
745 return gpmi_is_ready(this, this->current_chip);
746}
747
748static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
749{
750 struct nand_chip *chip = mtd->priv;
751 struct gpmi_nand_data *this = chip->priv;
752
753 if ((this->current_chip < 0) && (chipnr >= 0))
754 gpmi_begin(this);
755 else if ((this->current_chip >= 0) && (chipnr < 0))
756 gpmi_end(this);
757
758 this->current_chip = chipnr;
759}
760
761static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
762{
763 struct nand_chip *chip = mtd->priv;
764 struct gpmi_nand_data *this = chip->priv;
765
766 pr_debug("len is %d\n", len);
767 this->upper_buf = buf;
768 this->upper_len = len;
769
770 gpmi_read_data(this);
771}
772
773static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
774{
775 struct nand_chip *chip = mtd->priv;
776 struct gpmi_nand_data *this = chip->priv;
777
778 pr_debug("len is %d\n", len);
779 this->upper_buf = (uint8_t *)buf;
780 this->upper_len = len;
781
782 gpmi_send_data(this);
783}
784
785static uint8_t gpmi_read_byte(struct mtd_info *mtd)
786{
787 struct nand_chip *chip = mtd->priv;
788 struct gpmi_nand_data *this = chip->priv;
789 uint8_t *buf = this->data_buffer_dma;
790
791 gpmi_read_buf(mtd, buf, 1);
792 return buf[0];
793}
794
795/*
796 * Handles block mark swapping.
797 * It can be called in swapping the block mark, or swapping it back,
798 * because the the operations are the same.
799 */
800static void block_mark_swapping(struct gpmi_nand_data *this,
801 void *payload, void *auxiliary)
802{
803 struct bch_geometry *nfc_geo = &this->bch_geometry;
804 unsigned char *p;
805 unsigned char *a;
806 unsigned int bit;
807 unsigned char mask;
808 unsigned char from_data;
809 unsigned char from_oob;
810
811 if (!this->swap_block_mark)
812 return;
813
814 /*
815 * If control arrives here, we're swapping. Make some convenience
816 * variables.
817 */
818 bit = nfc_geo->block_mark_bit_offset;
819 p = payload + nfc_geo->block_mark_byte_offset;
820 a = auxiliary;
821
822 /*
823 * Get the byte from the data area that overlays the block mark. Since
824 * the ECC engine applies its own view to the bits in the page, the
825 * physical block mark won't (in general) appear on a byte boundary in
826 * the data.
827 */
828 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
829
830 /* Get the byte from the OOB. */
831 from_oob = a[0];
832
833 /* Swap them. */
834 a[0] = from_data;
835
836 mask = (0x1 << bit) - 1;
837 p[0] = (p[0] & mask) | (from_oob << bit);
838
839 mask = ~0 << bit;
840 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
841}
842
843static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
844 uint8_t *buf, int oob_required, int page)
845{
846 struct gpmi_nand_data *this = chip->priv;
847 struct bch_geometry *nfc_geo = &this->bch_geometry;
848 void *payload_virt;
849 dma_addr_t payload_phys;
850 void *auxiliary_virt;
851 dma_addr_t auxiliary_phys;
852 unsigned int i;
853 unsigned char *status;
854 unsigned int failed;
855 unsigned int corrected;
856 int ret;
857
858 pr_debug("page number is : %d\n", page);
859 ret = read_page_prepare(this, buf, mtd->writesize,
860 this->payload_virt, this->payload_phys,
861 nfc_geo->payload_size,
862 &payload_virt, &payload_phys);
863 if (ret) {
864 pr_err("Inadequate DMA buffer\n");
865 ret = -ENOMEM;
866 return ret;
867 }
868 auxiliary_virt = this->auxiliary_virt;
869 auxiliary_phys = this->auxiliary_phys;
870
871 /* go! */
872 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
873 read_page_end(this, buf, mtd->writesize,
874 this->payload_virt, this->payload_phys,
875 nfc_geo->payload_size,
876 payload_virt, payload_phys);
877 if (ret) {
878 pr_err("Error in ECC-based read: %d\n", ret);
879 goto exit_nfc;
880 }
881
882 /* handle the block mark swapping */
883 block_mark_swapping(this, payload_virt, auxiliary_virt);
884
885 /* Loop over status bytes, accumulating ECC status. */
886 failed = 0;
887 corrected = 0;
888 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
889
890 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
891 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
892 continue;
893
894 if (*status == STATUS_UNCORRECTABLE) {
895 failed++;
896 continue;
897 }
898 corrected += *status;
899 }
900
901 /*
902 * Propagate ECC status to the owning MTD only when failed or
903 * corrected times nearly reaches our ECC correction threshold.
904 */
905 if (failed || corrected >= (nfc_geo->ecc_strength - 1)) {
906 mtd->ecc_stats.failed += failed;
907 mtd->ecc_stats.corrected += corrected;
908 }
909
910 if (oob_required) {
911 /*
912 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
913 * for details about our policy for delivering the OOB.
914 *
915 * We fill the caller's buffer with set bits, and then copy the
916 * block mark to th caller's buffer. Note that, if block mark
917 * swapping was necessary, it has already been done, so we can
918 * rely on the first byte of the auxiliary buffer to contain
919 * the block mark.
920 */
921 memset(chip->oob_poi, ~0, mtd->oobsize);
922 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
923 }
924
925 read_page_swap_end(this, buf, mtd->writesize,
926 this->payload_virt, this->payload_phys,
927 nfc_geo->payload_size,
928 payload_virt, payload_phys);
929exit_nfc:
930 return ret;
931}
932
933static void gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
934 const uint8_t *buf, int oob_required)
935{
936 struct gpmi_nand_data *this = chip->priv;
937 struct bch_geometry *nfc_geo = &this->bch_geometry;
938 const void *payload_virt;
939 dma_addr_t payload_phys;
940 const void *auxiliary_virt;
941 dma_addr_t auxiliary_phys;
942 int ret;
943
944 pr_debug("ecc write page.\n");
945 if (this->swap_block_mark) {
946 /*
947 * If control arrives here, we're doing block mark swapping.
948 * Since we can't modify the caller's buffers, we must copy them
949 * into our own.
950 */
951 memcpy(this->payload_virt, buf, mtd->writesize);
952 payload_virt = this->payload_virt;
953 payload_phys = this->payload_phys;
954
955 memcpy(this->auxiliary_virt, chip->oob_poi,
956 nfc_geo->auxiliary_size);
957 auxiliary_virt = this->auxiliary_virt;
958 auxiliary_phys = this->auxiliary_phys;
959
960 /* Handle block mark swapping. */
961 block_mark_swapping(this,
962 (void *) payload_virt, (void *) auxiliary_virt);
963 } else {
964 /*
965 * If control arrives here, we're not doing block mark swapping,
966 * so we can to try and use the caller's buffers.
967 */
968 ret = send_page_prepare(this,
969 buf, mtd->writesize,
970 this->payload_virt, this->payload_phys,
971 nfc_geo->payload_size,
972 &payload_virt, &payload_phys);
973 if (ret) {
974 pr_err("Inadequate payload DMA buffer\n");
975 return;
976 }
977
978 ret = send_page_prepare(this,
979 chip->oob_poi, mtd->oobsize,
980 this->auxiliary_virt, this->auxiliary_phys,
981 nfc_geo->auxiliary_size,
982 &auxiliary_virt, &auxiliary_phys);
983 if (ret) {
984 pr_err("Inadequate auxiliary DMA buffer\n");
985 goto exit_auxiliary;
986 }
987 }
988
989 /* Ask the NFC. */
990 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
991 if (ret)
992 pr_err("Error in ECC-based write: %d\n", ret);
993
994 if (!this->swap_block_mark) {
995 send_page_end(this, chip->oob_poi, mtd->oobsize,
996 this->auxiliary_virt, this->auxiliary_phys,
997 nfc_geo->auxiliary_size,
998 auxiliary_virt, auxiliary_phys);
999exit_auxiliary:
1000 send_page_end(this, buf, mtd->writesize,
1001 this->payload_virt, this->payload_phys,
1002 nfc_geo->payload_size,
1003 payload_virt, payload_phys);
1004 }
1005}
1006
1007/*
1008 * There are several places in this driver where we have to handle the OOB and
1009 * block marks. This is the function where things are the most complicated, so
1010 * this is where we try to explain it all. All the other places refer back to
1011 * here.
1012 *
1013 * These are the rules, in order of decreasing importance:
1014 *
1015 * 1) Nothing the caller does can be allowed to imperil the block mark.
1016 *
1017 * 2) In read operations, the first byte of the OOB we return must reflect the
1018 * true state of the block mark, no matter where that block mark appears in
1019 * the physical page.
1020 *
1021 * 3) ECC-based read operations return an OOB full of set bits (since we never
1022 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1023 * return).
1024 *
1025 * 4) "Raw" read operations return a direct view of the physical bytes in the
1026 * page, using the conventional definition of which bytes are data and which
1027 * are OOB. This gives the caller a way to see the actual, physical bytes
1028 * in the page, without the distortions applied by our ECC engine.
1029 *
1030 *
1031 * What we do for this specific read operation depends on two questions:
1032 *
1033 * 1) Are we doing a "raw" read, or an ECC-based read?
1034 *
1035 * 2) Are we using block mark swapping or transcription?
1036 *
1037 * There are four cases, illustrated by the following Karnaugh map:
1038 *
1039 * | Raw | ECC-based |
1040 * -------------+-------------------------+-------------------------+
1041 * | Read the conventional | |
1042 * | OOB at the end of the | |
1043 * Swapping | page and return it. It | |
1044 * | contains exactly what | |
1045 * | we want. | Read the block mark and |
1046 * -------------+-------------------------+ return it in a buffer |
1047 * | Read the conventional | full of set bits. |
1048 * | OOB at the end of the | |
1049 * | page and also the block | |
1050 * Transcribing | mark in the metadata. | |
1051 * | Copy the block mark | |
1052 * | into the first byte of | |
1053 * | the OOB. | |
1054 * -------------+-------------------------+-------------------------+
1055 *
1056 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1057 * giving an accurate view of the actual, physical bytes in the page (we're
1058 * overwriting the block mark). That's OK because it's more important to follow
1059 * rule #2.
1060 *
1061 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1062 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1063 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1064 * ECC-based or raw view of the page is implicit in which function it calls
1065 * (there is a similar pair of ECC-based/raw functions for writing).
1066 *
1067 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1068 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1069 * caller wants an ECC-based or raw view of the page is not propagated down to
1070 * this driver.
1071 */
1072static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1073 int page)
1074{
1075 struct gpmi_nand_data *this = chip->priv;
1076
1077 pr_debug("page number is %d\n", page);
1078 /* clear the OOB buffer */
1079 memset(chip->oob_poi, ~0, mtd->oobsize);
1080
1081 /* Read out the conventional OOB. */
1082 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1083 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1084
1085 /*
1086 * Now, we want to make sure the block mark is correct. In the
1087 * Swapping/Raw case, we already have it. Otherwise, we need to
1088 * explicitly read it.
1089 */
1090 if (!this->swap_block_mark) {
1091 /* Read the block mark into the first byte of the OOB buffer. */
1092 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1093 chip->oob_poi[0] = chip->read_byte(mtd);
1094 }
1095
1096 return 0;
1097}
1098
1099static int
1100gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1101{
1102 /*
1103 * The BCH will use all the (page + oob).
1104 * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob.
1105 * But it can not stop some ioctls such MEMWRITEOOB which uses
1106 * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit
1107 * these ioctls too.
1108 */
1109 return -EPERM;
1110}
1111
1112static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1113{
1114 struct nand_chip *chip = mtd->priv;
1115 struct gpmi_nand_data *this = chip->priv;
1116 int block, ret = 0;
1117 uint8_t *block_mark;
1118 int column, page, status, chipnr;
1119
1120 /* Get block number */
1121 block = (int)(ofs >> chip->bbt_erase_shift);
1122 if (chip->bbt)
1123 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1124
1125 /* Do we have a flash based bad block table ? */
1126 if (chip->bbt_options & NAND_BBT_USE_FLASH)
1127 ret = nand_update_bbt(mtd, ofs);
1128 else {
1129 chipnr = (int)(ofs >> chip->chip_shift);
1130 chip->select_chip(mtd, chipnr);
1131
1132 column = this->swap_block_mark ? mtd->writesize : 0;
1133
1134 /* Write the block mark. */
1135 block_mark = this->data_buffer_dma;
1136 block_mark[0] = 0; /* bad block marker */
1137
1138 /* Shift to get page */
1139 page = (int)(ofs >> chip->page_shift);
1140
1141 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1142 chip->write_buf(mtd, block_mark, 1);
1143 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1144
1145 status = chip->waitfunc(mtd, chip);
1146 if (status & NAND_STATUS_FAIL)
1147 ret = -EIO;
1148
1149 chip->select_chip(mtd, -1);
1150 }
1151 if (!ret)
1152 mtd->ecc_stats.badblocks++;
1153
1154 return ret;
1155}
1156
1157static int nand_boot_set_geometry(struct gpmi_nand_data *this)
1158{
1159 struct boot_rom_geometry *geometry = &this->rom_geometry;
1160
1161 /*
1162 * Set the boot block stride size.
1163 *
1164 * In principle, we should be reading this from the OTP bits, since
1165 * that's where the ROM is going to get it. In fact, we don't have any
1166 * way to read the OTP bits, so we go with the default and hope for the
1167 * best.
1168 */
1169 geometry->stride_size_in_pages = 64;
1170
1171 /*
1172 * Set the search area stride exponent.
1173 *
1174 * In principle, we should be reading this from the OTP bits, since
1175 * that's where the ROM is going to get it. In fact, we don't have any
1176 * way to read the OTP bits, so we go with the default and hope for the
1177 * best.
1178 */
1179 geometry->search_area_stride_exponent = 2;
1180 return 0;
1181}
1182
1183static const char *fingerprint = "STMP";
1184static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
1185{
1186 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1187 struct device *dev = this->dev;
1188 struct mtd_info *mtd = &this->mtd;
1189 struct nand_chip *chip = &this->nand;
1190 unsigned int search_area_size_in_strides;
1191 unsigned int stride;
1192 unsigned int page;
1193 loff_t byte;
1194 uint8_t *buffer = chip->buffers->databuf;
1195 int saved_chip_number;
1196 int found_an_ncb_fingerprint = false;
1197
1198 /* Compute the number of strides in a search area. */
1199 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1200
1201 saved_chip_number = this->current_chip;
1202 chip->select_chip(mtd, 0);
1203
1204 /*
1205 * Loop through the first search area, looking for the NCB fingerprint.
1206 */
1207 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1208
1209 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1210 /* Compute the page and byte addresses. */
1211 page = stride * rom_geo->stride_size_in_pages;
1212 byte = page * mtd->writesize;
1213
1214 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1215
1216 /*
1217 * Read the NCB fingerprint. The fingerprint is four bytes long
1218 * and starts in the 12th byte of the page.
1219 */
1220 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1221 chip->read_buf(mtd, buffer, strlen(fingerprint));
1222
1223 /* Look for the fingerprint. */
1224 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1225 found_an_ncb_fingerprint = true;
1226 break;
1227 }
1228
1229 }
1230
1231 chip->select_chip(mtd, saved_chip_number);
1232
1233 if (found_an_ncb_fingerprint)
1234 dev_dbg(dev, "\tFound a fingerprint\n");
1235 else
1236 dev_dbg(dev, "\tNo fingerprint found\n");
1237 return found_an_ncb_fingerprint;
1238}
1239
1240/* Writes a transcription stamp. */
1241static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
1242{
1243 struct device *dev = this->dev;
1244 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1245 struct mtd_info *mtd = &this->mtd;
1246 struct nand_chip *chip = &this->nand;
1247 unsigned int block_size_in_pages;
1248 unsigned int search_area_size_in_strides;
1249 unsigned int search_area_size_in_pages;
1250 unsigned int search_area_size_in_blocks;
1251 unsigned int block;
1252 unsigned int stride;
1253 unsigned int page;
1254 loff_t byte;
1255 uint8_t *buffer = chip->buffers->databuf;
1256 int saved_chip_number;
1257 int status;
1258
1259 /* Compute the search area geometry. */
1260 block_size_in_pages = mtd->erasesize / mtd->writesize;
1261 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1262 search_area_size_in_pages = search_area_size_in_strides *
1263 rom_geo->stride_size_in_pages;
1264 search_area_size_in_blocks =
1265 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1266 block_size_in_pages;
1267
1268 dev_dbg(dev, "Search Area Geometry :\n");
1269 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1270 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1271 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1272
1273 /* Select chip 0. */
1274 saved_chip_number = this->current_chip;
1275 chip->select_chip(mtd, 0);
1276
1277 /* Loop over blocks in the first search area, erasing them. */
1278 dev_dbg(dev, "Erasing the search area...\n");
1279
1280 for (block = 0; block < search_area_size_in_blocks; block++) {
1281 /* Compute the page address. */
1282 page = block * block_size_in_pages;
1283
1284 /* Erase this block. */
1285 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1286 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1287 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1288
1289 /* Wait for the erase to finish. */
1290 status = chip->waitfunc(mtd, chip);
1291 if (status & NAND_STATUS_FAIL)
1292 dev_err(dev, "[%s] Erase failed.\n", __func__);
1293 }
1294
1295 /* Write the NCB fingerprint into the page buffer. */
1296 memset(buffer, ~0, mtd->writesize);
1297 memset(chip->oob_poi, ~0, mtd->oobsize);
1298 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1299
1300 /* Loop through the first search area, writing NCB fingerprints. */
1301 dev_dbg(dev, "Writing NCB fingerprints...\n");
1302 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1303 /* Compute the page and byte addresses. */
1304 page = stride * rom_geo->stride_size_in_pages;
1305 byte = page * mtd->writesize;
1306
1307 /* Write the first page of the current stride. */
1308 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1309 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1310 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
1311 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1312
1313 /* Wait for the write to finish. */
1314 status = chip->waitfunc(mtd, chip);
1315 if (status & NAND_STATUS_FAIL)
1316 dev_err(dev, "[%s] Write failed.\n", __func__);
1317 }
1318
1319 /* Deselect chip 0. */
1320 chip->select_chip(mtd, saved_chip_number);
1321 return 0;
1322}
1323
1324static int mx23_boot_init(struct gpmi_nand_data *this)
1325{
1326 struct device *dev = this->dev;
1327 struct nand_chip *chip = &this->nand;
1328 struct mtd_info *mtd = &this->mtd;
1329 unsigned int block_count;
1330 unsigned int block;
1331 int chipnr;
1332 int page;
1333 loff_t byte;
1334 uint8_t block_mark;
1335 int ret = 0;
1336
1337 /*
1338 * If control arrives here, we can't use block mark swapping, which
1339 * means we're forced to use transcription. First, scan for the
1340 * transcription stamp. If we find it, then we don't have to do
1341 * anything -- the block marks are already transcribed.
1342 */
1343 if (mx23_check_transcription_stamp(this))
1344 return 0;
1345
1346 /*
1347 * If control arrives here, we couldn't find a transcription stamp, so
1348 * so we presume the block marks are in the conventional location.
1349 */
1350 dev_dbg(dev, "Transcribing bad block marks...\n");
1351
1352 /* Compute the number of blocks in the entire medium. */
1353 block_count = chip->chipsize >> chip->phys_erase_shift;
1354
1355 /*
1356 * Loop over all the blocks in the medium, transcribing block marks as
1357 * we go.
1358 */
1359 for (block = 0; block < block_count; block++) {
1360 /*
1361 * Compute the chip, page and byte addresses for this block's
1362 * conventional mark.
1363 */
1364 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1365 page = block << (chip->phys_erase_shift - chip->page_shift);
1366 byte = block << chip->phys_erase_shift;
1367
1368 /* Send the command to read the conventional block mark. */
1369 chip->select_chip(mtd, chipnr);
1370 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1371 block_mark = chip->read_byte(mtd);
1372 chip->select_chip(mtd, -1);
1373
1374 /*
1375 * Check if the block is marked bad. If so, we need to mark it
1376 * again, but this time the result will be a mark in the
1377 * location where we transcribe block marks.
1378 */
1379 if (block_mark != 0xff) {
1380 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1381 ret = chip->block_markbad(mtd, byte);
1382 if (ret)
1383 dev_err(dev, "Failed to mark block bad with "
1384 "ret %d\n", ret);
1385 }
1386 }
1387
1388 /* Write the stamp that indicates we've transcribed the block marks. */
1389 mx23_write_transcription_stamp(this);
1390 return 0;
1391}
1392
1393static int nand_boot_init(struct gpmi_nand_data *this)
1394{
1395 nand_boot_set_geometry(this);
1396
1397 /* This is ROM arch-specific initilization before the BBT scanning. */
1398 if (GPMI_IS_MX23(this))
1399 return mx23_boot_init(this);
1400 return 0;
1401}
1402
1403static int gpmi_set_geometry(struct gpmi_nand_data *this)
1404{
1405 int ret;
1406
1407 /* Free the temporary DMA memory for reading ID. */
1408 gpmi_free_dma_buffer(this);
1409
1410 /* Set up the NFC geometry which is used by BCH. */
1411 ret = bch_set_geometry(this);
1412 if (ret) {
1413 pr_err("set geometry ret : %d\n", ret);
1414 return ret;
1415 }
1416
1417 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1418 return gpmi_alloc_dma_buffer(this);
1419}
1420
1421static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1422{
1423 int ret;
1424
1425 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1426 if (GPMI_IS_MX23(this))
1427 this->swap_block_mark = false;
1428 else
1429 this->swap_block_mark = true;
1430
1431 /* Set up the medium geometry */
1432 ret = gpmi_set_geometry(this);
1433 if (ret)
1434 return ret;
1435
1436 /* Adjust the ECC strength according to the chip. */
1437 this->nand.ecc.strength = this->bch_geometry.ecc_strength;
1438 this->mtd.ecc_strength = this->bch_geometry.ecc_strength;
1439
1440 /* NAND boot init, depends on the gpmi_set_geometry(). */
1441 return nand_boot_init(this);
1442}
1443
1444static int gpmi_scan_bbt(struct mtd_info *mtd)
1445{
1446 struct nand_chip *chip = mtd->priv;
1447 struct gpmi_nand_data *this = chip->priv;
1448 int ret;
1449
1450 /* Prepare for the BBT scan. */
1451 ret = gpmi_pre_bbt_scan(this);
1452 if (ret)
1453 return ret;
1454
1455 /* use the default BBT implementation */
1456 return nand_default_bbt(mtd);
1457}
1458
1459void gpmi_nfc_exit(struct gpmi_nand_data *this)
1460{
1461 nand_release(&this->mtd);
1462 gpmi_free_dma_buffer(this);
1463}
1464
1465static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)
1466{
1467 struct mtd_info *mtd = &this->mtd;
1468 struct nand_chip *chip = &this->nand;
1469 struct mtd_part_parser_data ppdata = {};
1470 int ret;
1471
1472 /* init current chip */
1473 this->current_chip = -1;
1474
1475 /* init the MTD data structures */
1476 mtd->priv = chip;
1477 mtd->name = "gpmi-nand";
1478 mtd->owner = THIS_MODULE;
1479
1480 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1481 chip->priv = this;
1482 chip->select_chip = gpmi_select_chip;
1483 chip->cmd_ctrl = gpmi_cmd_ctrl;
1484 chip->dev_ready = gpmi_dev_ready;
1485 chip->read_byte = gpmi_read_byte;
1486 chip->read_buf = gpmi_read_buf;
1487 chip->write_buf = gpmi_write_buf;
1488 chip->ecc.read_page = gpmi_ecc_read_page;
1489 chip->ecc.write_page = gpmi_ecc_write_page;
1490 chip->ecc.read_oob = gpmi_ecc_read_oob;
1491 chip->ecc.write_oob = gpmi_ecc_write_oob;
1492 chip->scan_bbt = gpmi_scan_bbt;
1493 chip->badblock_pattern = &gpmi_bbt_descr;
1494 chip->block_markbad = gpmi_block_markbad;
1495 chip->options |= NAND_NO_SUBPAGE_WRITE;
1496 chip->ecc.mode = NAND_ECC_HW;
1497 chip->ecc.size = 1;
1498 chip->ecc.strength = 8;
1499 chip->ecc.layout = &gpmi_hw_ecclayout;
1500
1501 /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
1502 this->bch_geometry.payload_size = 1024;
1503 this->bch_geometry.auxiliary_size = 128;
1504 ret = gpmi_alloc_dma_buffer(this);
1505 if (ret)
1506 goto err_out;
1507
1508 ret = nand_scan(mtd, 1);
1509 if (ret) {
1510 pr_err("Chip scan failed\n");
1511 goto err_out;
1512 }
1513
1514 ppdata.of_node = this->pdev->dev.of_node;
1515 ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
1516 if (ret)
1517 goto err_out;
1518 return 0;
1519
1520err_out:
1521 gpmi_nfc_exit(this);
1522 return ret;
1523}
1524
1525static const struct platform_device_id gpmi_ids[] = {
1526 { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },
1527 { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },
1528 { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },
1529 {},
1530};
1531
1532static const struct of_device_id gpmi_nand_id_table[] = {
1533 {
1534 .compatible = "fsl,imx23-gpmi-nand",
1535 .data = (void *)&gpmi_ids[IS_MX23]
1536 }, {
1537 .compatible = "fsl,imx28-gpmi-nand",
1538 .data = (void *)&gpmi_ids[IS_MX28]
1539 }, {
1540 .compatible = "fsl,imx6q-gpmi-nand",
1541 .data = (void *)&gpmi_ids[IS_MX6Q]
1542 }, {}
1543};
1544MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
1545
1546static int __devinit gpmi_nand_probe(struct platform_device *pdev)
1547{
1548 struct gpmi_nand_data *this;
1549 const struct of_device_id *of_id;
1550 int ret;
1551
1552 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
1553 if (of_id) {
1554 pdev->id_entry = of_id->data;
1555 } else {
1556 pr_err("Failed to find the right device id.\n");
1557 return -ENOMEM;
1558 }
1559
1560 this = kzalloc(sizeof(*this), GFP_KERNEL);
1561 if (!this) {
1562 pr_err("Failed to allocate per-device memory\n");
1563 return -ENOMEM;
1564 }
1565
1566 platform_set_drvdata(pdev, this);
1567 this->pdev = pdev;
1568 this->dev = &pdev->dev;
1569
1570 ret = acquire_resources(this);
1571 if (ret)
1572 goto exit_acquire_resources;
1573
1574 ret = init_hardware(this);
1575 if (ret)
1576 goto exit_nfc_init;
1577
1578 ret = gpmi_nfc_init(this);
1579 if (ret)
1580 goto exit_nfc_init;
1581
1582 return 0;
1583
1584exit_nfc_init:
1585 release_resources(this);
1586exit_acquire_resources:
1587 platform_set_drvdata(pdev, NULL);
1588 kfree(this);
1589 return ret;
1590}
1591
1592static int __exit gpmi_nand_remove(struct platform_device *pdev)
1593{
1594 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1595
1596 gpmi_nfc_exit(this);
1597 release_resources(this);
1598 platform_set_drvdata(pdev, NULL);
1599 kfree(this);
1600 return 0;
1601}
1602
1603static struct platform_driver gpmi_nand_driver = {
1604 .driver = {
1605 .name = "gpmi-nand",
1606 .of_match_table = gpmi_nand_id_table,
1607 },
1608 .probe = gpmi_nand_probe,
1609 .remove = __exit_p(gpmi_nand_remove),
1610 .id_table = gpmi_ids,
1611};
1612
1613static int __init gpmi_nand_init(void)
1614{
1615 int err;
1616
1617 err = platform_driver_register(&gpmi_nand_driver);
1618 if (err == 0)
1619 printk(KERN_INFO "GPMI NAND driver registered. (IMX)\n");
1620 else
1621 pr_err("i.MX GPMI NAND driver registration failed\n");
1622 return err;
1623}
1624
1625static void __exit gpmi_nand_exit(void)
1626{
1627 platform_driver_unregister(&gpmi_nand_driver);
1628}
1629
1630module_init(gpmi_nand_init);
1631module_exit(gpmi_nand_exit);
1632
1633MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1634MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1635MODULE_LICENSE("GPL");