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1/*
2 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*
25 * Supports following chips:
26 *
27 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 * as99127f 7 3 0 3 0x31 0x12c3 yes no
29 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33 *
34 */
35
36#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/slab.h>
41#include <linux/jiffies.h>
42#include <linux/i2c.h>
43#include <linux/hwmon.h>
44#include <linux/hwmon-vid.h>
45#include <linux/hwmon-sysfs.h>
46#include <linux/sysfs.h>
47#include <linux/err.h>
48#include <linux/mutex.h>
49
50#ifdef CONFIG_ISA
51#include <linux/platform_device.h>
52#include <linux/ioport.h>
53#include <linux/io.h>
54#endif
55
56#include "lm75.h"
57
58/* Addresses to scan */
59static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
60 0x2e, 0x2f, I2C_CLIENT_END };
61
62enum chips { w83781d, w83782d, w83783s, as99127f };
63
64/* Insmod parameters */
65static unsigned short force_subclients[4];
66module_param_array(force_subclients, short, NULL, 0);
67MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
68 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
69
70static bool reset;
71module_param(reset, bool, 0);
72MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
73
74static bool init = 1;
75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78/* Constants specified below */
79
80/* Length of ISA address segment */
81#define W83781D_EXTENT 8
82
83/* Where are the ISA address/data registers relative to the base address */
84#define W83781D_ADDR_REG_OFFSET 5
85#define W83781D_DATA_REG_OFFSET 6
86
87/* The device registers */
88/* in nr from 0 to 8 */
89#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
90 (0x554 + (((nr) - 7) * 2)))
91#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
92 (0x555 + (((nr) - 7) * 2)))
93#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
94 (0x550 + (nr) - 7))
95
96/* fan nr from 0 to 2 */
97#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
98#define W83781D_REG_FAN(nr) (0x28 + (nr))
99
100#define W83781D_REG_BANK 0x4E
101#define W83781D_REG_TEMP2_CONFIG 0x152
102#define W83781D_REG_TEMP3_CONFIG 0x252
103/* temp nr from 1 to 3 */
104#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
105 ((nr == 2) ? (0x0150) : \
106 (0x27)))
107#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
108 ((nr == 2) ? (0x153) : \
109 (0x3A)))
110#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
111 ((nr == 2) ? (0x155) : \
112 (0x39)))
113
114#define W83781D_REG_CONFIG 0x40
115
116/* Interrupt status (W83781D, AS99127F) */
117#define W83781D_REG_ALARM1 0x41
118#define W83781D_REG_ALARM2 0x42
119
120/* Real-time status (W83782D, W83783S) */
121#define W83782D_REG_ALARM1 0x459
122#define W83782D_REG_ALARM2 0x45A
123#define W83782D_REG_ALARM3 0x45B
124
125#define W83781D_REG_BEEP_CONFIG 0x4D
126#define W83781D_REG_BEEP_INTS1 0x56
127#define W83781D_REG_BEEP_INTS2 0x57
128#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
129
130#define W83781D_REG_VID_FANDIV 0x47
131
132#define W83781D_REG_CHIPID 0x49
133#define W83781D_REG_WCHIPID 0x58
134#define W83781D_REG_CHIPMAN 0x4F
135#define W83781D_REG_PIN 0x4B
136
137/* 782D/783S only */
138#define W83781D_REG_VBAT 0x5D
139
140/* PWM 782D (1-4) and 783S (1-2) only */
141static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
142#define W83781D_REG_PWMCLK12 0x5C
143#define W83781D_REG_PWMCLK34 0x45C
144
145#define W83781D_REG_I2C_ADDR 0x48
146#define W83781D_REG_I2C_SUBADDR 0x4A
147
148/*
149 * The following are undocumented in the data sheets however we
150 * received the information in an email from Winbond tech support
151 */
152/* Sensor selection - not on 781d */
153#define W83781D_REG_SCFG1 0x5D
154static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
155
156#define W83781D_REG_SCFG2 0x59
157static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
158
159#define W83781D_DEFAULT_BETA 3435
160
161/* Conversions */
162#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
163#define IN_FROM_REG(val) ((val) * 16)
164
165static inline u8
166FAN_TO_REG(long rpm, int div)
167{
168 if (rpm == 0)
169 return 255;
170 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
171 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
172}
173
174static inline long
175FAN_FROM_REG(u8 val, int div)
176{
177 if (val == 0)
178 return -1;
179 if (val == 255)
180 return 0;
181 return 1350000 / (val * div);
182}
183
184#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
185#define TEMP_FROM_REG(val) ((val) * 1000)
186
187#define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
188 (~(val)) & 0x7fff : (val) & 0xff7fff)
189#define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
190 (~(val)) & 0x7fff : (val) & 0xff7fff)
191
192#define DIV_FROM_REG(val) (1 << (val))
193
194static inline u8
195DIV_TO_REG(long val, enum chips type)
196{
197 int i;
198 val = SENSORS_LIMIT(val, 1,
199 ((type == w83781d
200 || type == as99127f) ? 8 : 128)) >> 1;
201 for (i = 0; i < 7; i++) {
202 if (val == 0)
203 break;
204 val >>= 1;
205 }
206 return i;
207}
208
209struct w83781d_data {
210 struct i2c_client *client;
211 struct device *hwmon_dev;
212 struct mutex lock;
213 enum chips type;
214
215 /* For ISA device only */
216 const char *name;
217 int isa_addr;
218
219 struct mutex update_lock;
220 char valid; /* !=0 if following fields are valid */
221 unsigned long last_updated; /* In jiffies */
222
223 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
224 /* array of 2 pointers to subclients */
225
226 u8 in[9]; /* Register value - 8 & 9 for 782D only */
227 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
228 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
229 u8 fan[3]; /* Register value */
230 u8 fan_min[3]; /* Register value */
231 s8 temp; /* Register value */
232 s8 temp_max; /* Register value */
233 s8 temp_max_hyst; /* Register value */
234 u16 temp_add[2]; /* Register value */
235 u16 temp_max_add[2]; /* Register value */
236 u16 temp_max_hyst_add[2]; /* Register value */
237 u8 fan_div[3]; /* Register encoding, shifted right */
238 u8 vid; /* Register encoding, combined */
239 u32 alarms; /* Register encoding, combined */
240 u32 beep_mask; /* Register encoding, combined */
241 u8 pwm[4]; /* Register value */
242 u8 pwm2_enable; /* Boolean */
243 u16 sens[3]; /*
244 * 782D/783S only.
245 * 1 = pentium diode; 2 = 3904 diode;
246 * 4 = thermistor
247 */
248 u8 vrm;
249};
250
251static struct w83781d_data *w83781d_data_if_isa(void);
252static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
253
254static int w83781d_read_value(struct w83781d_data *data, u16 reg);
255static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
256static struct w83781d_data *w83781d_update_device(struct device *dev);
257static void w83781d_init_device(struct device *dev);
258
259/* following are the sysfs callback functions */
260#define show_in_reg(reg) \
261static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
262 char *buf) \
263{ \
264 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
265 struct w83781d_data *data = w83781d_update_device(dev); \
266 return sprintf(buf, "%ld\n", \
267 (long)IN_FROM_REG(data->reg[attr->index])); \
268}
269show_in_reg(in);
270show_in_reg(in_min);
271show_in_reg(in_max);
272
273#define store_in_reg(REG, reg) \
274static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
275 *da, const char *buf, size_t count) \
276{ \
277 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
278 struct w83781d_data *data = dev_get_drvdata(dev); \
279 int nr = attr->index; \
280 unsigned long val; \
281 int err = kstrtoul(buf, 10, &val); \
282 if (err) \
283 return err; \
284 mutex_lock(&data->update_lock); \
285 data->in_##reg[nr] = IN_TO_REG(val); \
286 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
287 data->in_##reg[nr]); \
288 \
289 mutex_unlock(&data->update_lock); \
290 return count; \
291}
292store_in_reg(MIN, min);
293store_in_reg(MAX, max);
294
295#define sysfs_in_offsets(offset) \
296static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
297 show_in, NULL, offset); \
298static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
299 show_in_min, store_in_min, offset); \
300static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
301 show_in_max, store_in_max, offset)
302
303sysfs_in_offsets(0);
304sysfs_in_offsets(1);
305sysfs_in_offsets(2);
306sysfs_in_offsets(3);
307sysfs_in_offsets(4);
308sysfs_in_offsets(5);
309sysfs_in_offsets(6);
310sysfs_in_offsets(7);
311sysfs_in_offsets(8);
312
313#define show_fan_reg(reg) \
314static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
315 char *buf) \
316{ \
317 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
318 struct w83781d_data *data = w83781d_update_device(dev); \
319 return sprintf(buf, "%ld\n", \
320 FAN_FROM_REG(data->reg[attr->index], \
321 DIV_FROM_REG(data->fan_div[attr->index]))); \
322}
323show_fan_reg(fan);
324show_fan_reg(fan_min);
325
326static ssize_t
327store_fan_min(struct device *dev, struct device_attribute *da,
328 const char *buf, size_t count)
329{
330 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
331 struct w83781d_data *data = dev_get_drvdata(dev);
332 int nr = attr->index;
333 unsigned long val;
334 int err;
335
336 err = kstrtoul(buf, 10, &val);
337 if (err)
338 return err;
339
340 mutex_lock(&data->update_lock);
341 data->fan_min[nr] =
342 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
343 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
344 data->fan_min[nr]);
345
346 mutex_unlock(&data->update_lock);
347 return count;
348}
349
350static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
351static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
352 show_fan_min, store_fan_min, 0);
353static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
354static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
355 show_fan_min, store_fan_min, 1);
356static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
357static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
358 show_fan_min, store_fan_min, 2);
359
360#define show_temp_reg(reg) \
361static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
362 char *buf) \
363{ \
364 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
365 struct w83781d_data *data = w83781d_update_device(dev); \
366 int nr = attr->index; \
367 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
368 return sprintf(buf, "%d\n", \
369 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
370 } else { /* TEMP1 */ \
371 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
372 } \
373}
374show_temp_reg(temp);
375show_temp_reg(temp_max);
376show_temp_reg(temp_max_hyst);
377
378#define store_temp_reg(REG, reg) \
379static ssize_t store_temp_##reg(struct device *dev, \
380 struct device_attribute *da, const char *buf, size_t count) \
381{ \
382 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
383 struct w83781d_data *data = dev_get_drvdata(dev); \
384 int nr = attr->index; \
385 long val; \
386 int err = kstrtol(buf, 10, &val); \
387 if (err) \
388 return err; \
389 mutex_lock(&data->update_lock); \
390 \
391 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
392 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
393 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
394 data->temp_##reg##_add[nr-2]); \
395 } else { /* TEMP1 */ \
396 data->temp_##reg = TEMP_TO_REG(val); \
397 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
398 data->temp_##reg); \
399 } \
400 \
401 mutex_unlock(&data->update_lock); \
402 return count; \
403}
404store_temp_reg(OVER, max);
405store_temp_reg(HYST, max_hyst);
406
407#define sysfs_temp_offsets(offset) \
408static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
409 show_temp, NULL, offset); \
410static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
411 show_temp_max, store_temp_max, offset); \
412static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
413 show_temp_max_hyst, store_temp_max_hyst, offset);
414
415sysfs_temp_offsets(1);
416sysfs_temp_offsets(2);
417sysfs_temp_offsets(3);
418
419static ssize_t
420show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
421{
422 struct w83781d_data *data = w83781d_update_device(dev);
423 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
424}
425
426static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
427
428static ssize_t
429show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
430{
431 struct w83781d_data *data = dev_get_drvdata(dev);
432 return sprintf(buf, "%ld\n", (long) data->vrm);
433}
434
435static ssize_t
436store_vrm_reg(struct device *dev, struct device_attribute *attr,
437 const char *buf, size_t count)
438{
439 struct w83781d_data *data = dev_get_drvdata(dev);
440 unsigned long val;
441 int err;
442
443 err = kstrtoul(buf, 10, &val);
444 if (err)
445 return err;
446 data->vrm = SENSORS_LIMIT(val, 0, 255);
447
448 return count;
449}
450
451static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
452
453static ssize_t
454show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
455{
456 struct w83781d_data *data = w83781d_update_device(dev);
457 return sprintf(buf, "%u\n", data->alarms);
458}
459
460static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
461
462static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
463 char *buf)
464{
465 struct w83781d_data *data = w83781d_update_device(dev);
466 int bitnr = to_sensor_dev_attr(attr)->index;
467 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
468}
469
470/* The W83781D has a single alarm bit for temp2 and temp3 */
471static ssize_t show_temp3_alarm(struct device *dev,
472 struct device_attribute *attr, char *buf)
473{
474 struct w83781d_data *data = w83781d_update_device(dev);
475 int bitnr = (data->type == w83781d) ? 5 : 13;
476 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
477}
478
479static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
480static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
481static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
482static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
483static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
484static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
485static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
486static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
487static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
488static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
489static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
490static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
491static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
492static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
493static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
494
495static ssize_t show_beep_mask(struct device *dev,
496 struct device_attribute *attr, char *buf)
497{
498 struct w83781d_data *data = w83781d_update_device(dev);
499 return sprintf(buf, "%ld\n",
500 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
501}
502
503static ssize_t
504store_beep_mask(struct device *dev, struct device_attribute *attr,
505 const char *buf, size_t count)
506{
507 struct w83781d_data *data = dev_get_drvdata(dev);
508 unsigned long val;
509 int err;
510
511 err = kstrtoul(buf, 10, &val);
512 if (err)
513 return err;
514
515 mutex_lock(&data->update_lock);
516 data->beep_mask &= 0x8000; /* preserve beep enable */
517 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
518 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
519 data->beep_mask & 0xff);
520 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
521 (data->beep_mask >> 8) & 0xff);
522 if (data->type != w83781d && data->type != as99127f) {
523 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
524 ((data->beep_mask) >> 16) & 0xff);
525 }
526 mutex_unlock(&data->update_lock);
527
528 return count;
529}
530
531static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
532 show_beep_mask, store_beep_mask);
533
534static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
535 char *buf)
536{
537 struct w83781d_data *data = w83781d_update_device(dev);
538 int bitnr = to_sensor_dev_attr(attr)->index;
539 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
540}
541
542static ssize_t
543store_beep(struct device *dev, struct device_attribute *attr,
544 const char *buf, size_t count)
545{
546 struct w83781d_data *data = dev_get_drvdata(dev);
547 int bitnr = to_sensor_dev_attr(attr)->index;
548 u8 reg;
549 unsigned long bit;
550 int err;
551
552 err = kstrtoul(buf, 10, &bit);
553 if (err)
554 return err;
555
556 if (bit & ~1)
557 return -EINVAL;
558
559 mutex_lock(&data->update_lock);
560 if (bit)
561 data->beep_mask |= (1 << bitnr);
562 else
563 data->beep_mask &= ~(1 << bitnr);
564
565 if (bitnr < 8) {
566 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
567 if (bit)
568 reg |= (1 << bitnr);
569 else
570 reg &= ~(1 << bitnr);
571 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
572 } else if (bitnr < 16) {
573 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
574 if (bit)
575 reg |= (1 << (bitnr - 8));
576 else
577 reg &= ~(1 << (bitnr - 8));
578 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
579 } else {
580 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
581 if (bit)
582 reg |= (1 << (bitnr - 16));
583 else
584 reg &= ~(1 << (bitnr - 16));
585 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
586 }
587 mutex_unlock(&data->update_lock);
588
589 return count;
590}
591
592/* The W83781D has a single beep bit for temp2 and temp3 */
593static ssize_t show_temp3_beep(struct device *dev,
594 struct device_attribute *attr, char *buf)
595{
596 struct w83781d_data *data = w83781d_update_device(dev);
597 int bitnr = (data->type == w83781d) ? 5 : 13;
598 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
599}
600
601static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 0);
603static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
604 show_beep, store_beep, 1);
605static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 2);
607static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
608 show_beep, store_beep, 3);
609static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
610 show_beep, store_beep, 8);
611static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
612 show_beep, store_beep, 9);
613static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
614 show_beep, store_beep, 10);
615static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
616 show_beep, store_beep, 16);
617static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
618 show_beep, store_beep, 17);
619static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
620 show_beep, store_beep, 6);
621static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
622 show_beep, store_beep, 7);
623static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
624 show_beep, store_beep, 11);
625static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
626 show_beep, store_beep, 4);
627static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
628 show_beep, store_beep, 5);
629static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
630 show_temp3_beep, store_beep, 13);
631static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
632 show_beep, store_beep, 15);
633
634static ssize_t
635show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
636{
637 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
638 struct w83781d_data *data = w83781d_update_device(dev);
639 return sprintf(buf, "%ld\n",
640 (long) DIV_FROM_REG(data->fan_div[attr->index]));
641}
642
643/*
644 * Note: we save and restore the fan minimum here, because its value is
645 * determined in part by the fan divisor. This follows the principle of
646 * least surprise; the user doesn't expect the fan minimum to change just
647 * because the divisor changed.
648 */
649static ssize_t
650store_fan_div(struct device *dev, struct device_attribute *da,
651 const char *buf, size_t count)
652{
653 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
654 struct w83781d_data *data = dev_get_drvdata(dev);
655 unsigned long min;
656 int nr = attr->index;
657 u8 reg;
658 unsigned long val;
659 int err;
660
661 err = kstrtoul(buf, 10, &val);
662 if (err)
663 return err;
664
665 mutex_lock(&data->update_lock);
666
667 /* Save fan_min */
668 min = FAN_FROM_REG(data->fan_min[nr],
669 DIV_FROM_REG(data->fan_div[nr]));
670
671 data->fan_div[nr] = DIV_TO_REG(val, data->type);
672
673 reg = (w83781d_read_value(data, nr == 2 ?
674 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
675 & (nr == 0 ? 0xcf : 0x3f))
676 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
677 w83781d_write_value(data, nr == 2 ?
678 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
679
680 /* w83781d and as99127f don't have extended divisor bits */
681 if (data->type != w83781d && data->type != as99127f) {
682 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
683 & ~(1 << (5 + nr)))
684 | ((data->fan_div[nr] & 0x04) << (3 + nr));
685 w83781d_write_value(data, W83781D_REG_VBAT, reg);
686 }
687
688 /* Restore fan_min */
689 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
690 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
691
692 mutex_unlock(&data->update_lock);
693 return count;
694}
695
696static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
697 show_fan_div, store_fan_div, 0);
698static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
699 show_fan_div, store_fan_div, 1);
700static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
701 show_fan_div, store_fan_div, 2);
702
703static ssize_t
704show_pwm(struct device *dev, struct device_attribute *da, char *buf)
705{
706 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
707 struct w83781d_data *data = w83781d_update_device(dev);
708 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
709}
710
711static ssize_t
712show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
713{
714 struct w83781d_data *data = w83781d_update_device(dev);
715 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
716}
717
718static ssize_t
719store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
720 size_t count)
721{
722 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
723 struct w83781d_data *data = dev_get_drvdata(dev);
724 int nr = attr->index;
725 unsigned long val;
726 int err;
727
728 err = kstrtoul(buf, 10, &val);
729 if (err)
730 return err;
731
732 mutex_lock(&data->update_lock);
733 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
734 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
735 mutex_unlock(&data->update_lock);
736 return count;
737}
738
739static ssize_t
740store_pwm2_enable(struct device *dev, struct device_attribute *da,
741 const char *buf, size_t count)
742{
743 struct w83781d_data *data = dev_get_drvdata(dev);
744 unsigned long val;
745 u32 reg;
746 int err;
747
748 err = kstrtoul(buf, 10, &val);
749 if (err)
750 return err;
751
752 mutex_lock(&data->update_lock);
753
754 switch (val) {
755 case 0:
756 case 1:
757 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
758 w83781d_write_value(data, W83781D_REG_PWMCLK12,
759 (reg & 0xf7) | (val << 3));
760
761 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
762 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
763 (reg & 0xef) | (!val << 4));
764
765 data->pwm2_enable = val;
766 break;
767
768 default:
769 mutex_unlock(&data->update_lock);
770 return -EINVAL;
771 }
772
773 mutex_unlock(&data->update_lock);
774 return count;
775}
776
777static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
778static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
779static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
780static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
781/* only PWM2 can be enabled/disabled */
782static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
783 show_pwm2_enable, store_pwm2_enable);
784
785static ssize_t
786show_sensor(struct device *dev, struct device_attribute *da, char *buf)
787{
788 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
789 struct w83781d_data *data = w83781d_update_device(dev);
790 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
791}
792
793static ssize_t
794store_sensor(struct device *dev, struct device_attribute *da,
795 const char *buf, size_t count)
796{
797 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
798 struct w83781d_data *data = dev_get_drvdata(dev);
799 int nr = attr->index;
800 unsigned long val;
801 u32 tmp;
802 int err;
803
804 err = kstrtoul(buf, 10, &val);
805 if (err)
806 return err;
807
808 mutex_lock(&data->update_lock);
809
810 switch (val) {
811 case 1: /* PII/Celeron diode */
812 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
813 w83781d_write_value(data, W83781D_REG_SCFG1,
814 tmp | BIT_SCFG1[nr]);
815 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
816 w83781d_write_value(data, W83781D_REG_SCFG2,
817 tmp | BIT_SCFG2[nr]);
818 data->sens[nr] = val;
819 break;
820 case 2: /* 3904 */
821 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
822 w83781d_write_value(data, W83781D_REG_SCFG1,
823 tmp | BIT_SCFG1[nr]);
824 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
825 w83781d_write_value(data, W83781D_REG_SCFG2,
826 tmp & ~BIT_SCFG2[nr]);
827 data->sens[nr] = val;
828 break;
829 case W83781D_DEFAULT_BETA:
830 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
831 "instead\n", W83781D_DEFAULT_BETA);
832 /* fall through */
833 case 4: /* thermistor */
834 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
835 w83781d_write_value(data, W83781D_REG_SCFG1,
836 tmp & ~BIT_SCFG1[nr]);
837 data->sens[nr] = val;
838 break;
839 default:
840 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
841 (long) val);
842 break;
843 }
844
845 mutex_unlock(&data->update_lock);
846 return count;
847}
848
849static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
850 show_sensor, store_sensor, 0);
851static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
852 show_sensor, store_sensor, 1);
853static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
854 show_sensor, store_sensor, 2);
855
856/*
857 * Assumes that adapter is of I2C, not ISA variety.
858 * OTHERWISE DON'T CALL THIS
859 */
860static int
861w83781d_detect_subclients(struct i2c_client *new_client)
862{
863 int i, val1 = 0, id;
864 int err;
865 int address = new_client->addr;
866 unsigned short sc_addr[2];
867 struct i2c_adapter *adapter = new_client->adapter;
868 struct w83781d_data *data = i2c_get_clientdata(new_client);
869 enum chips kind = data->type;
870
871 id = i2c_adapter_id(adapter);
872
873 if (force_subclients[0] == id && force_subclients[1] == address) {
874 for (i = 2; i <= 3; i++) {
875 if (force_subclients[i] < 0x48 ||
876 force_subclients[i] > 0x4f) {
877 dev_err(&new_client->dev, "Invalid subclient "
878 "address %d; must be 0x48-0x4f\n",
879 force_subclients[i]);
880 err = -EINVAL;
881 goto ERROR_SC_1;
882 }
883 }
884 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
885 (force_subclients[2] & 0x07) |
886 ((force_subclients[3] & 0x07) << 4));
887 sc_addr[0] = force_subclients[2];
888 } else {
889 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
890 sc_addr[0] = 0x48 + (val1 & 0x07);
891 }
892
893 if (kind != w83783s) {
894 if (force_subclients[0] == id &&
895 force_subclients[1] == address) {
896 sc_addr[1] = force_subclients[3];
897 } else {
898 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
899 }
900 if (sc_addr[0] == sc_addr[1]) {
901 dev_err(&new_client->dev,
902 "Duplicate addresses 0x%x for subclients.\n",
903 sc_addr[0]);
904 err = -EBUSY;
905 goto ERROR_SC_2;
906 }
907 }
908
909 for (i = 0; i <= 1; i++) {
910 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
911 if (!data->lm75[i]) {
912 dev_err(&new_client->dev, "Subclient %d "
913 "registration at address 0x%x "
914 "failed.\n", i, sc_addr[i]);
915 err = -ENOMEM;
916 if (i == 1)
917 goto ERROR_SC_3;
918 goto ERROR_SC_2;
919 }
920 if (kind == w83783s)
921 break;
922 }
923
924 return 0;
925
926/* Undo inits in case of errors */
927ERROR_SC_3:
928 i2c_unregister_device(data->lm75[0]);
929ERROR_SC_2:
930ERROR_SC_1:
931 return err;
932}
933
934#define IN_UNIT_ATTRS(X) \
935 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
936 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
937 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
938 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
939 &sensor_dev_attr_in##X##_beep.dev_attr.attr
940
941#define FAN_UNIT_ATTRS(X) \
942 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
943 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
944 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
945 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
946 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
947
948#define TEMP_UNIT_ATTRS(X) \
949 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
950 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
951 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
952 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
953 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
954
955static struct attribute *w83781d_attributes[] = {
956 IN_UNIT_ATTRS(0),
957 IN_UNIT_ATTRS(2),
958 IN_UNIT_ATTRS(3),
959 IN_UNIT_ATTRS(4),
960 IN_UNIT_ATTRS(5),
961 IN_UNIT_ATTRS(6),
962 FAN_UNIT_ATTRS(1),
963 FAN_UNIT_ATTRS(2),
964 FAN_UNIT_ATTRS(3),
965 TEMP_UNIT_ATTRS(1),
966 TEMP_UNIT_ATTRS(2),
967 &dev_attr_cpu0_vid.attr,
968 &dev_attr_vrm.attr,
969 &dev_attr_alarms.attr,
970 &dev_attr_beep_mask.attr,
971 &sensor_dev_attr_beep_enable.dev_attr.attr,
972 NULL
973};
974static const struct attribute_group w83781d_group = {
975 .attrs = w83781d_attributes,
976};
977
978static struct attribute *w83781d_attributes_in1[] = {
979 IN_UNIT_ATTRS(1),
980 NULL
981};
982static const struct attribute_group w83781d_group_in1 = {
983 .attrs = w83781d_attributes_in1,
984};
985
986static struct attribute *w83781d_attributes_in78[] = {
987 IN_UNIT_ATTRS(7),
988 IN_UNIT_ATTRS(8),
989 NULL
990};
991static const struct attribute_group w83781d_group_in78 = {
992 .attrs = w83781d_attributes_in78,
993};
994
995static struct attribute *w83781d_attributes_temp3[] = {
996 TEMP_UNIT_ATTRS(3),
997 NULL
998};
999static const struct attribute_group w83781d_group_temp3 = {
1000 .attrs = w83781d_attributes_temp3,
1001};
1002
1003static struct attribute *w83781d_attributes_pwm12[] = {
1004 &sensor_dev_attr_pwm1.dev_attr.attr,
1005 &sensor_dev_attr_pwm2.dev_attr.attr,
1006 &dev_attr_pwm2_enable.attr,
1007 NULL
1008};
1009static const struct attribute_group w83781d_group_pwm12 = {
1010 .attrs = w83781d_attributes_pwm12,
1011};
1012
1013static struct attribute *w83781d_attributes_pwm34[] = {
1014 &sensor_dev_attr_pwm3.dev_attr.attr,
1015 &sensor_dev_attr_pwm4.dev_attr.attr,
1016 NULL
1017};
1018static const struct attribute_group w83781d_group_pwm34 = {
1019 .attrs = w83781d_attributes_pwm34,
1020};
1021
1022static struct attribute *w83781d_attributes_other[] = {
1023 &sensor_dev_attr_temp1_type.dev_attr.attr,
1024 &sensor_dev_attr_temp2_type.dev_attr.attr,
1025 &sensor_dev_attr_temp3_type.dev_attr.attr,
1026 NULL
1027};
1028static const struct attribute_group w83781d_group_other = {
1029 .attrs = w83781d_attributes_other,
1030};
1031
1032/* No clean up is done on error, it's up to the caller */
1033static int
1034w83781d_create_files(struct device *dev, int kind, int is_isa)
1035{
1036 int err;
1037
1038 err = sysfs_create_group(&dev->kobj, &w83781d_group);
1039 if (err)
1040 return err;
1041
1042 if (kind != w83783s) {
1043 err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
1044 if (err)
1045 return err;
1046 }
1047 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1048 err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
1049 if (err)
1050 return err;
1051 }
1052 if (kind != w83783s) {
1053 err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
1054 if (err)
1055 return err;
1056
1057 if (kind != w83781d) {
1058 err = sysfs_chmod_file(&dev->kobj,
1059 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1060 S_IRUGO | S_IWUSR);
1061 if (err)
1062 return err;
1063 }
1064 }
1065
1066 if (kind != w83781d && kind != as99127f) {
1067 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
1068 if (err)
1069 return err;
1070 }
1071 if (kind == w83782d && !is_isa) {
1072 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
1073 if (err)
1074 return err;
1075 }
1076
1077 if (kind != as99127f && kind != w83781d) {
1078 err = device_create_file(dev,
1079 &sensor_dev_attr_temp1_type.dev_attr);
1080 if (err)
1081 return err;
1082 err = device_create_file(dev,
1083 &sensor_dev_attr_temp2_type.dev_attr);
1084 if (err)
1085 return err;
1086 if (kind != w83783s) {
1087 err = device_create_file(dev,
1088 &sensor_dev_attr_temp3_type.dev_attr);
1089 if (err)
1090 return err;
1091 }
1092 }
1093
1094 return 0;
1095}
1096
1097/* Return 0 if detection is successful, -ENODEV otherwise */
1098static int
1099w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
1100{
1101 int val1, val2;
1102 struct w83781d_data *isa = w83781d_data_if_isa();
1103 struct i2c_adapter *adapter = client->adapter;
1104 int address = client->addr;
1105 const char *client_name;
1106 enum vendor { winbond, asus } vendid;
1107
1108 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1109 return -ENODEV;
1110
1111 /*
1112 * We block updates of the ISA device to minimize the risk of
1113 * concurrent access to the same W83781D chip through different
1114 * interfaces.
1115 */
1116 if (isa)
1117 mutex_lock(&isa->update_lock);
1118
1119 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1120 dev_dbg(&adapter->dev,
1121 "Detection of w83781d chip failed at step 3\n");
1122 goto err_nodev;
1123 }
1124
1125 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1126 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1127 /* Check for Winbond or Asus ID if in bank 0 */
1128 if (!(val1 & 0x07) &&
1129 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1130 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1131 dev_dbg(&adapter->dev,
1132 "Detection of w83781d chip failed at step 4\n");
1133 goto err_nodev;
1134 }
1135 /*
1136 * If Winbond SMBus, check address at 0x48.
1137 * Asus doesn't support, except for as99127f rev.2
1138 */
1139 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1140 ((val1 & 0x80) && val2 == 0x5c)) {
1141 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1142 != address) {
1143 dev_dbg(&adapter->dev,
1144 "Detection of w83781d chip failed at step 5\n");
1145 goto err_nodev;
1146 }
1147 }
1148
1149 /* Put it now into bank 0 and Vendor ID High Byte */
1150 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1151 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1152 & 0x78) | 0x80);
1153
1154 /* Get the vendor ID */
1155 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1156 if (val2 == 0x5c)
1157 vendid = winbond;
1158 else if (val2 == 0x12)
1159 vendid = asus;
1160 else {
1161 dev_dbg(&adapter->dev,
1162 "w83781d chip vendor is neither Winbond nor Asus\n");
1163 goto err_nodev;
1164 }
1165
1166 /* Determine the chip type. */
1167 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1168 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1169 client_name = "w83781d";
1170 else if (val1 == 0x30 && vendid == winbond)
1171 client_name = "w83782d";
1172 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1173 client_name = "w83783s";
1174 else if (val1 == 0x31)
1175 client_name = "as99127f";
1176 else
1177 goto err_nodev;
1178
1179 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1180 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1181 "be the same as ISA device\n", address);
1182 goto err_nodev;
1183 }
1184
1185 if (isa)
1186 mutex_unlock(&isa->update_lock);
1187
1188 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1189
1190 return 0;
1191
1192 err_nodev:
1193 if (isa)
1194 mutex_unlock(&isa->update_lock);
1195 return -ENODEV;
1196}
1197
1198static void w83781d_remove_files(struct device *dev)
1199{
1200 sysfs_remove_group(&dev->kobj, &w83781d_group);
1201 sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
1202 sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
1203 sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
1204 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
1205 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
1206 sysfs_remove_group(&dev->kobj, &w83781d_group_other);
1207}
1208
1209static int
1210w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1211{
1212 struct device *dev = &client->dev;
1213 struct w83781d_data *data;
1214 int err;
1215
1216 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1217 if (!data) {
1218 err = -ENOMEM;
1219 goto ERROR1;
1220 }
1221
1222 i2c_set_clientdata(client, data);
1223 mutex_init(&data->lock);
1224 mutex_init(&data->update_lock);
1225
1226 data->type = id->driver_data;
1227 data->client = client;
1228
1229 /* attach secondary i2c lm75-like clients */
1230 err = w83781d_detect_subclients(client);
1231 if (err)
1232 goto ERROR3;
1233
1234 /* Initialize the chip */
1235 w83781d_init_device(dev);
1236
1237 /* Register sysfs hooks */
1238 err = w83781d_create_files(dev, data->type, 0);
1239 if (err)
1240 goto ERROR4;
1241
1242 data->hwmon_dev = hwmon_device_register(dev);
1243 if (IS_ERR(data->hwmon_dev)) {
1244 err = PTR_ERR(data->hwmon_dev);
1245 goto ERROR4;
1246 }
1247
1248 return 0;
1249
1250ERROR4:
1251 w83781d_remove_files(dev);
1252 if (data->lm75[0])
1253 i2c_unregister_device(data->lm75[0]);
1254 if (data->lm75[1])
1255 i2c_unregister_device(data->lm75[1]);
1256ERROR3:
1257 kfree(data);
1258ERROR1:
1259 return err;
1260}
1261
1262static int
1263w83781d_remove(struct i2c_client *client)
1264{
1265 struct w83781d_data *data = i2c_get_clientdata(client);
1266 struct device *dev = &client->dev;
1267
1268 hwmon_device_unregister(data->hwmon_dev);
1269 w83781d_remove_files(dev);
1270
1271 if (data->lm75[0])
1272 i2c_unregister_device(data->lm75[0]);
1273 if (data->lm75[1])
1274 i2c_unregister_device(data->lm75[1]);
1275
1276 kfree(data);
1277
1278 return 0;
1279}
1280
1281static int
1282w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1283{
1284 struct i2c_client *client = data->client;
1285 int res, bank;
1286 struct i2c_client *cl;
1287
1288 bank = (reg >> 8) & 0x0f;
1289 if (bank > 2)
1290 /* switch banks */
1291 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1292 bank);
1293 if (bank == 0 || bank > 2) {
1294 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1295 } else {
1296 /* switch to subclient */
1297 cl = data->lm75[bank - 1];
1298 /* convert from ISA to LM75 I2C addresses */
1299 switch (reg & 0xff) {
1300 case 0x50: /* TEMP */
1301 res = i2c_smbus_read_word_swapped(cl, 0);
1302 break;
1303 case 0x52: /* CONFIG */
1304 res = i2c_smbus_read_byte_data(cl, 1);
1305 break;
1306 case 0x53: /* HYST */
1307 res = i2c_smbus_read_word_swapped(cl, 2);
1308 break;
1309 case 0x55: /* OVER */
1310 default:
1311 res = i2c_smbus_read_word_swapped(cl, 3);
1312 break;
1313 }
1314 }
1315 if (bank > 2)
1316 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1317
1318 return res;
1319}
1320
1321static int
1322w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1323{
1324 struct i2c_client *client = data->client;
1325 int bank;
1326 struct i2c_client *cl;
1327
1328 bank = (reg >> 8) & 0x0f;
1329 if (bank > 2)
1330 /* switch banks */
1331 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1332 bank);
1333 if (bank == 0 || bank > 2) {
1334 i2c_smbus_write_byte_data(client, reg & 0xff,
1335 value & 0xff);
1336 } else {
1337 /* switch to subclient */
1338 cl = data->lm75[bank - 1];
1339 /* convert from ISA to LM75 I2C addresses */
1340 switch (reg & 0xff) {
1341 case 0x52: /* CONFIG */
1342 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1343 break;
1344 case 0x53: /* HYST */
1345 i2c_smbus_write_word_swapped(cl, 2, value);
1346 break;
1347 case 0x55: /* OVER */
1348 i2c_smbus_write_word_swapped(cl, 3, value);
1349 break;
1350 }
1351 }
1352 if (bank > 2)
1353 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1354
1355 return 0;
1356}
1357
1358static void
1359w83781d_init_device(struct device *dev)
1360{
1361 struct w83781d_data *data = dev_get_drvdata(dev);
1362 int i, p;
1363 int type = data->type;
1364 u8 tmp;
1365
1366 if (reset && type != as99127f) { /*
1367 * this resets registers we don't have
1368 * documentation for on the as99127f
1369 */
1370 /*
1371 * Resetting the chip has been the default for a long time,
1372 * but it causes the BIOS initializations (fan clock dividers,
1373 * thermal sensor types...) to be lost, so it is now optional.
1374 * It might even go away if nobody reports it as being useful,
1375 * as I see very little reason why this would be needed at
1376 * all.
1377 */
1378 dev_info(dev, "If reset=1 solved a problem you were "
1379 "having, please report!\n");
1380
1381 /* save these registers */
1382 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1383 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1384 /*
1385 * Reset all except Watchdog values and last conversion values
1386 * This sets fan-divs to 2, among others
1387 */
1388 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1389 /*
1390 * Restore the registers and disable power-on abnormal beep.
1391 * This saves FAN 1/2/3 input/output values set by BIOS.
1392 */
1393 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1394 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1395 /*
1396 * Disable master beep-enable (reset turns it on).
1397 * Individual beep_mask should be reset to off but for some
1398 * reason disabling this bit helps some people not get beeped
1399 */
1400 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1401 }
1402
1403 /*
1404 * Disable power-on abnormal beep, as advised by the datasheet.
1405 * Already done if reset=1.
1406 */
1407 if (init && !reset && type != as99127f) {
1408 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1409 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1410 }
1411
1412 data->vrm = vid_which_vrm();
1413
1414 if ((type != w83781d) && (type != as99127f)) {
1415 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1416 for (i = 1; i <= 3; i++) {
1417 if (!(tmp & BIT_SCFG1[i - 1])) {
1418 data->sens[i - 1] = 4;
1419 } else {
1420 if (w83781d_read_value
1421 (data,
1422 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1423 data->sens[i - 1] = 1;
1424 else
1425 data->sens[i - 1] = 2;
1426 }
1427 if (type == w83783s && i == 2)
1428 break;
1429 }
1430 }
1431
1432 if (init && type != as99127f) {
1433 /* Enable temp2 */
1434 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1435 if (tmp & 0x01) {
1436 dev_warn(dev, "Enabling temp2, readings "
1437 "might not make sense\n");
1438 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1439 tmp & 0xfe);
1440 }
1441
1442 /* Enable temp3 */
1443 if (type != w83783s) {
1444 tmp = w83781d_read_value(data,
1445 W83781D_REG_TEMP3_CONFIG);
1446 if (tmp & 0x01) {
1447 dev_warn(dev, "Enabling temp3, "
1448 "readings might not make sense\n");
1449 w83781d_write_value(data,
1450 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1451 }
1452 }
1453 }
1454
1455 /* Start monitoring */
1456 w83781d_write_value(data, W83781D_REG_CONFIG,
1457 (w83781d_read_value(data,
1458 W83781D_REG_CONFIG) & 0xf7)
1459 | 0x01);
1460
1461 /* A few vars need to be filled upon startup */
1462 for (i = 0; i < 3; i++) {
1463 data->fan_min[i] = w83781d_read_value(data,
1464 W83781D_REG_FAN_MIN(i));
1465 }
1466
1467 mutex_init(&data->update_lock);
1468}
1469
1470static struct w83781d_data *w83781d_update_device(struct device *dev)
1471{
1472 struct w83781d_data *data = dev_get_drvdata(dev);
1473 struct i2c_client *client = data->client;
1474 int i;
1475
1476 mutex_lock(&data->update_lock);
1477
1478 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1479 || !data->valid) {
1480 dev_dbg(dev, "Starting device update\n");
1481
1482 for (i = 0; i <= 8; i++) {
1483 if (data->type == w83783s && i == 1)
1484 continue; /* 783S has no in1 */
1485 data->in[i] =
1486 w83781d_read_value(data, W83781D_REG_IN(i));
1487 data->in_min[i] =
1488 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1489 data->in_max[i] =
1490 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1491 if ((data->type != w83782d) && (i == 6))
1492 break;
1493 }
1494 for (i = 0; i < 3; i++) {
1495 data->fan[i] =
1496 w83781d_read_value(data, W83781D_REG_FAN(i));
1497 data->fan_min[i] =
1498 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1499 }
1500 if (data->type != w83781d && data->type != as99127f) {
1501 for (i = 0; i < 4; i++) {
1502 data->pwm[i] =
1503 w83781d_read_value(data,
1504 W83781D_REG_PWM[i]);
1505 /* Only W83782D on SMBus has PWM3 and PWM4 */
1506 if ((data->type != w83782d || !client)
1507 && i == 1)
1508 break;
1509 }
1510 /* Only PWM2 can be disabled */
1511 data->pwm2_enable = (w83781d_read_value(data,
1512 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1513 }
1514
1515 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1516 data->temp_max =
1517 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1518 data->temp_max_hyst =
1519 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1520 data->temp_add[0] =
1521 w83781d_read_value(data, W83781D_REG_TEMP(2));
1522 data->temp_max_add[0] =
1523 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1524 data->temp_max_hyst_add[0] =
1525 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1526 if (data->type != w83783s) {
1527 data->temp_add[1] =
1528 w83781d_read_value(data, W83781D_REG_TEMP(3));
1529 data->temp_max_add[1] =
1530 w83781d_read_value(data,
1531 W83781D_REG_TEMP_OVER(3));
1532 data->temp_max_hyst_add[1] =
1533 w83781d_read_value(data,
1534 W83781D_REG_TEMP_HYST(3));
1535 }
1536 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1537 data->vid = i & 0x0f;
1538 data->vid |= (w83781d_read_value(data,
1539 W83781D_REG_CHIPID) & 0x01) << 4;
1540 data->fan_div[0] = (i >> 4) & 0x03;
1541 data->fan_div[1] = (i >> 6) & 0x03;
1542 data->fan_div[2] = (w83781d_read_value(data,
1543 W83781D_REG_PIN) >> 6) & 0x03;
1544 if ((data->type != w83781d) && (data->type != as99127f)) {
1545 i = w83781d_read_value(data, W83781D_REG_VBAT);
1546 data->fan_div[0] |= (i >> 3) & 0x04;
1547 data->fan_div[1] |= (i >> 4) & 0x04;
1548 data->fan_div[2] |= (i >> 5) & 0x04;
1549 }
1550 if (data->type == w83782d) {
1551 data->alarms = w83781d_read_value(data,
1552 W83782D_REG_ALARM1)
1553 | (w83781d_read_value(data,
1554 W83782D_REG_ALARM2) << 8)
1555 | (w83781d_read_value(data,
1556 W83782D_REG_ALARM3) << 16);
1557 } else if (data->type == w83783s) {
1558 data->alarms = w83781d_read_value(data,
1559 W83782D_REG_ALARM1)
1560 | (w83781d_read_value(data,
1561 W83782D_REG_ALARM2) << 8);
1562 } else {
1563 /*
1564 * No real-time status registers, fall back to
1565 * interrupt status registers
1566 */
1567 data->alarms = w83781d_read_value(data,
1568 W83781D_REG_ALARM1)
1569 | (w83781d_read_value(data,
1570 W83781D_REG_ALARM2) << 8);
1571 }
1572 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1573 data->beep_mask = (i << 8) +
1574 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1575 if ((data->type != w83781d) && (data->type != as99127f)) {
1576 data->beep_mask |=
1577 w83781d_read_value(data,
1578 W83781D_REG_BEEP_INTS3) << 16;
1579 }
1580 data->last_updated = jiffies;
1581 data->valid = 1;
1582 }
1583
1584 mutex_unlock(&data->update_lock);
1585
1586 return data;
1587}
1588
1589static const struct i2c_device_id w83781d_ids[] = {
1590 { "w83781d", w83781d, },
1591 { "w83782d", w83782d, },
1592 { "w83783s", w83783s, },
1593 { "as99127f", as99127f },
1594 { /* LIST END */ }
1595};
1596MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1597
1598static struct i2c_driver w83781d_driver = {
1599 .class = I2C_CLASS_HWMON,
1600 .driver = {
1601 .name = "w83781d",
1602 },
1603 .probe = w83781d_probe,
1604 .remove = w83781d_remove,
1605 .id_table = w83781d_ids,
1606 .detect = w83781d_detect,
1607 .address_list = normal_i2c,
1608};
1609
1610/*
1611 * ISA related code
1612 */
1613#ifdef CONFIG_ISA
1614
1615/* ISA device, if found */
1616static struct platform_device *pdev;
1617
1618static unsigned short isa_address = 0x290;
1619
1620/*
1621 * I2C devices get this name attribute automatically, but for ISA devices
1622 * we must create it by ourselves.
1623 */
1624static ssize_t
1625show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1626{
1627 struct w83781d_data *data = dev_get_drvdata(dev);
1628 return sprintf(buf, "%s\n", data->name);
1629}
1630static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1631
1632static struct w83781d_data *w83781d_data_if_isa(void)
1633{
1634 return pdev ? platform_get_drvdata(pdev) : NULL;
1635}
1636
1637/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1638static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1639{
1640 struct w83781d_data *isa;
1641 int i;
1642
1643 if (!pdev) /* No ISA chip */
1644 return 0;
1645
1646 isa = platform_get_drvdata(pdev);
1647
1648 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1649 return 0; /* Address doesn't match */
1650 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1651 return 0; /* Chip type doesn't match */
1652
1653 /*
1654 * We compare all the limit registers, the config register and the
1655 * interrupt mask registers
1656 */
1657 for (i = 0x2b; i <= 0x3d; i++) {
1658 if (w83781d_read_value(isa, i) !=
1659 i2c_smbus_read_byte_data(client, i))
1660 return 0;
1661 }
1662 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1663 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1664 return 0;
1665 for (i = 0x43; i <= 0x46; i++) {
1666 if (w83781d_read_value(isa, i) !=
1667 i2c_smbus_read_byte_data(client, i))
1668 return 0;
1669 }
1670
1671 return 1;
1672}
1673
1674static int
1675w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1676{
1677 int word_sized, res;
1678
1679 word_sized = (((reg & 0xff00) == 0x100)
1680 || ((reg & 0xff00) == 0x200))
1681 && (((reg & 0x00ff) == 0x50)
1682 || ((reg & 0x00ff) == 0x53)
1683 || ((reg & 0x00ff) == 0x55));
1684 if (reg & 0xff00) {
1685 outb_p(W83781D_REG_BANK,
1686 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1687 outb_p(reg >> 8,
1688 data->isa_addr + W83781D_DATA_REG_OFFSET);
1689 }
1690 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1691 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1692 if (word_sized) {
1693 outb_p((reg & 0xff) + 1,
1694 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1695 res =
1696 (res << 8) + inb_p(data->isa_addr +
1697 W83781D_DATA_REG_OFFSET);
1698 }
1699 if (reg & 0xff00) {
1700 outb_p(W83781D_REG_BANK,
1701 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1702 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1703 }
1704 return res;
1705}
1706
1707static void
1708w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1709{
1710 int word_sized;
1711
1712 word_sized = (((reg & 0xff00) == 0x100)
1713 || ((reg & 0xff00) == 0x200))
1714 && (((reg & 0x00ff) == 0x53)
1715 || ((reg & 0x00ff) == 0x55));
1716 if (reg & 0xff00) {
1717 outb_p(W83781D_REG_BANK,
1718 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1719 outb_p(reg >> 8,
1720 data->isa_addr + W83781D_DATA_REG_OFFSET);
1721 }
1722 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1723 if (word_sized) {
1724 outb_p(value >> 8,
1725 data->isa_addr + W83781D_DATA_REG_OFFSET);
1726 outb_p((reg & 0xff) + 1,
1727 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1728 }
1729 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1730 if (reg & 0xff00) {
1731 outb_p(W83781D_REG_BANK,
1732 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1733 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1734 }
1735}
1736
1737/*
1738 * The SMBus locks itself, usually, but nothing may access the Winbond between
1739 * bank switches. ISA access must always be locked explicitly!
1740 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1741 * would slow down the W83781D access and should not be necessary.
1742 * There are some ugly typecasts here, but the good news is - they should
1743 * nowhere else be necessary!
1744 */
1745static int
1746w83781d_read_value(struct w83781d_data *data, u16 reg)
1747{
1748 struct i2c_client *client = data->client;
1749 int res;
1750
1751 mutex_lock(&data->lock);
1752 if (client)
1753 res = w83781d_read_value_i2c(data, reg);
1754 else
1755 res = w83781d_read_value_isa(data, reg);
1756 mutex_unlock(&data->lock);
1757 return res;
1758}
1759
1760static int
1761w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1762{
1763 struct i2c_client *client = data->client;
1764
1765 mutex_lock(&data->lock);
1766 if (client)
1767 w83781d_write_value_i2c(data, reg, value);
1768 else
1769 w83781d_write_value_isa(data, reg, value);
1770 mutex_unlock(&data->lock);
1771 return 0;
1772}
1773
1774static int __devinit
1775w83781d_isa_probe(struct platform_device *pdev)
1776{
1777 int err, reg;
1778 struct w83781d_data *data;
1779 struct resource *res;
1780
1781 /* Reserve the ISA region */
1782 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1783 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1784 "w83781d")) {
1785 err = -EBUSY;
1786 goto exit;
1787 }
1788
1789 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1790 if (!data) {
1791 err = -ENOMEM;
1792 goto exit_release_region;
1793 }
1794 mutex_init(&data->lock);
1795 data->isa_addr = res->start;
1796 platform_set_drvdata(pdev, data);
1797
1798 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1799 switch (reg) {
1800 case 0x30:
1801 data->type = w83782d;
1802 data->name = "w83782d";
1803 break;
1804 default:
1805 data->type = w83781d;
1806 data->name = "w83781d";
1807 }
1808
1809 /* Initialize the W83781D chip */
1810 w83781d_init_device(&pdev->dev);
1811
1812 /* Register sysfs hooks */
1813 err = w83781d_create_files(&pdev->dev, data->type, 1);
1814 if (err)
1815 goto exit_remove_files;
1816
1817 err = device_create_file(&pdev->dev, &dev_attr_name);
1818 if (err)
1819 goto exit_remove_files;
1820
1821 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1822 if (IS_ERR(data->hwmon_dev)) {
1823 err = PTR_ERR(data->hwmon_dev);
1824 goto exit_remove_files;
1825 }
1826
1827 return 0;
1828
1829 exit_remove_files:
1830 w83781d_remove_files(&pdev->dev);
1831 device_remove_file(&pdev->dev, &dev_attr_name);
1832 kfree(data);
1833 exit_release_region:
1834 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1835 exit:
1836 return err;
1837}
1838
1839static int __devexit
1840w83781d_isa_remove(struct platform_device *pdev)
1841{
1842 struct w83781d_data *data = platform_get_drvdata(pdev);
1843
1844 hwmon_device_unregister(data->hwmon_dev);
1845 w83781d_remove_files(&pdev->dev);
1846 device_remove_file(&pdev->dev, &dev_attr_name);
1847 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
1848 kfree(data);
1849
1850 return 0;
1851}
1852
1853static struct platform_driver w83781d_isa_driver = {
1854 .driver = {
1855 .owner = THIS_MODULE,
1856 .name = "w83781d",
1857 },
1858 .probe = w83781d_isa_probe,
1859 .remove = __devexit_p(w83781d_isa_remove),
1860};
1861
1862/* return 1 if a supported chip is found, 0 otherwise */
1863static int __init
1864w83781d_isa_found(unsigned short address)
1865{
1866 int val, save, found = 0;
1867 int port;
1868
1869 /*
1870 * Some boards declare base+0 to base+7 as a PNP device, some base+4
1871 * to base+7 and some base+5 to base+6. So we better request each port
1872 * individually for the probing phase.
1873 */
1874 for (port = address; port < address + W83781D_EXTENT; port++) {
1875 if (!request_region(port, 1, "w83781d")) {
1876 pr_debug("Failed to request port 0x%x\n", port);
1877 goto release;
1878 }
1879 }
1880
1881#define REALLY_SLOW_IO
1882 /*
1883 * We need the timeouts for at least some W83781D-like
1884 * chips. But only if we read 'undefined' registers.
1885 */
1886 val = inb_p(address + 1);
1887 if (inb_p(address + 2) != val
1888 || inb_p(address + 3) != val
1889 || inb_p(address + 7) != val) {
1890 pr_debug("Detection failed at step %d\n", 1);
1891 goto release;
1892 }
1893#undef REALLY_SLOW_IO
1894
1895 /*
1896 * We should be able to change the 7 LSB of the address port. The
1897 * MSB (busy flag) should be clear initially, set after the write.
1898 */
1899 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1900 if (save & 0x80) {
1901 pr_debug("Detection failed at step %d\n", 2);
1902 goto release;
1903 }
1904 val = ~save & 0x7f;
1905 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1906 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1907 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1908 pr_debug("Detection failed at step %d\n", 3);
1909 goto release;
1910 }
1911
1912 /* We found a device, now see if it could be a W83781D */
1913 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1914 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1915 if (val & 0x80) {
1916 pr_debug("Detection failed at step %d\n", 4);
1917 goto release;
1918 }
1919 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1920 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1921 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1922 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1923 if ((!(save & 0x80) && (val != 0xa3))
1924 || ((save & 0x80) && (val != 0x5c))) {
1925 pr_debug("Detection failed at step %d\n", 5);
1926 goto release;
1927 }
1928 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1929 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1930 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1931 pr_debug("Detection failed at step %d\n", 6);
1932 goto release;
1933 }
1934
1935 /* The busy flag should be clear again */
1936 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1937 pr_debug("Detection failed at step %d\n", 7);
1938 goto release;
1939 }
1940
1941 /* Determine the chip type */
1942 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1943 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1944 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1945 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1946 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1947 if ((val & 0xfe) == 0x10 /* W83781D */
1948 || val == 0x30) /* W83782D */
1949 found = 1;
1950
1951 if (found)
1952 pr_info("Found a %s chip at %#x\n",
1953 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1954
1955 release:
1956 for (port--; port >= address; port--)
1957 release_region(port, 1);
1958 return found;
1959}
1960
1961static int __init
1962w83781d_isa_device_add(unsigned short address)
1963{
1964 struct resource res = {
1965 .start = address,
1966 .end = address + W83781D_EXTENT - 1,
1967 .name = "w83781d",
1968 .flags = IORESOURCE_IO,
1969 };
1970 int err;
1971
1972 pdev = platform_device_alloc("w83781d", address);
1973 if (!pdev) {
1974 err = -ENOMEM;
1975 pr_err("Device allocation failed\n");
1976 goto exit;
1977 }
1978
1979 err = platform_device_add_resources(pdev, &res, 1);
1980 if (err) {
1981 pr_err("Device resource addition failed (%d)\n", err);
1982 goto exit_device_put;
1983 }
1984
1985 err = platform_device_add(pdev);
1986 if (err) {
1987 pr_err("Device addition failed (%d)\n", err);
1988 goto exit_device_put;
1989 }
1990
1991 return 0;
1992
1993 exit_device_put:
1994 platform_device_put(pdev);
1995 exit:
1996 pdev = NULL;
1997 return err;
1998}
1999
2000static int __init
2001w83781d_isa_register(void)
2002{
2003 int res;
2004
2005 if (w83781d_isa_found(isa_address)) {
2006 res = platform_driver_register(&w83781d_isa_driver);
2007 if (res)
2008 goto exit;
2009
2010 /* Sets global pdev as a side effect */
2011 res = w83781d_isa_device_add(isa_address);
2012 if (res)
2013 goto exit_unreg_isa_driver;
2014 }
2015
2016 return 0;
2017
2018exit_unreg_isa_driver:
2019 platform_driver_unregister(&w83781d_isa_driver);
2020exit:
2021 return res;
2022}
2023
2024static void
2025w83781d_isa_unregister(void)
2026{
2027 if (pdev) {
2028 platform_device_unregister(pdev);
2029 platform_driver_unregister(&w83781d_isa_driver);
2030 }
2031}
2032#else /* !CONFIG_ISA */
2033
2034static struct w83781d_data *w83781d_data_if_isa(void)
2035{
2036 return NULL;
2037}
2038
2039static int
2040w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2041{
2042 return 0;
2043}
2044
2045static int
2046w83781d_read_value(struct w83781d_data *data, u16 reg)
2047{
2048 int res;
2049
2050 mutex_lock(&data->lock);
2051 res = w83781d_read_value_i2c(data, reg);
2052 mutex_unlock(&data->lock);
2053
2054 return res;
2055}
2056
2057static int
2058w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2059{
2060 mutex_lock(&data->lock);
2061 w83781d_write_value_i2c(data, reg, value);
2062 mutex_unlock(&data->lock);
2063
2064 return 0;
2065}
2066
2067static int __init
2068w83781d_isa_register(void)
2069{
2070 return 0;
2071}
2072
2073static void
2074w83781d_isa_unregister(void)
2075{
2076}
2077#endif /* CONFIG_ISA */
2078
2079static int __init
2080sensors_w83781d_init(void)
2081{
2082 int res;
2083
2084 /*
2085 * We register the ISA device first, so that we can skip the
2086 * registration of an I2C interface to the same device.
2087 */
2088 res = w83781d_isa_register();
2089 if (res)
2090 goto exit;
2091
2092 res = i2c_add_driver(&w83781d_driver);
2093 if (res)
2094 goto exit_unreg_isa;
2095
2096 return 0;
2097
2098 exit_unreg_isa:
2099 w83781d_isa_unregister();
2100 exit:
2101 return res;
2102}
2103
2104static void __exit
2105sensors_w83781d_exit(void)
2106{
2107 w83781d_isa_unregister();
2108 i2c_del_driver(&w83781d_driver);
2109}
2110
2111MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2112 "Philip Edelbrock <phil@netroedge.com>, "
2113 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2114MODULE_DESCRIPTION("W83781D driver");
2115MODULE_LICENSE("GPL");
2116
2117module_init(sensors_w83781d_init);
2118module_exit(sensors_w83781d_exit);