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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/mmu_notifier.h>
17#include <linux/tracepoint.h>
18#include <linux/cpumask.h>
19#include <linux/irq_work.h>
20
21#include <linux/kvm.h>
22#include <linux/kvm_para.h>
23#include <linux/kvm_types.h>
24#include <linux/perf_event.h>
25
26#include <asm/pvclock-abi.h>
27#include <asm/desc.h>
28#include <asm/mtrr.h>
29#include <asm/msr-index.h>
30#include <asm/asm.h>
31
32#define KVM_MAX_VCPUS 254
33#define KVM_SOFT_MAX_VCPUS 160
34#define KVM_MEMORY_SLOTS 32
35/* memory slots that does not exposed to userspace */
36#define KVM_PRIVATE_MEM_SLOTS 4
37#define KVM_MEM_SLOTS_NUM (KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS)
38
39#define KVM_MMIO_SIZE 16
40
41#define KVM_PIO_PAGE_OFFSET 1
42#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
43
44#define CR0_RESERVED_BITS \
45 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48
49#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
50#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
51#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
52 0xFFFFFF0000000000ULL)
53#define CR4_RESERVED_BITS \
54 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
55 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
56 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
57 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
58 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
59
60#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
61
62
63
64#define INVALID_PAGE (~(hpa_t)0)
65#define VALID_PAGE(x) ((x) != INVALID_PAGE)
66
67#define UNMAPPED_GVA (~(gpa_t)0)
68
69/* KVM Hugepage definitions for x86 */
70#define KVM_NR_PAGE_SIZES 3
71#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
72#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
73#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
74#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
75#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
76
77#define DE_VECTOR 0
78#define DB_VECTOR 1
79#define BP_VECTOR 3
80#define OF_VECTOR 4
81#define BR_VECTOR 5
82#define UD_VECTOR 6
83#define NM_VECTOR 7
84#define DF_VECTOR 8
85#define TS_VECTOR 10
86#define NP_VECTOR 11
87#define SS_VECTOR 12
88#define GP_VECTOR 13
89#define PF_VECTOR 14
90#define MF_VECTOR 16
91#define MC_VECTOR 18
92
93#define SELECTOR_TI_MASK (1 << 2)
94#define SELECTOR_RPL_MASK 0x03
95
96#define IOPL_SHIFT 12
97
98#define KVM_PERMILLE_MMU_PAGES 20
99#define KVM_MIN_ALLOC_MMU_PAGES 64
100#define KVM_MMU_HASH_SHIFT 10
101#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
102#define KVM_MIN_FREE_MMU_PAGES 5
103#define KVM_REFILL_PAGES 25
104#define KVM_MAX_CPUID_ENTRIES 80
105#define KVM_NR_FIXED_MTRR_REGION 88
106#define KVM_NR_VAR_MTRR 8
107
108#define ASYNC_PF_PER_VCPU 64
109
110extern raw_spinlock_t kvm_lock;
111extern struct list_head vm_list;
112
113struct kvm_vcpu;
114struct kvm;
115struct kvm_async_pf;
116
117enum kvm_reg {
118 VCPU_REGS_RAX = 0,
119 VCPU_REGS_RCX = 1,
120 VCPU_REGS_RDX = 2,
121 VCPU_REGS_RBX = 3,
122 VCPU_REGS_RSP = 4,
123 VCPU_REGS_RBP = 5,
124 VCPU_REGS_RSI = 6,
125 VCPU_REGS_RDI = 7,
126#ifdef CONFIG_X86_64
127 VCPU_REGS_R8 = 8,
128 VCPU_REGS_R9 = 9,
129 VCPU_REGS_R10 = 10,
130 VCPU_REGS_R11 = 11,
131 VCPU_REGS_R12 = 12,
132 VCPU_REGS_R13 = 13,
133 VCPU_REGS_R14 = 14,
134 VCPU_REGS_R15 = 15,
135#endif
136 VCPU_REGS_RIP,
137 NR_VCPU_REGS
138};
139
140enum kvm_reg_ex {
141 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
142 VCPU_EXREG_CR3,
143 VCPU_EXREG_RFLAGS,
144 VCPU_EXREG_CPL,
145 VCPU_EXREG_SEGMENTS,
146};
147
148enum {
149 VCPU_SREG_ES,
150 VCPU_SREG_CS,
151 VCPU_SREG_SS,
152 VCPU_SREG_DS,
153 VCPU_SREG_FS,
154 VCPU_SREG_GS,
155 VCPU_SREG_TR,
156 VCPU_SREG_LDTR,
157};
158
159#include <asm/kvm_emulate.h>
160
161#define KVM_NR_MEM_OBJS 40
162
163#define KVM_NR_DB_REGS 4
164
165#define DR6_BD (1 << 13)
166#define DR6_BS (1 << 14)
167#define DR6_FIXED_1 0xffff0ff0
168#define DR6_VOLATILE 0x0000e00f
169
170#define DR7_BP_EN_MASK 0x000000ff
171#define DR7_GE (1 << 9)
172#define DR7_GD (1 << 13)
173#define DR7_FIXED_1 0x00000400
174#define DR7_VOLATILE 0xffff23ff
175
176/* apic attention bits */
177#define KVM_APIC_CHECK_VAPIC 0
178
179/*
180 * We don't want allocation failures within the mmu code, so we preallocate
181 * enough memory for a single page fault in a cache.
182 */
183struct kvm_mmu_memory_cache {
184 int nobjs;
185 void *objects[KVM_NR_MEM_OBJS];
186};
187
188/*
189 * kvm_mmu_page_role, below, is defined as:
190 *
191 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
192 * bits 4:7 - page table level for this shadow (1-4)
193 * bits 8:9 - page table quadrant for 2-level guests
194 * bit 16 - direct mapping of virtual to physical mapping at gfn
195 * used for real mode and two-dimensional paging
196 * bits 17:19 - common access permissions for all ptes in this shadow page
197 */
198union kvm_mmu_page_role {
199 unsigned word;
200 struct {
201 unsigned level:4;
202 unsigned cr4_pae:1;
203 unsigned quadrant:2;
204 unsigned pad_for_nice_hex_output:6;
205 unsigned direct:1;
206 unsigned access:3;
207 unsigned invalid:1;
208 unsigned nxe:1;
209 unsigned cr0_wp:1;
210 unsigned smep_andnot_wp:1;
211 };
212};
213
214struct kvm_mmu_page {
215 struct list_head link;
216 struct hlist_node hash_link;
217
218 /*
219 * The following two entries are used to key the shadow page in the
220 * hash table.
221 */
222 gfn_t gfn;
223 union kvm_mmu_page_role role;
224
225 u64 *spt;
226 /* hold the gfn of each spte inside spt */
227 gfn_t *gfns;
228 /*
229 * One bit set per slot which has memory
230 * in this shadow page.
231 */
232 DECLARE_BITMAP(slot_bitmap, KVM_MEM_SLOTS_NUM);
233 bool unsync;
234 int root_count; /* Currently serving as active root */
235 unsigned int unsync_children;
236 unsigned long parent_ptes; /* Reverse mapping for parent_pte */
237 DECLARE_BITMAP(unsync_child_bitmap, 512);
238
239#ifdef CONFIG_X86_32
240 int clear_spte_count;
241#endif
242
243 int write_flooding_count;
244};
245
246struct kvm_pio_request {
247 unsigned long count;
248 int in;
249 int port;
250 int size;
251};
252
253/*
254 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
255 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
256 * mode.
257 */
258struct kvm_mmu {
259 void (*new_cr3)(struct kvm_vcpu *vcpu);
260 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
261 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
262 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
263 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
264 bool prefault);
265 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
266 struct x86_exception *fault);
267 void (*free)(struct kvm_vcpu *vcpu);
268 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
269 struct x86_exception *exception);
270 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
271 int (*sync_page)(struct kvm_vcpu *vcpu,
272 struct kvm_mmu_page *sp);
273 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
274 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
275 u64 *spte, const void *pte);
276 hpa_t root_hpa;
277 int root_level;
278 int shadow_root_level;
279 union kvm_mmu_page_role base_role;
280 bool direct_map;
281
282 u64 *pae_root;
283 u64 *lm_root;
284 u64 rsvd_bits_mask[2][4];
285
286 bool nx;
287
288 u64 pdptrs[4]; /* pae */
289};
290
291enum pmc_type {
292 KVM_PMC_GP = 0,
293 KVM_PMC_FIXED,
294};
295
296struct kvm_pmc {
297 enum pmc_type type;
298 u8 idx;
299 u64 counter;
300 u64 eventsel;
301 struct perf_event *perf_event;
302 struct kvm_vcpu *vcpu;
303};
304
305struct kvm_pmu {
306 unsigned nr_arch_gp_counters;
307 unsigned nr_arch_fixed_counters;
308 unsigned available_event_types;
309 u64 fixed_ctr_ctrl;
310 u64 global_ctrl;
311 u64 global_status;
312 u64 global_ovf_ctrl;
313 u64 counter_bitmask[2];
314 u64 global_ctrl_mask;
315 u8 version;
316 struct kvm_pmc gp_counters[X86_PMC_MAX_GENERIC];
317 struct kvm_pmc fixed_counters[X86_PMC_MAX_FIXED];
318 struct irq_work irq_work;
319 u64 reprogram_pmi;
320};
321
322struct kvm_vcpu_arch {
323 /*
324 * rip and regs accesses must go through
325 * kvm_{register,rip}_{read,write} functions.
326 */
327 unsigned long regs[NR_VCPU_REGS];
328 u32 regs_avail;
329 u32 regs_dirty;
330
331 unsigned long cr0;
332 unsigned long cr0_guest_owned_bits;
333 unsigned long cr2;
334 unsigned long cr3;
335 unsigned long cr4;
336 unsigned long cr4_guest_owned_bits;
337 unsigned long cr8;
338 u32 hflags;
339 u64 efer;
340 u64 apic_base;
341 struct kvm_lapic *apic; /* kernel irqchip context */
342 unsigned long apic_attention;
343 int32_t apic_arb_prio;
344 int mp_state;
345 int sipi_vector;
346 u64 ia32_misc_enable_msr;
347 bool tpr_access_reporting;
348
349 /*
350 * Paging state of the vcpu
351 *
352 * If the vcpu runs in guest mode with two level paging this still saves
353 * the paging mode of the l1 guest. This context is always used to
354 * handle faults.
355 */
356 struct kvm_mmu mmu;
357
358 /*
359 * Paging state of an L2 guest (used for nested npt)
360 *
361 * This context will save all necessary information to walk page tables
362 * of the an L2 guest. This context is only initialized for page table
363 * walking and not for faulting since we never handle l2 page faults on
364 * the host.
365 */
366 struct kvm_mmu nested_mmu;
367
368 /*
369 * Pointer to the mmu context currently used for
370 * gva_to_gpa translations.
371 */
372 struct kvm_mmu *walk_mmu;
373
374 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
375 struct kvm_mmu_memory_cache mmu_page_cache;
376 struct kvm_mmu_memory_cache mmu_page_header_cache;
377
378 struct fpu guest_fpu;
379 u64 xcr0;
380
381 struct kvm_pio_request pio;
382 void *pio_data;
383
384 u8 event_exit_inst_len;
385
386 struct kvm_queued_exception {
387 bool pending;
388 bool has_error_code;
389 bool reinject;
390 u8 nr;
391 u32 error_code;
392 } exception;
393
394 struct kvm_queued_interrupt {
395 bool pending;
396 bool soft;
397 u8 nr;
398 } interrupt;
399
400 int halt_request; /* real mode on Intel only */
401
402 int cpuid_nent;
403 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
404 /* emulate context */
405
406 struct x86_emulate_ctxt emulate_ctxt;
407 bool emulate_regs_need_sync_to_vcpu;
408 bool emulate_regs_need_sync_from_vcpu;
409
410 gpa_t time;
411 struct pvclock_vcpu_time_info hv_clock;
412 unsigned int hw_tsc_khz;
413 unsigned int time_offset;
414 struct page *time_page;
415
416 struct {
417 u64 msr_val;
418 u64 last_steal;
419 u64 accum_steal;
420 struct gfn_to_hva_cache stime;
421 struct kvm_steal_time steal;
422 } st;
423
424 u64 last_guest_tsc;
425 u64 last_kernel_ns;
426 u64 last_host_tsc;
427 u64 tsc_offset_adjustment;
428 u64 this_tsc_nsec;
429 u64 this_tsc_write;
430 u8 this_tsc_generation;
431 bool tsc_catchup;
432 bool tsc_always_catchup;
433 s8 virtual_tsc_shift;
434 u32 virtual_tsc_mult;
435 u32 virtual_tsc_khz;
436
437 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
438 unsigned nmi_pending; /* NMI queued after currently running handler */
439 bool nmi_injected; /* Trying to inject an NMI this entry */
440
441 struct mtrr_state_type mtrr_state;
442 u32 pat;
443
444 int switch_db_regs;
445 unsigned long db[KVM_NR_DB_REGS];
446 unsigned long dr6;
447 unsigned long dr7;
448 unsigned long eff_db[KVM_NR_DB_REGS];
449
450 u64 mcg_cap;
451 u64 mcg_status;
452 u64 mcg_ctl;
453 u64 *mce_banks;
454
455 /* Cache MMIO info */
456 u64 mmio_gva;
457 unsigned access;
458 gfn_t mmio_gfn;
459
460 struct kvm_pmu pmu;
461
462 /* used for guest single stepping over the given code position */
463 unsigned long singlestep_rip;
464
465 /* fields used by HYPER-V emulation */
466 u64 hv_vapic;
467
468 cpumask_var_t wbinvd_dirty_mask;
469
470 unsigned long last_retry_eip;
471 unsigned long last_retry_addr;
472
473 struct {
474 bool halted;
475 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
476 struct gfn_to_hva_cache data;
477 u64 msr_val;
478 u32 id;
479 bool send_user_only;
480 } apf;
481
482 /* OSVW MSRs (AMD only) */
483 struct {
484 u64 length;
485 u64 status;
486 } osvw;
487};
488
489struct kvm_lpage_info {
490 unsigned long rmap_pde;
491 int write_count;
492};
493
494struct kvm_arch_memory_slot {
495 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
496};
497
498struct kvm_arch {
499 unsigned int n_used_mmu_pages;
500 unsigned int n_requested_mmu_pages;
501 unsigned int n_max_mmu_pages;
502 unsigned int indirect_shadow_pages;
503 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
504 /*
505 * Hash table of struct kvm_mmu_page.
506 */
507 struct list_head active_mmu_pages;
508 struct list_head assigned_dev_head;
509 struct iommu_domain *iommu_domain;
510 int iommu_flags;
511 struct kvm_pic *vpic;
512 struct kvm_ioapic *vioapic;
513 struct kvm_pit *vpit;
514 int vapics_in_nmi_mode;
515
516 unsigned int tss_addr;
517 struct page *apic_access_page;
518
519 gpa_t wall_clock;
520
521 struct page *ept_identity_pagetable;
522 bool ept_identity_pagetable_done;
523 gpa_t ept_identity_map_addr;
524
525 unsigned long irq_sources_bitmap;
526 s64 kvmclock_offset;
527 raw_spinlock_t tsc_write_lock;
528 u64 last_tsc_nsec;
529 u64 last_tsc_write;
530 u32 last_tsc_khz;
531 u64 cur_tsc_nsec;
532 u64 cur_tsc_write;
533 u64 cur_tsc_offset;
534 u8 cur_tsc_generation;
535
536 struct kvm_xen_hvm_config xen_hvm_config;
537
538 /* fields used by HYPER-V emulation */
539 u64 hv_guest_os_id;
540 u64 hv_hypercall;
541
542 #ifdef CONFIG_KVM_MMU_AUDIT
543 int audit_point;
544 #endif
545};
546
547struct kvm_vm_stat {
548 u32 mmu_shadow_zapped;
549 u32 mmu_pte_write;
550 u32 mmu_pte_updated;
551 u32 mmu_pde_zapped;
552 u32 mmu_flooded;
553 u32 mmu_recycled;
554 u32 mmu_cache_miss;
555 u32 mmu_unsync;
556 u32 remote_tlb_flush;
557 u32 lpages;
558};
559
560struct kvm_vcpu_stat {
561 u32 pf_fixed;
562 u32 pf_guest;
563 u32 tlb_flush;
564 u32 invlpg;
565
566 u32 exits;
567 u32 io_exits;
568 u32 mmio_exits;
569 u32 signal_exits;
570 u32 irq_window_exits;
571 u32 nmi_window_exits;
572 u32 halt_exits;
573 u32 halt_wakeup;
574 u32 request_irq_exits;
575 u32 irq_exits;
576 u32 host_state_reload;
577 u32 efer_reload;
578 u32 fpu_reload;
579 u32 insn_emulation;
580 u32 insn_emulation_fail;
581 u32 hypercalls;
582 u32 irq_injections;
583 u32 nmi_injections;
584};
585
586struct x86_instruction_info;
587
588struct kvm_x86_ops {
589 int (*cpu_has_kvm_support)(void); /* __init */
590 int (*disabled_by_bios)(void); /* __init */
591 int (*hardware_enable)(void *dummy);
592 void (*hardware_disable)(void *dummy);
593 void (*check_processor_compatibility)(void *rtn);
594 int (*hardware_setup)(void); /* __init */
595 void (*hardware_unsetup)(void); /* __exit */
596 bool (*cpu_has_accelerated_tpr)(void);
597 void (*cpuid_update)(struct kvm_vcpu *vcpu);
598
599 /* Create, but do not attach this VCPU */
600 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
601 void (*vcpu_free)(struct kvm_vcpu *vcpu);
602 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
603
604 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
605 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
606 void (*vcpu_put)(struct kvm_vcpu *vcpu);
607
608 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
609 struct kvm_guest_debug *dbg);
610 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
611 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
612 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
613 void (*get_segment)(struct kvm_vcpu *vcpu,
614 struct kvm_segment *var, int seg);
615 int (*get_cpl)(struct kvm_vcpu *vcpu);
616 void (*set_segment)(struct kvm_vcpu *vcpu,
617 struct kvm_segment *var, int seg);
618 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
619 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
620 void (*decache_cr3)(struct kvm_vcpu *vcpu);
621 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
622 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
623 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
624 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
625 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
626 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
627 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
628 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
629 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
630 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
631 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
632 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
633 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
634 void (*fpu_activate)(struct kvm_vcpu *vcpu);
635 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
636
637 void (*tlb_flush)(struct kvm_vcpu *vcpu);
638
639 void (*run)(struct kvm_vcpu *vcpu);
640 int (*handle_exit)(struct kvm_vcpu *vcpu);
641 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
642 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
643 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
644 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
645 unsigned char *hypercall_addr);
646 void (*set_irq)(struct kvm_vcpu *vcpu);
647 void (*set_nmi)(struct kvm_vcpu *vcpu);
648 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
649 bool has_error_code, u32 error_code,
650 bool reinject);
651 void (*cancel_injection)(struct kvm_vcpu *vcpu);
652 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
653 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
654 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
655 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
656 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
657 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
658 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
659 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
660 int (*get_tdp_level)(void);
661 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
662 int (*get_lpage_level)(void);
663 bool (*rdtscp_supported)(void);
664 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
665
666 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
667
668 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
669
670 bool (*has_wbinvd_exit)(void);
671
672 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
673 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
674
675 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
676 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu);
677
678 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
679
680 int (*check_intercept)(struct kvm_vcpu *vcpu,
681 struct x86_instruction_info *info,
682 enum x86_intercept_stage stage);
683};
684
685struct kvm_arch_async_pf {
686 u32 token;
687 gfn_t gfn;
688 unsigned long cr3;
689 bool direct_map;
690};
691
692extern struct kvm_x86_ops *kvm_x86_ops;
693
694static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
695 s64 adjustment)
696{
697 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
698}
699
700static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
701{
702 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
703}
704
705int kvm_mmu_module_init(void);
706void kvm_mmu_module_exit(void);
707
708void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
709int kvm_mmu_create(struct kvm_vcpu *vcpu);
710int kvm_mmu_setup(struct kvm_vcpu *vcpu);
711void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
712 u64 dirty_mask, u64 nx_mask, u64 x_mask);
713
714int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
715void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
716void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
717 struct kvm_memory_slot *slot,
718 gfn_t gfn_offset, unsigned long mask);
719void kvm_mmu_zap_all(struct kvm *kvm);
720unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
721void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
722
723int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
724
725int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
726 const void *val, int bytes);
727u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
728
729extern bool tdp_enabled;
730
731u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
732
733/* control of guest tsc rate supported? */
734extern bool kvm_has_tsc_control;
735/* minimum supported tsc_khz for guests */
736extern u32 kvm_min_guest_tsc_khz;
737/* maximum supported tsc_khz for guests */
738extern u32 kvm_max_guest_tsc_khz;
739
740enum emulation_result {
741 EMULATE_DONE, /* no further processing */
742 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
743 EMULATE_FAIL, /* can't emulate this instruction */
744};
745
746#define EMULTYPE_NO_DECODE (1 << 0)
747#define EMULTYPE_TRAP_UD (1 << 1)
748#define EMULTYPE_SKIP (1 << 2)
749#define EMULTYPE_RETRY (1 << 3)
750int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
751 int emulation_type, void *insn, int insn_len);
752
753static inline int emulate_instruction(struct kvm_vcpu *vcpu,
754 int emulation_type)
755{
756 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
757}
758
759void kvm_enable_efer_bits(u64);
760int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
761int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
762
763struct x86_emulate_ctxt;
764
765int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
766void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
767int kvm_emulate_halt(struct kvm_vcpu *vcpu);
768int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
769
770void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
771int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
772
773int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
774 int reason, bool has_error_code, u32 error_code);
775
776int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
777int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
778int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
779int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
780int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
781int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
782unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
783void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
784void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
785int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
786
787int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
788int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
789
790unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
791void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
792bool kvm_rdpmc(struct kvm_vcpu *vcpu);
793
794void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
795void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
796void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
797void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
798void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
799int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
800 gfn_t gfn, void *data, int offset, int len,
801 u32 access);
802void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
803bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
804
805int kvm_pic_set_irq(void *opaque, int irq, int level);
806
807void kvm_inject_nmi(struct kvm_vcpu *vcpu);
808
809int fx_init(struct kvm_vcpu *vcpu);
810
811void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
812void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
813 const u8 *new, int bytes);
814int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
815int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
816void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
817int kvm_mmu_load(struct kvm_vcpu *vcpu);
818void kvm_mmu_unload(struct kvm_vcpu *vcpu);
819void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
820gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
821gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
822 struct x86_exception *exception);
823gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
824 struct x86_exception *exception);
825gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
826 struct x86_exception *exception);
827gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
828 struct x86_exception *exception);
829
830int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
831
832int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
833 void *insn, int insn_len);
834void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
835
836void kvm_enable_tdp(void);
837void kvm_disable_tdp(void);
838
839int complete_pio(struct kvm_vcpu *vcpu);
840bool kvm_check_iopl(struct kvm_vcpu *vcpu);
841
842static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
843{
844 return gpa;
845}
846
847static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
848{
849 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
850
851 return (struct kvm_mmu_page *)page_private(page);
852}
853
854static inline u16 kvm_read_ldt(void)
855{
856 u16 ldt;
857 asm("sldt %0" : "=g"(ldt));
858 return ldt;
859}
860
861static inline void kvm_load_ldt(u16 sel)
862{
863 asm("lldt %0" : : "rm"(sel));
864}
865
866#ifdef CONFIG_X86_64
867static inline unsigned long read_msr(unsigned long msr)
868{
869 u64 value;
870
871 rdmsrl(msr, value);
872 return value;
873}
874#endif
875
876static inline u32 get_rdx_init_val(void)
877{
878 return 0x600; /* P6 family */
879}
880
881static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
882{
883 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
884}
885
886#define TSS_IOPB_BASE_OFFSET 0x66
887#define TSS_BASE_SIZE 0x68
888#define TSS_IOPB_SIZE (65536 / 8)
889#define TSS_REDIRECTION_SIZE (256 / 8)
890#define RMODE_TSS_SIZE \
891 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
892
893enum {
894 TASK_SWITCH_CALL = 0,
895 TASK_SWITCH_IRET = 1,
896 TASK_SWITCH_JMP = 2,
897 TASK_SWITCH_GATE = 3,
898};
899
900#define HF_GIF_MASK (1 << 0)
901#define HF_HIF_MASK (1 << 1)
902#define HF_VINTR_MASK (1 << 2)
903#define HF_NMI_MASK (1 << 3)
904#define HF_IRET_MASK (1 << 4)
905#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
906
907/*
908 * Hardware virtualization extension instructions may fault if a
909 * reboot turns off virtualization while processes are running.
910 * Trap the fault and ignore the instruction if that happens.
911 */
912asmlinkage void kvm_spurious_fault(void);
913extern bool kvm_rebooting;
914
915#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
916 "666: " insn "\n\t" \
917 "668: \n\t" \
918 ".pushsection .fixup, \"ax\" \n" \
919 "667: \n\t" \
920 cleanup_insn "\n\t" \
921 "cmpb $0, kvm_rebooting \n\t" \
922 "jne 668b \n\t" \
923 __ASM_SIZE(push) " $666b \n\t" \
924 "call kvm_spurious_fault \n\t" \
925 ".popsection \n\t" \
926 _ASM_EXTABLE(666b, 667b)
927
928#define __kvm_handle_fault_on_reboot(insn) \
929 ____kvm_handle_fault_on_reboot(insn, "")
930
931#define KVM_ARCH_WANT_MMU_NOTIFIER
932int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
933int kvm_age_hva(struct kvm *kvm, unsigned long hva);
934int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
935void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
936int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
937int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
938int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
939int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
940
941void kvm_define_shared_msr(unsigned index, u32 msr);
942void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
943
944bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
945
946void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
947 struct kvm_async_pf *work);
948void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
949 struct kvm_async_pf *work);
950void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
951 struct kvm_async_pf *work);
952bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
953extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
954
955void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
956
957int kvm_is_in_guest(void);
958
959void kvm_pmu_init(struct kvm_vcpu *vcpu);
960void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
961void kvm_pmu_reset(struct kvm_vcpu *vcpu);
962void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
963bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
964int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
965int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
966int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
967void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
968void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
969
970#endif /* _ASM_X86_KVM_HOST_H */