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1/*
2 * Copyright (C) 2004 IBM
3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
9#ifdef __KERNEL__
10
11#include <linux/types.h>
12#include <linux/cache.h>
13/* need struct page definitions */
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16#include <linux/dma-attrs.h>
17#include <linux/dma-debug.h>
18#include <asm/io.h>
19#include <asm/swiotlb.h>
20
21#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
22
23/* Some dma direct funcs must be visible for use in other dma_ops */
24extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
25 dma_addr_t *dma_handle, gfp_t flag,
26 struct dma_attrs *attrs);
27extern void dma_direct_free_coherent(struct device *dev, size_t size,
28 void *vaddr, dma_addr_t dma_handle,
29 struct dma_attrs *attrs);
30
31
32#ifdef CONFIG_NOT_COHERENT_CACHE
33/*
34 * DMA-consistent mapping functions for PowerPCs that don't support
35 * cache snooping. These allocate/free a region of uncached mapped
36 * memory space for use with DMA devices. Alternatively, you could
37 * allocate the space "normally" and use the cache management functions
38 * to ensure it is consistent.
39 */
40struct device;
41extern void *__dma_alloc_coherent(struct device *dev, size_t size,
42 dma_addr_t *handle, gfp_t gfp);
43extern void __dma_free_coherent(size_t size, void *vaddr);
44extern void __dma_sync(void *vaddr, size_t size, int direction);
45extern void __dma_sync_page(struct page *page, unsigned long offset,
46 size_t size, int direction);
47extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
48
49#else /* ! CONFIG_NOT_COHERENT_CACHE */
50/*
51 * Cache coherent cores.
52 */
53
54#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
55#define __dma_free_coherent(size, addr) ((void)0)
56#define __dma_sync(addr, size, rw) ((void)0)
57#define __dma_sync_page(pg, off, sz, rw) ((void)0)
58
59#endif /* ! CONFIG_NOT_COHERENT_CACHE */
60
61static inline unsigned long device_to_mask(struct device *dev)
62{
63 if (dev->dma_mask && *dev->dma_mask)
64 return *dev->dma_mask;
65 /* Assume devices without mask can take 32 bit addresses */
66 return 0xfffffffful;
67}
68
69/*
70 * Available generic sets of operations
71 */
72#ifdef CONFIG_PPC64
73extern struct dma_map_ops dma_iommu_ops;
74#endif
75extern struct dma_map_ops dma_direct_ops;
76
77static inline struct dma_map_ops *get_dma_ops(struct device *dev)
78{
79 /* We don't handle the NULL dev case for ISA for now. We could
80 * do it via an out of line call but it is not needed for now. The
81 * only ISA DMA device we support is the floppy and we have a hack
82 * in the floppy driver directly to get a device for us.
83 */
84 if (unlikely(dev == NULL))
85 return NULL;
86
87 return dev->archdata.dma_ops;
88}
89
90static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
91{
92 dev->archdata.dma_ops = ops;
93}
94
95/*
96 * get_dma_offset()
97 *
98 * Get the dma offset on configurations where the dma address can be determined
99 * from the physical address by looking at a simple offset. Direct dma and
100 * swiotlb use this function, but it is typically not used by implementations
101 * with an iommu.
102 */
103static inline dma_addr_t get_dma_offset(struct device *dev)
104{
105 if (dev)
106 return dev->archdata.dma_data.dma_offset;
107
108 return PCI_DRAM_OFFSET;
109}
110
111static inline void set_dma_offset(struct device *dev, dma_addr_t off)
112{
113 if (dev)
114 dev->archdata.dma_data.dma_offset = off;
115}
116
117/* this will be removed soon */
118#define flush_write_buffers()
119
120#include <asm-generic/dma-mapping-common.h>
121
122static inline int dma_supported(struct device *dev, u64 mask)
123{
124 struct dma_map_ops *dma_ops = get_dma_ops(dev);
125
126 if (unlikely(dma_ops == NULL))
127 return 0;
128 if (dma_ops->dma_supported == NULL)
129 return 1;
130 return dma_ops->dma_supported(dev, mask);
131}
132
133extern int dma_set_mask(struct device *dev, u64 dma_mask);
134
135#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
136
137static inline void *dma_alloc_attrs(struct device *dev, size_t size,
138 dma_addr_t *dma_handle, gfp_t flag,
139 struct dma_attrs *attrs)
140{
141 struct dma_map_ops *dma_ops = get_dma_ops(dev);
142 void *cpu_addr;
143
144 BUG_ON(!dma_ops);
145
146 cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
147
148 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
149
150 return cpu_addr;
151}
152
153#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
154
155static inline void dma_free_attrs(struct device *dev, size_t size,
156 void *cpu_addr, dma_addr_t dma_handle,
157 struct dma_attrs *attrs)
158{
159 struct dma_map_ops *dma_ops = get_dma_ops(dev);
160
161 BUG_ON(!dma_ops);
162
163 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
164
165 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
166}
167
168static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
169{
170 struct dma_map_ops *dma_ops = get_dma_ops(dev);
171
172 if (dma_ops->mapping_error)
173 return dma_ops->mapping_error(dev, dma_addr);
174
175#ifdef CONFIG_PPC64
176 return (dma_addr == DMA_ERROR_CODE);
177#else
178 return 0;
179#endif
180}
181
182static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
183{
184#ifdef CONFIG_SWIOTLB
185 struct dev_archdata *sd = &dev->archdata;
186
187 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
188 return 0;
189#endif
190
191 if (!dev->dma_mask)
192 return 0;
193
194 return addr + size - 1 <= *dev->dma_mask;
195}
196
197static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
198{
199 return paddr + get_dma_offset(dev);
200}
201
202static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
203{
204 return daddr - get_dma_offset(dev);
205}
206
207#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
208#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
209
210extern int dma_mmap_coherent(struct device *, struct vm_area_struct *,
211 void *, dma_addr_t, size_t);
212#define ARCH_HAS_DMA_MMAP_COHERENT
213
214
215static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
216 enum dma_data_direction direction)
217{
218 BUG_ON(direction == DMA_NONE);
219 __dma_sync(vaddr, size, (int)direction);
220}
221
222#endif /* __KERNEL__ */
223#endif /* _ASM_DMA_MAPPING_H */