1/*
  2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
  3 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
  4 *
  5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
  6 *
  7 * Copyright (C) 2011 Meprolight, Ltd.
  8 * Alex Gershgorin <alexg@meprolight.com>
  9 *
 10 * Modified from i.MX31 3-Stack Development System
 11 *
 12 * This program is free software; you can redistribute it and/or modify
 13 * it under the terms of the GNU General Public License as published by
 14 * the Free Software Foundation; either version 2 of the License, or
 15 * (at your option) any later version.
 16 *
 17 * This program is distributed in the hope that it will be useful,
 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 20 * GNU General Public License for more details.
 21 */
 22
 23/*
 24 * This machine is known as:
 25 *  - i.MX35 3-Stack Development System
 26 *  - i.MX35 Platform Development Kit (i.MX35 PDK)
 27 */
 28
 29#include <linux/types.h>
 30#include <linux/init.h>
 31#include <linux/platform_device.h>
 32#include <linux/memory.h>
 33#include <linux/gpio.h>
 34#include <linux/usb/otg.h>
 35
 36#include <linux/mtd/physmap.h>
 37#include <linux/mfd/mc13892.h>
 38#include <linux/regulator/machine.h>
 39
 40#include <asm/mach-types.h>
 41#include <asm/mach/arch.h>
 42#include <asm/mach/time.h>
 43#include <asm/mach/map.h>
 44#include <asm/memblock.h>
 45
 46#include <mach/hardware.h>
 47#include <mach/common.h>
 48#include <mach/iomux-mx35.h>
 49#include <mach/irqs.h>
 50#include <mach/3ds_debugboard.h>
 51#include <video/platform_lcd.h>
 52
 53#include <media/soc_camera.h>
 54
 55#include "devices-imx35.h"
 56
 57#define GPIO_MC9S08DZ60_GPS_ENABLE 0
 58#define GPIO_MC9S08DZ60_HDD_ENABLE 4
 59#define GPIO_MC9S08DZ60_WIFI_ENABLE 5
 60#define GPIO_MC9S08DZ60_LCD_ENABLE 6
 61#define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
 62
 63static const struct fb_videomode fb_modedb[] = {
 64	{
 65		 /* 800x480 @ 55 Hz */
 66		.name = "Ceramate-CLAA070VC01",
 67		.refresh = 55,
 68		.xres = 800,
 69		.yres = 480,
 70		.pixclock = 40000,
 71		.left_margin = 40,
 72		.right_margin = 40,
 73		.upper_margin = 5,
 74		.lower_margin = 5,
 75		.hsync_len = 20,
 76		.vsync_len = 10,
 77		.sync = FB_SYNC_OE_ACT_HIGH,
 78		.vmode = FB_VMODE_NONINTERLACED,
 79		.flag = 0,
 80	 },
 81};
 82
 83static const struct ipu_platform_data mx3_ipu_data __initconst = {
 84	.irq_base = MXC_IPU_IRQ_START,
 85};
 86
 87static struct mx3fb_platform_data mx3fb_pdata __initdata = {
 88	.name = "Ceramate-CLAA070VC01",
 89	.mode = fb_modedb,
 90	.num_modes = ARRAY_SIZE(fb_modedb),
 91};
 92
 93static struct i2c_board_info __initdata i2c_devices_3ds[] = {
 94	{
 95		I2C_BOARD_INFO("mc9s08dz60", 0x69),
 96	},
 97};
 98
 99static int lcd_power_gpio = -ENXIO;
100
101static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
102{
103	return !strcmp(chip->label, data);
104}
105
106static void mx35_3ds_lcd_set_power(
107				struct plat_lcd_data *pd, unsigned int power)
108{
109	struct gpio_chip *chip;
110
111	if (!gpio_is_valid(lcd_power_gpio)) {
112		chip = gpiochip_find(
113				"mc9s08dz60", mc9s08dz60_gpiochip_match);
114		if (chip) {
115			lcd_power_gpio =
116				chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
117			if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
118				pr_err("error: gpio already requested!\n");
119				lcd_power_gpio = -ENXIO;
120			}
121		} else {
122			pr_err("error: didn't find mc9s08dz60 gpio chip\n");
123		}
124	}
125
126	if (gpio_is_valid(lcd_power_gpio))
127		gpio_set_value_cansleep(lcd_power_gpio, power);
128}
129
130static struct plat_lcd_data mx35_3ds_lcd_data = {
131	.set_power = mx35_3ds_lcd_set_power,
132};
133
134static struct platform_device mx35_3ds_lcd = {
135	.name = "platform-lcd",
136	.dev.platform_data = &mx35_3ds_lcd_data,
137};
138
139#define EXPIO_PARENT_INT	gpio_to_irq(IMX_GPIO_NR(1, 1))
140
141static const struct imxuart_platform_data uart_pdata __initconst = {
142	.flags = IMXUART_HAVE_RTSCTS,
143};
144
145static struct physmap_flash_data mx35pdk_flash_data = {
146	.width  = 2,
147};
148
149static struct resource mx35pdk_flash_resource = {
150	.start	= MX35_CS0_BASE_ADDR,
151	.end	= MX35_CS0_BASE_ADDR + SZ_64M - 1,
152	.flags	= IORESOURCE_MEM,
153};
154
155static struct platform_device mx35pdk_flash = {
156	.name	= "physmap-flash",
157	.id	= 0,
158	.dev	= {
159		.platform_data  = &mx35pdk_flash_data,
160	},
161	.resource = &mx35pdk_flash_resource,
162	.num_resources = 1,
163};
164
165static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
166	.width = 1,
167	.hw_ecc = 1,
168	.flash_bbt = 1,
169};
170
171static struct platform_device *devices[] __initdata = {
172	&mx35pdk_flash,
173};
174
175static iomux_v3_cfg_t mx35pdk_pads[] = {
176	/* UART1 */
177	MX35_PAD_CTS1__UART1_CTS,
178	MX35_PAD_RTS1__UART1_RTS,
179	MX35_PAD_TXD1__UART1_TXD_MUX,
180	MX35_PAD_RXD1__UART1_RXD_MUX,
181	/* FEC */
182	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
183	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
184	MX35_PAD_FEC_RX_DV__FEC_RX_DV,
185	MX35_PAD_FEC_COL__FEC_COL,
186	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
187	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
188	MX35_PAD_FEC_TX_EN__FEC_TX_EN,
189	MX35_PAD_FEC_MDC__FEC_MDC,
190	MX35_PAD_FEC_MDIO__FEC_MDIO,
191	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
192	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
193	MX35_PAD_FEC_CRS__FEC_CRS,
194	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
195	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
196	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
197	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
198	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
199	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
200	/* USBOTG */
201	MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
202	MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
203	/* USBH1 */
204	MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
205	MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
206	/* SDCARD */
207	MX35_PAD_SD1_CMD__ESDHC1_CMD,
208	MX35_PAD_SD1_CLK__ESDHC1_CLK,
209	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
210	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
211	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
212	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
213	/* I2C1 */
214	MX35_PAD_I2C1_CLK__I2C1_SCL,
215	MX35_PAD_I2C1_DAT__I2C1_SDA,
216	/* Display */
217	MX35_PAD_LD0__IPU_DISPB_DAT_0,
218	MX35_PAD_LD1__IPU_DISPB_DAT_1,
219	MX35_PAD_LD2__IPU_DISPB_DAT_2,
220	MX35_PAD_LD3__IPU_DISPB_DAT_3,
221	MX35_PAD_LD4__IPU_DISPB_DAT_4,
222	MX35_PAD_LD5__IPU_DISPB_DAT_5,
223	MX35_PAD_LD6__IPU_DISPB_DAT_6,
224	MX35_PAD_LD7__IPU_DISPB_DAT_7,
225	MX35_PAD_LD8__IPU_DISPB_DAT_8,
226	MX35_PAD_LD9__IPU_DISPB_DAT_9,
227	MX35_PAD_LD10__IPU_DISPB_DAT_10,
228	MX35_PAD_LD11__IPU_DISPB_DAT_11,
229	MX35_PAD_LD12__IPU_DISPB_DAT_12,
230	MX35_PAD_LD13__IPU_DISPB_DAT_13,
231	MX35_PAD_LD14__IPU_DISPB_DAT_14,
232	MX35_PAD_LD15__IPU_DISPB_DAT_15,
233	MX35_PAD_LD16__IPU_DISPB_DAT_16,
234	MX35_PAD_LD17__IPU_DISPB_DAT_17,
235	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
236	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
237	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
238	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
239	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
240	MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
241	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
242	/* CSI */
243	MX35_PAD_TX1__IPU_CSI_D_6,
244	MX35_PAD_TX0__IPU_CSI_D_7,
245	MX35_PAD_CSI_D8__IPU_CSI_D_8,
246	MX35_PAD_CSI_D9__IPU_CSI_D_9,
247	MX35_PAD_CSI_D10__IPU_CSI_D_10,
248	MX35_PAD_CSI_D11__IPU_CSI_D_11,
249	MX35_PAD_CSI_D12__IPU_CSI_D_12,
250	MX35_PAD_CSI_D13__IPU_CSI_D_13,
251	MX35_PAD_CSI_D14__IPU_CSI_D_14,
252	MX35_PAD_CSI_D15__IPU_CSI_D_15,
253	MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
254	MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
255	MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
256	MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
257	/*PMIC IRQ*/
258	MX35_PAD_GPIO2_0__GPIO2_0,
259};
260
261/*
262 * Camera support
263*/
264static phys_addr_t mx3_camera_base __initdata;
265#define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
266
267static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
268	.flags = MX3_CAMERA_DATAWIDTH_8,
269	.mclk_10khz = 2000,
270};
271
272static int __init imx35_3ds_init_camera(void)
273{
274	int dma, ret = -ENOMEM;
275	struct platform_device *pdev =
276		imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
277
278	if (IS_ERR(pdev))
279		return PTR_ERR(pdev);
280
281	if (!mx3_camera_base)
282		goto err;
283
284	dma = dma_declare_coherent_memory(&pdev->dev,
285					mx3_camera_base, mx3_camera_base,
286					MX35_3DS_CAMERA_BUF_SIZE,
287					DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
288
289	if (!(dma & DMA_MEMORY_MAP))
290		goto err;
291
292	ret = platform_device_add(pdev);
293	if (ret)
294err:
295		platform_device_put(pdev);
296
297	return ret;
298}
299
300static const struct ipu_platform_data mx35_3ds_ipu_data __initconst = {
301	.irq_base = MXC_IPU_IRQ_START,
302};
303
304static struct i2c_board_info mx35_3ds_i2c_camera = {
305	I2C_BOARD_INFO("ov2640", 0x30),
306};
307
308static struct soc_camera_link iclink_ov2640 = {
309	.bus_id		= 0,
310	.board_info	= &mx35_3ds_i2c_camera,
311	.i2c_adapter_id	= 0,
312	.power		= NULL,
313};
314
315static struct platform_device mx35_3ds_ov2640 = {
316	.name	= "soc-camera-pdrv",
317	.id	= 0,
318	.dev	= {
319		.platform_data = &iclink_ov2640,
320	},
321};
322
323static struct regulator_consumer_supply sw1_consumers[] = {
324	{
325		.supply = "cpu_vcc",
326	}
327};
328
329static struct regulator_consumer_supply vcam_consumers[] = {
330	/* sgtl5000 */
331	REGULATOR_SUPPLY("VDDA", "0-000a"),
332};
333
334static struct regulator_consumer_supply vaudio_consumers[] = {
335	REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
336};
337
338static struct regulator_init_data sw1_init = {
339	.constraints = {
340		.name = "SW1",
341		.min_uV = 600000,
342		.max_uV = 1375000,
343		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
344		.valid_modes_mask = 0,
345		.always_on = 1,
346		.boot_on = 1,
347	},
348	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
349	.consumer_supplies = sw1_consumers,
350};
351
352static struct regulator_init_data sw2_init = {
353	.constraints = {
354		.name = "SW2",
355		.always_on = 1,
356		.boot_on = 1,
357	}
358};
359
360static struct regulator_init_data sw3_init = {
361	.constraints = {
362		.name = "SW3",
363		.always_on = 1,
364		.boot_on = 1,
365	}
366};
367
368static struct regulator_init_data sw4_init = {
369	.constraints = {
370		.name = "SW4",
371		.always_on = 1,
372		.boot_on = 1,
373	}
374};
375
376static struct regulator_init_data viohi_init = {
377	.constraints = {
378		.name = "VIOHI",
379		.boot_on = 1,
380	}
381};
382
383static struct regulator_init_data vusb_init = {
384	.constraints = {
385		.name = "VUSB",
386		.boot_on = 1,
387	}
388};
389
390static struct regulator_init_data vdig_init = {
391	.constraints = {
392		.name = "VDIG",
393		.boot_on = 1,
394	}
395};
396
397static struct regulator_init_data vpll_init = {
398	.constraints = {
399		.name = "VPLL",
400		.boot_on = 1,
401	}
402};
403
404static struct regulator_init_data vusb2_init = {
405	.constraints = {
406		.name = "VUSB2",
407		.boot_on = 1,
408	}
409};
410
411static struct regulator_init_data vvideo_init = {
412	.constraints = {
413		.name = "VVIDEO",
414		.boot_on = 1
415	}
416};
417
418static struct regulator_init_data vaudio_init = {
419	.constraints = {
420		.name = "VAUDIO",
421		.min_uV = 2300000,
422		.max_uV = 3000000,
423		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
424		.boot_on = 1
425	},
426	.num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
427	.consumer_supplies = vaudio_consumers,
428};
429
430static struct regulator_init_data vcam_init = {
431	.constraints = {
432		.name = "VCAM",
433		.min_uV = 2500000,
434		.max_uV = 3000000,
435		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
436					REGULATOR_CHANGE_MODE,
437		.valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
438		.boot_on = 1
439	},
440	.num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
441	.consumer_supplies = vcam_consumers,
442};
443
444static struct regulator_init_data vgen1_init = {
445	.constraints = {
446		.name = "VGEN1",
447	}
448};
449
450static struct regulator_init_data vgen2_init = {
451	.constraints = {
452		.name = "VGEN2",
453		.boot_on = 1,
454	}
455};
456
457static struct regulator_init_data vgen3_init = {
458	.constraints = {
459		.name = "VGEN3",
460	}
461};
462
463static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
464	{ .id = MC13892_SW1, .init_data = &sw1_init },
465	{ .id = MC13892_SW2, .init_data = &sw2_init },
466	{ .id = MC13892_SW3, .init_data = &sw3_init },
467	{ .id = MC13892_SW4, .init_data = &sw4_init },
468	{ .id = MC13892_VIOHI, .init_data = &viohi_init },
469	{ .id = MC13892_VPLL, .init_data = &vpll_init },
470	{ .id = MC13892_VDIG, .init_data = &vdig_init },
471	{ .id = MC13892_VUSB2, .init_data = &vusb2_init },
472	{ .id = MC13892_VVIDEO, .init_data = &vvideo_init },
473	{ .id = MC13892_VAUDIO, .init_data = &vaudio_init },
474	{ .id = MC13892_VCAM, .init_data = &vcam_init },
475	{ .id = MC13892_VGEN1, .init_data = &vgen1_init },
476	{ .id = MC13892_VGEN2, .init_data = &vgen2_init },
477	{ .id = MC13892_VGEN3, .init_data = &vgen3_init },
478	{ .id = MC13892_VUSB, .init_data = &vusb_init },
479};
480
481static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
482	.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
483	.regulators = {
484		.num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
485		.regulators = mx35_3ds_regulators,
486	},
487};
488
489#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
490
491static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
492
493	I2C_BOARD_INFO("mc13892", 0x08),
494	.platform_data = &mx35_3ds_mc13892_data,
495	.irq = IMX_GPIO_TO_IRQ(GPIO_PMIC_INT),
496};
497
498static void __init imx35_3ds_init_mc13892(void)
499{
500	int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
501
502	if (ret) {
503		pr_err("failed to get pmic irq: %d\n", ret);
504		return;
505	}
506
507	i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
508}
509
510static int mx35_3ds_otg_init(struct platform_device *pdev)
511{
512	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
513}
514
515/* OTG config */
516static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
517	.operating_mode	= FSL_USB2_DR_DEVICE,
518	.phy_mode	= FSL_USB2_PHY_UTMI_WIDE,
519	.workaround	= FLS_USB2_WORKAROUND_ENGCM09152,
520/*
521 * ENGCM09152 also requires a hardware change.
522 * Please check the MX35 Chip Errata document for details.
523 */
524};
525
526static struct mxc_usbh_platform_data otg_pdata __initdata = {
527	.init	= mx35_3ds_otg_init,
528	.portsc	= MXC_EHCI_MODE_UTMI,
529};
530
531static int mx35_3ds_usbh_init(struct platform_device *pdev)
532{
533	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
534			  MXC_EHCI_INTERNAL_PHY);
535}
536
537/* USB HOST config */
538static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
539	.init		= mx35_3ds_usbh_init,
540	.portsc		= MXC_EHCI_MODE_SERIAL,
541};
542
543static int otg_mode_host;
544
545static int __init mx35_3ds_otg_mode(char *options)
546{
547	if (!strcmp(options, "host"))
548		otg_mode_host = 1;
549	else if (!strcmp(options, "device"))
550		otg_mode_host = 0;
551	else
552		pr_info("otg_mode neither \"host\" nor \"device\". "
553			"Defaulting to device\n");
554	return 0;
555}
556__setup("otg_mode=", mx35_3ds_otg_mode);
557
558static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
559	.bitrate = 100000,
560};
561
562/*
563 * Board specific initialization.
564 */
565static void __init mx35_3ds_init(void)
566{
567	struct platform_device *imx35_fb_pdev;
568
569	imx35_soc_init();
570
571	mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
572
573	imx35_add_fec(NULL);
574	imx35_add_imx2_wdt(NULL);
575	platform_add_devices(devices, ARRAY_SIZE(devices));
576
577	imx35_add_imx_uart0(&uart_pdata);
578
579	if (otg_mode_host)
580		imx35_add_mxc_ehci_otg(&otg_pdata);
581
582	imx35_add_mxc_ehci_hs(&usb_host_pdata);
583
584	if (!otg_mode_host)
585		imx35_add_fsl_usb2_udc(&usb_otg_pdata);
586
587	imx35_add_mxc_nand(&mx35pdk_nand_board_info);
588	imx35_add_sdhci_esdhc_imx(0, NULL);
589
590	if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT))
591		pr_warn("Init of the debugboard failed, all "
592				"devices on the debugboard are unusable.\n");
593	imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
594
595	i2c_register_board_info(
596		0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
597
598	imx35_add_ipu_core(&mx35_3ds_ipu_data);
599	platform_device_register(&mx35_3ds_ov2640);
600	imx35_3ds_init_camera();
601
602	imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
603	mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
604	platform_device_register(&mx35_3ds_lcd);
605
606	imx35_3ds_init_mc13892();
607}
608
609static void __init mx35pdk_timer_init(void)
610{
611	mx35_clocks_init();
612}
613
614static struct sys_timer mx35pdk_timer = {
615	.init	= mx35pdk_timer_init,
616};
617
618static void __init mx35_3ds_reserve(void)
619{
620	/* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
621	mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
622					 MX35_3DS_CAMERA_BUF_SIZE);
623}
624
625MACHINE_START(MX35_3DS, "Freescale MX35PDK")
626	/* Maintainer: Freescale Semiconductor, Inc */
627	.atag_offset = 0x100,
628	.map_io = mx35_map_io,
629	.init_early = imx35_init_early,
630	.init_irq = mx35_init_irq,
631	.handle_irq = imx35_handle_irq,
632	.timer = &mx35pdk_timer,
633	.init_machine = mx35_3ds_init,
634	.reserve = mx35_3ds_reserve,
635	.restart	= mxc_restart,
636MACHINE_END