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  1/*
  2 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
  3 *
  4 * Based on pcm038.c which is :
  5 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License
 10 * as published by the Free Software Foundation; either version 2
 11 * of the License, or (at your option) any later version.
 12 * This program is distributed in the hope that it will be useful,
 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 * GNU General Public License for more details.
 16 *
 17 * You should have received a copy of the GNU General Public License
 18 * along with this program; if not, write to the Free Software
 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 20 * MA 02110-1301, USA.
 21 */
 22
 23#include <linux/i2c.h>
 24#include <linux/io.h>
 25#include <linux/mtd/plat-ram.h>
 26#include <linux/mtd/physmap.h>
 27#include <linux/platform_device.h>
 28#include <linux/serial_8250.h>
 29#include <linux/usb/otg.h>
 30#include <linux/usb/ulpi.h>
 31
 32#include <asm/mach-types.h>
 33#include <asm/mach/arch.h>
 34#include <asm/mach/time.h>
 35#include <asm/mach/map.h>
 36
 37#include <mach/eukrea-baseboards.h>
 38#include <mach/common.h>
 39#include <mach/hardware.h>
 40#include <mach/iomux-mx27.h>
 41#include <mach/ulpi.h>
 42
 43#include "devices-imx27.h"
 44
 45static const int eukrea_cpuimx27_pins[] __initconst = {
 46	/* UART1 */
 47	PE12_PF_UART1_TXD,
 48	PE13_PF_UART1_RXD,
 49	PE14_PF_UART1_CTS,
 50	PE15_PF_UART1_RTS,
 51	/* UART4 */
 52#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
 53	PB26_AF_UART4_RTS,
 54	PB28_AF_UART4_TXD,
 55	PB29_AF_UART4_CTS,
 56	PB31_AF_UART4_RXD,
 57#endif
 58	/* FEC */
 59	PD0_AIN_FEC_TXD0,
 60	PD1_AIN_FEC_TXD1,
 61	PD2_AIN_FEC_TXD2,
 62	PD3_AIN_FEC_TXD3,
 63	PD4_AOUT_FEC_RX_ER,
 64	PD5_AOUT_FEC_RXD1,
 65	PD6_AOUT_FEC_RXD2,
 66	PD7_AOUT_FEC_RXD3,
 67	PD8_AF_FEC_MDIO,
 68	PD9_AIN_FEC_MDC,
 69	PD10_AOUT_FEC_CRS,
 70	PD11_AOUT_FEC_TX_CLK,
 71	PD12_AOUT_FEC_RXD0,
 72	PD13_AOUT_FEC_RX_DV,
 73	PD14_AOUT_FEC_RX_CLK,
 74	PD15_AOUT_FEC_COL,
 75	PD16_AIN_FEC_TX_ER,
 76	PF23_AIN_FEC_TX_EN,
 77	/* I2C1 */
 78	PD17_PF_I2C_DATA,
 79	PD18_PF_I2C_CLK,
 80	/* SDHC2 */
 81#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
 82	PB4_PF_SD2_D0,
 83	PB5_PF_SD2_D1,
 84	PB6_PF_SD2_D2,
 85	PB7_PF_SD2_D3,
 86	PB8_PF_SD2_CMD,
 87	PB9_PF_SD2_CLK,
 88#endif
 89#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 90	/* Quad UART's IRQ */
 91	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
 92	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
 93	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
 94	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
 95#endif
 96	/* OTG */
 97	PC7_PF_USBOTG_DATA5,
 98	PC8_PF_USBOTG_DATA6,
 99	PC9_PF_USBOTG_DATA0,
100	PC10_PF_USBOTG_DATA2,
101	PC11_PF_USBOTG_DATA1,
102	PC12_PF_USBOTG_DATA4,
103	PC13_PF_USBOTG_DATA3,
104	PE0_PF_USBOTG_NXT,
105	PE1_PF_USBOTG_STP,
106	PE2_PF_USBOTG_DIR,
107	PE24_PF_USBOTG_CLK,
108	PE25_PF_USBOTG_DATA7,
109	/* USBH2 */
110	PA0_PF_USBH2_CLK,
111	PA1_PF_USBH2_DIR,
112	PA2_PF_USBH2_DATA7,
113	PA3_PF_USBH2_NXT,
114	PA4_PF_USBH2_STP,
115	PD19_AF_USBH2_DATA4,
116	PD20_AF_USBH2_DATA3,
117	PD21_AF_USBH2_DATA6,
118	PD22_AF_USBH2_DATA0,
119	PD23_AF_USBH2_DATA2,
120	PD24_AF_USBH2_DATA1,
121	PD26_AF_USBH2_DATA5,
122};
123
124static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
125	.width = 2,
126};
127
128static struct resource eukrea_cpuimx27_flash_resource = {
129	.start = 0xc0000000,
130	.end   = 0xc3ffffff,
131	.flags = IORESOURCE_MEM,
132};
133
134static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
135	.name = "physmap-flash",
136	.id = 0,
137	.dev = {
138		.platform_data = &eukrea_cpuimx27_flash_data,
139	},
140	.num_resources = 1,
141	.resource = &eukrea_cpuimx27_flash_resource,
142};
143
144static const struct imxuart_platform_data uart_pdata __initconst = {
145	.flags = IMXUART_HAVE_RTSCTS,
146};
147
148static const struct mxc_nand_platform_data
149cpuimx27_nand_board_info __initconst = {
150	.width = 1,
151	.hw_ecc = 1,
152};
153
154static struct platform_device *platform_devices[] __initdata = {
155	&eukrea_cpuimx27_nor_mtd_device,
156};
157
158static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
159	.bitrate = 100000,
160};
161
162static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
163	{
164		I2C_BOARD_INFO("pcf8563", 0x51),
165	},
166};
167
168#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
169static struct plat_serial8250_port serial_platform_data[] = {
170	{
171		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
172		.irq = IRQ_GPIOB(23),
173		.uartclk = 14745600,
174		.regshift = 1,
175		.iotype = UPIO_MEM,
176		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
177	}, {
178		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
179		.irq = IRQ_GPIOB(22),
180		.uartclk = 14745600,
181		.regshift = 1,
182		.iotype = UPIO_MEM,
183		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
184	}, {
185		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
186		.irq = IRQ_GPIOB(27),
187		.uartclk = 14745600,
188		.regshift = 1,
189		.iotype = UPIO_MEM,
190		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
191	}, {
192		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
193		.irq = IRQ_GPIOB(30),
194		.uartclk = 14745600,
195		.regshift = 1,
196		.iotype = UPIO_MEM,
197		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
198	}, {
199	}
200};
201
202static struct platform_device serial_device = {
203	.name = "serial8250",
204	.id = 0,
205	.dev = {
206		.platform_data = serial_platform_data,
207	},
208};
209#endif
210
211static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
212{
213	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
214}
215
216static struct mxc_usbh_platform_data otg_pdata __initdata = {
217	.init	= eukrea_cpuimx27_otg_init,
218	.portsc	= MXC_EHCI_MODE_ULPI,
219};
220
221static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
222{
223	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
224}
225
226static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
227	.init	= eukrea_cpuimx27_usbh2_init,
228	.portsc	= MXC_EHCI_MODE_ULPI,
229};
230
231static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
232	.operating_mode = FSL_USB2_DR_DEVICE,
233	.phy_mode       = FSL_USB2_PHY_ULPI,
234};
235
236static int otg_mode_host;
237
238static int __init eukrea_cpuimx27_otg_mode(char *options)
239{
240	if (!strcmp(options, "host"))
241		otg_mode_host = 1;
242	else if (!strcmp(options, "device"))
243		otg_mode_host = 0;
244	else
245		pr_info("otg_mode neither \"host\" nor \"device\". "
246			"Defaulting to device\n");
247	return 0;
248}
249__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
250
251static void __init eukrea_cpuimx27_init(void)
252{
253	imx27_soc_init();
254
255	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
256		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
257
258	imx27_add_imx_uart0(&uart_pdata);
259
260	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
261
262	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
263				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
264
265	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
266
267	imx27_add_fec(NULL);
268	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
269	imx27_add_imx2_wdt(NULL);
270	imx27_add_mxc_w1(NULL);
271
272#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
273	/* SDHC2 can be used for Wifi */
274	imx27_add_mxc_mmc(1, NULL);
275#endif
276#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
277	/* in which case UART4 is also used for Bluetooth */
278	imx27_add_imx_uart3(&uart_pdata);
279#endif
280
281#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
282	platform_device_register(&serial_device);
283#endif
284
285	if (otg_mode_host) {
286		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
287				ULPI_OTG_DRVVBUS_EXT);
288		if (otg_pdata.otg)
289			imx27_add_mxc_ehci_otg(&otg_pdata);
290	} else {
291		imx27_add_fsl_usb2_udc(&otg_device_pdata);
292	}
293
294	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
295			ULPI_OTG_DRVVBUS_EXT);
296	if (usbh2_pdata.otg)
297		imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
298
299#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
300	eukrea_mbimx27_baseboard_init();
301#endif
302}
303
304static void __init eukrea_cpuimx27_timer_init(void)
305{
306	mx27_clocks_init(26000000);
307}
308
309static struct sys_timer eukrea_cpuimx27_timer = {
310	.init = eukrea_cpuimx27_timer_init,
311};
312
313MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
314	.atag_offset = 0x100,
315	.map_io = mx27_map_io,
316	.init_early = imx27_init_early,
317	.init_irq = mx27_init_irq,
318	.handle_irq = imx27_handle_irq,
319	.timer = &eukrea_cpuimx27_timer,
320	.init_machine = eukrea_cpuimx27_init,
321	.restart	= mxc_restart,
322MACHINE_END