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1/*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15/**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/leds.h>
22#include <linux/gpio.h>
23#include <linux/platform_device.h>
24#include <linux/i2c.h>
25#include <linux/i2c/at24.h>
26#include <linux/i2c/pcf857x.h>
27
28#include <media/tvp514x.h>
29
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/nand.h>
32#include <linux/mtd/partitions.h>
33#include <linux/clk.h>
34#include <linux/export.h>
35
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38
39#include <mach/common.h>
40#include <mach/serial.h>
41#include <mach/i2c.h>
42#include <mach/nand.h>
43#include <mach/clock.h>
44#include <mach/cdce949.h>
45#include <mach/aemif.h>
46
47#include "davinci.h"
48#include "clock.h"
49
50#define NAND_BLOCK_SIZE SZ_128K
51
52/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
53 * and U-Boot environment this avoids dependency on any particular combination
54 * of UBL, U-Boot or flashing tools etc.
55 */
56static struct mtd_partition davinci_nand_partitions[] = {
57 {
58 /* UBL, U-Boot with environment */
59 .name = "bootloader",
60 .offset = MTDPART_OFS_APPEND,
61 .size = 16 * NAND_BLOCK_SIZE,
62 .mask_flags = MTD_WRITEABLE, /* force read-only */
63 }, {
64 .name = "kernel",
65 .offset = MTDPART_OFS_APPEND,
66 .size = SZ_4M,
67 .mask_flags = 0,
68 }, {
69 .name = "filesystem",
70 .offset = MTDPART_OFS_APPEND,
71 .size = MTDPART_SIZ_FULL,
72 .mask_flags = 0,
73 }
74};
75
76static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
77 .wsetup = 29,
78 .wstrobe = 24,
79 .whold = 14,
80 .rsetup = 19,
81 .rstrobe = 33,
82 .rhold = 0,
83 .ta = 29,
84};
85
86static struct davinci_nand_pdata davinci_nand_data = {
87 .mask_cle = 0x80000,
88 .mask_ale = 0x40000,
89 .parts = davinci_nand_partitions,
90 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
91 .ecc_mode = NAND_ECC_HW,
92 .options = 0,
93};
94
95static struct resource davinci_nand_resources[] = {
96 {
97 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
98 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
99 .flags = IORESOURCE_MEM,
100 }, {
101 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
102 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
103 .flags = IORESOURCE_MEM,
104 },
105};
106
107static struct platform_device davinci_nand_device = {
108 .name = "davinci_nand",
109 .id = 0,
110
111 .num_resources = ARRAY_SIZE(davinci_nand_resources),
112 .resource = davinci_nand_resources,
113
114 .dev = {
115 .platform_data = &davinci_nand_data,
116 },
117};
118
119#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
120 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
121#define HAS_ATA 1
122#else
123#define HAS_ATA 0
124#endif
125
126/* CPLD Register 0 bits to control ATA */
127#define DM646X_EVM_ATA_RST BIT(0)
128#define DM646X_EVM_ATA_PWD BIT(1)
129
130/* CPLD Register 0 Client: used for I/O Control */
131static int cpld_reg0_probe(struct i2c_client *client,
132 const struct i2c_device_id *id)
133{
134 if (HAS_ATA) {
135 u8 data;
136 struct i2c_msg msg[2] = {
137 {
138 .addr = client->addr,
139 .flags = I2C_M_RD,
140 .len = 1,
141 .buf = &data,
142 },
143 {
144 .addr = client->addr,
145 .flags = 0,
146 .len = 1,
147 .buf = &data,
148 },
149 };
150
151 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
152 i2c_transfer(client->adapter, msg, 1);
153 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
154 i2c_transfer(client->adapter, msg + 1, 1);
155 }
156
157 return 0;
158}
159
160static const struct i2c_device_id cpld_reg_ids[] = {
161 { "cpld_reg0", 0, },
162 { },
163};
164
165static struct i2c_driver dm6467evm_cpld_driver = {
166 .driver.name = "cpld_reg0",
167 .id_table = cpld_reg_ids,
168 .probe = cpld_reg0_probe,
169};
170
171/* LEDS */
172
173static struct gpio_led evm_leds[] = {
174 { .name = "DS1", .active_low = 1, },
175 { .name = "DS2", .active_low = 1, },
176 { .name = "DS3", .active_low = 1, },
177 { .name = "DS4", .active_low = 1, },
178};
179
180static const struct gpio_led_platform_data evm_led_data = {
181 .num_leds = ARRAY_SIZE(evm_leds),
182 .leds = evm_leds,
183};
184
185static struct platform_device *evm_led_dev;
186
187static int evm_led_setup(struct i2c_client *client, int gpio,
188 unsigned int ngpio, void *c)
189{
190 struct gpio_led *leds = evm_leds;
191 int status;
192
193 while (ngpio--) {
194 leds->gpio = gpio++;
195 leds++;
196 };
197
198 evm_led_dev = platform_device_alloc("leds-gpio", 0);
199 platform_device_add_data(evm_led_dev, &evm_led_data,
200 sizeof(evm_led_data));
201
202 evm_led_dev->dev.parent = &client->dev;
203 status = platform_device_add(evm_led_dev);
204 if (status < 0) {
205 platform_device_put(evm_led_dev);
206 evm_led_dev = NULL;
207 }
208 return status;
209}
210
211static int evm_led_teardown(struct i2c_client *client, int gpio,
212 unsigned ngpio, void *c)
213{
214 if (evm_led_dev) {
215 platform_device_unregister(evm_led_dev);
216 evm_led_dev = NULL;
217 }
218 return 0;
219}
220
221static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
222
223static int evm_sw_setup(struct i2c_client *client, int gpio,
224 unsigned ngpio, void *c)
225{
226 int status;
227 int i;
228 char label[10];
229
230 for (i = 0; i < 4; ++i) {
231 snprintf(label, 10, "user_sw%d", i);
232 status = gpio_request(gpio, label);
233 if (status)
234 goto out_free;
235 evm_sw_gpio[i] = gpio++;
236
237 status = gpio_direction_input(evm_sw_gpio[i]);
238 if (status) {
239 gpio_free(evm_sw_gpio[i]);
240 evm_sw_gpio[i] = -EINVAL;
241 goto out_free;
242 }
243
244 status = gpio_export(evm_sw_gpio[i], 0);
245 if (status) {
246 gpio_free(evm_sw_gpio[i]);
247 evm_sw_gpio[i] = -EINVAL;
248 goto out_free;
249 }
250 }
251 return status;
252out_free:
253 for (i = 0; i < 4; ++i) {
254 if (evm_sw_gpio[i] != -EINVAL) {
255 gpio_free(evm_sw_gpio[i]);
256 evm_sw_gpio[i] = -EINVAL;
257 }
258 }
259 return status;
260}
261
262static int evm_sw_teardown(struct i2c_client *client, int gpio,
263 unsigned ngpio, void *c)
264{
265 int i;
266
267 for (i = 0; i < 4; ++i) {
268 if (evm_sw_gpio[i] != -EINVAL) {
269 gpio_unexport(evm_sw_gpio[i]);
270 gpio_free(evm_sw_gpio[i]);
271 evm_sw_gpio[i] = -EINVAL;
272 }
273 }
274 return 0;
275}
276
277static int evm_pcf_setup(struct i2c_client *client, int gpio,
278 unsigned int ngpio, void *c)
279{
280 int status;
281
282 if (ngpio < 8)
283 return -EINVAL;
284
285 status = evm_sw_setup(client, gpio, 4, c);
286 if (status)
287 return status;
288
289 return evm_led_setup(client, gpio+4, 4, c);
290}
291
292static int evm_pcf_teardown(struct i2c_client *client, int gpio,
293 unsigned int ngpio, void *c)
294{
295 BUG_ON(ngpio < 8);
296
297 evm_sw_teardown(client, gpio, 4, c);
298 evm_led_teardown(client, gpio+4, 4, c);
299
300 return 0;
301}
302
303static struct pcf857x_platform_data pcf_data = {
304 .gpio_base = DAVINCI_N_GPIO+1,
305 .setup = evm_pcf_setup,
306 .teardown = evm_pcf_teardown,
307};
308
309/* Most of this EEPROM is unused, but U-Boot uses some data:
310 * - 0x7f00, 6 bytes Ethernet Address
311 * - ... newer boards may have more
312 */
313
314static struct at24_platform_data eeprom_info = {
315 .byte_len = (256*1024) / 8,
316 .page_size = 64,
317 .flags = AT24_FLAG_ADDR16,
318 .setup = davinci_get_mac_addr,
319 .context = (void *)0x7f00,
320};
321
322static u8 dm646x_iis_serializer_direction[] = {
323 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
324};
325
326static u8 dm646x_dit_serializer_direction[] = {
327 TX_MODE,
328};
329
330static struct snd_platform_data dm646x_evm_snd_data[] = {
331 {
332 .tx_dma_offset = 0x400,
333 .rx_dma_offset = 0x400,
334 .op_mode = DAVINCI_MCASP_IIS_MODE,
335 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
336 .tdm_slots = 2,
337 .serial_dir = dm646x_iis_serializer_direction,
338 .asp_chan_q = EVENTQ_0,
339 },
340 {
341 .tx_dma_offset = 0x400,
342 .rx_dma_offset = 0,
343 .op_mode = DAVINCI_MCASP_DIT_MODE,
344 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
345 .tdm_slots = 32,
346 .serial_dir = dm646x_dit_serializer_direction,
347 .asp_chan_q = EVENTQ_0,
348 },
349};
350
351static struct i2c_client *cpld_client;
352
353static int cpld_video_probe(struct i2c_client *client,
354 const struct i2c_device_id *id)
355{
356 cpld_client = client;
357 return 0;
358}
359
360static int __devexit cpld_video_remove(struct i2c_client *client)
361{
362 cpld_client = NULL;
363 return 0;
364}
365
366static const struct i2c_device_id cpld_video_id[] = {
367 { "cpld_video", 0 },
368 { }
369};
370
371static struct i2c_driver cpld_video_driver = {
372 .driver = {
373 .name = "cpld_video",
374 },
375 .probe = cpld_video_probe,
376 .remove = cpld_video_remove,
377 .id_table = cpld_video_id,
378};
379
380static void evm_init_cpld(void)
381{
382 i2c_add_driver(&cpld_video_driver);
383}
384
385static struct i2c_board_info __initdata i2c_info[] = {
386 {
387 I2C_BOARD_INFO("24c256", 0x50),
388 .platform_data = &eeprom_info,
389 },
390 {
391 I2C_BOARD_INFO("pcf8574a", 0x38),
392 .platform_data = &pcf_data,
393 },
394 {
395 I2C_BOARD_INFO("cpld_reg0", 0x3a),
396 },
397 {
398 I2C_BOARD_INFO("tlv320aic33", 0x18),
399 },
400 {
401 I2C_BOARD_INFO("cpld_video", 0x3b),
402 },
403 {
404 I2C_BOARD_INFO("cdce949", 0x6c),
405 },
406};
407
408static struct davinci_i2c_platform_data i2c_pdata = {
409 .bus_freq = 100 /* kHz */,
410 .bus_delay = 0 /* usec */,
411};
412
413#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
414#define VCH2CLK_SYSCLK8 (BIT(9))
415#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
416#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
417#define VCH3CLK_SYSCLK8 (BIT(13))
418#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
419
420#define VIDCH2CLK (BIT(10))
421#define VIDCH3CLK (BIT(11))
422#define VIDCH1CLK (BIT(4))
423#define TVP7002_INPUT (BIT(4))
424#define TVP5147_INPUT (~BIT(4))
425#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
426#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
427#define TVP5147_CH0 "tvp514x-0"
428#define TVP5147_CH1 "tvp514x-1"
429
430/* spin lock for updating above registers */
431static spinlock_t vpif_reg_lock;
432
433static int set_vpif_clock(int mux_mode, int hd)
434{
435 unsigned long flags;
436 unsigned int value;
437 int val = 0;
438 int err = 0;
439
440 if (!cpld_client)
441 return -ENXIO;
442
443 /* disable the clock */
444 spin_lock_irqsave(&vpif_reg_lock, flags);
445 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
446 value |= (VIDCH3CLK | VIDCH2CLK);
447 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
448 spin_unlock_irqrestore(&vpif_reg_lock, flags);
449
450 val = i2c_smbus_read_byte(cpld_client);
451 if (val < 0)
452 return val;
453
454 if (mux_mode == 1)
455 val &= ~0x40;
456 else
457 val |= 0x40;
458
459 err = i2c_smbus_write_byte(cpld_client, val);
460 if (err)
461 return err;
462
463 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
464 value &= ~(VCH2CLK_MASK);
465 value &= ~(VCH3CLK_MASK);
466
467 if (hd >= 1)
468 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
469 else
470 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
471
472 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
473
474 spin_lock_irqsave(&vpif_reg_lock, flags);
475 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
476 /* enable the clock */
477 value &= ~(VIDCH3CLK | VIDCH2CLK);
478 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
479 spin_unlock_irqrestore(&vpif_reg_lock, flags);
480
481 return 0;
482}
483
484static struct vpif_subdev_info dm646x_vpif_subdev[] = {
485 {
486 .name = "adv7343",
487 .board_info = {
488 I2C_BOARD_INFO("adv7343", 0x2a),
489 },
490 },
491 {
492 .name = "ths7303",
493 .board_info = {
494 I2C_BOARD_INFO("ths7303", 0x2c),
495 },
496 },
497};
498
499static const char *output[] = {
500 "Composite",
501 "Component",
502 "S-Video",
503};
504
505static struct vpif_display_config dm646x_vpif_display_config = {
506 .set_clock = set_vpif_clock,
507 .subdevinfo = dm646x_vpif_subdev,
508 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
509 .output = output,
510 .output_count = ARRAY_SIZE(output),
511 .card_name = "DM646x EVM",
512};
513
514/**
515 * setup_vpif_input_path()
516 * @channel: channel id (0 - CH0, 1 - CH1)
517 * @sub_dev_name: ptr sub device name
518 *
519 * This will set vpif input to capture data from tvp514x or
520 * tvp7002.
521 */
522static int setup_vpif_input_path(int channel, const char *sub_dev_name)
523{
524 int err = 0;
525 int val;
526
527 /* for channel 1, we don't do anything */
528 if (channel != 0)
529 return 0;
530
531 if (!cpld_client)
532 return -ENXIO;
533
534 val = i2c_smbus_read_byte(cpld_client);
535 if (val < 0)
536 return val;
537
538 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
539 !strcmp(sub_dev_name, TVP5147_CH1))
540 val &= TVP5147_INPUT;
541 else
542 val |= TVP7002_INPUT;
543
544 err = i2c_smbus_write_byte(cpld_client, val);
545 if (err)
546 return err;
547 return 0;
548}
549
550/**
551 * setup_vpif_input_channel_mode()
552 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
553 *
554 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
555 */
556static int setup_vpif_input_channel_mode(int mux_mode)
557{
558 unsigned long flags;
559 int err = 0;
560 int val;
561 u32 value;
562
563 if (!cpld_client)
564 return -ENXIO;
565
566 val = i2c_smbus_read_byte(cpld_client);
567 if (val < 0)
568 return val;
569
570 spin_lock_irqsave(&vpif_reg_lock, flags);
571 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
572 if (mux_mode) {
573 val &= VPIF_INPUT_TWO_CHANNEL;
574 value |= VIDCH1CLK;
575 } else {
576 val |= VPIF_INPUT_ONE_CHANNEL;
577 value &= ~VIDCH1CLK;
578 }
579 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
580 spin_unlock_irqrestore(&vpif_reg_lock, flags);
581
582 err = i2c_smbus_write_byte(cpld_client, val);
583 if (err)
584 return err;
585
586 return 0;
587}
588
589static struct tvp514x_platform_data tvp5146_pdata = {
590 .clk_polarity = 0,
591 .hs_polarity = 1,
592 .vs_polarity = 1
593};
594
595#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
596
597static struct vpif_subdev_info vpif_capture_sdev_info[] = {
598 {
599 .name = TVP5147_CH0,
600 .board_info = {
601 I2C_BOARD_INFO("tvp5146", 0x5d),
602 .platform_data = &tvp5146_pdata,
603 },
604 .input = INPUT_CVBS_VI2B,
605 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
606 .can_route = 1,
607 .vpif_if = {
608 .if_type = VPIF_IF_BT656,
609 .hd_pol = 1,
610 .vd_pol = 1,
611 .fid_pol = 0,
612 },
613 },
614 {
615 .name = TVP5147_CH1,
616 .board_info = {
617 I2C_BOARD_INFO("tvp5146", 0x5c),
618 .platform_data = &tvp5146_pdata,
619 },
620 .input = INPUT_SVIDEO_VI2C_VI1C,
621 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
622 .can_route = 1,
623 .vpif_if = {
624 .if_type = VPIF_IF_BT656,
625 .hd_pol = 1,
626 .vd_pol = 1,
627 .fid_pol = 0,
628 },
629 },
630};
631
632static const struct vpif_input dm6467_ch0_inputs[] = {
633 {
634 .input = {
635 .index = 0,
636 .name = "Composite",
637 .type = V4L2_INPUT_TYPE_CAMERA,
638 .std = TVP514X_STD_ALL,
639 },
640 .subdev_name = TVP5147_CH0,
641 },
642};
643
644static const struct vpif_input dm6467_ch1_inputs[] = {
645 {
646 .input = {
647 .index = 0,
648 .name = "S-Video",
649 .type = V4L2_INPUT_TYPE_CAMERA,
650 .std = TVP514X_STD_ALL,
651 },
652 .subdev_name = TVP5147_CH1,
653 },
654};
655
656static struct vpif_capture_config dm646x_vpif_capture_cfg = {
657 .setup_input_path = setup_vpif_input_path,
658 .setup_input_channel_mode = setup_vpif_input_channel_mode,
659 .subdev_info = vpif_capture_sdev_info,
660 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
661 .chan_config[0] = {
662 .inputs = dm6467_ch0_inputs,
663 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
664 },
665 .chan_config[1] = {
666 .inputs = dm6467_ch1_inputs,
667 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
668 },
669};
670
671static void __init evm_init_video(void)
672{
673 spin_lock_init(&vpif_reg_lock);
674
675 dm646x_setup_vpif(&dm646x_vpif_display_config,
676 &dm646x_vpif_capture_cfg);
677}
678
679static void __init evm_init_i2c(void)
680{
681 davinci_init_i2c(&i2c_pdata);
682 i2c_add_driver(&dm6467evm_cpld_driver);
683 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
684 evm_init_cpld();
685 evm_init_video();
686}
687
688#define CDCE949_XIN_RATE 27000000
689
690/* CDCE949 support - "lpsc" field is overridden to work as clock number */
691static struct clk cdce_clk_in = {
692 .name = "cdce_xin",
693 .rate = CDCE949_XIN_RATE,
694};
695
696static struct clk_lookup cdce_clks[] = {
697 CLK(NULL, "xin", &cdce_clk_in),
698 CLK(NULL, NULL, NULL),
699};
700
701static void __init cdce_clk_init(void)
702{
703 struct clk_lookup *c;
704 struct clk *clk;
705
706 for (c = cdce_clks; c->clk; c++) {
707 clk = c->clk;
708 clkdev_add(c);
709 clk_register(clk);
710 }
711}
712
713#define DM6467T_EVM_REF_FREQ 33000000
714
715static void __init davinci_map_io(void)
716{
717 dm646x_init();
718
719 if (machine_is_davinci_dm6467tevm())
720 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
721
722 cdce_clk_init();
723}
724
725static struct davinci_uart_config uart_config __initdata = {
726 .enabled_uarts = (1 << 0),
727};
728
729#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
730/*
731 * The following EDMA channels/slots are not being used by drivers (for
732 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
733 * reserved for codecs on the DSP side.
734 */
735static const s16 dm646x_dma_rsv_chans[][2] = {
736 /* (offset, number) */
737 { 0, 4},
738 {13, 3},
739 {24, 4},
740 {30, 2},
741 {54, 3},
742 {-1, -1}
743};
744
745static const s16 dm646x_dma_rsv_slots[][2] = {
746 /* (offset, number) */
747 { 0, 4},
748 {13, 3},
749 {24, 4},
750 {30, 2},
751 {54, 3},
752 {128, 384},
753 {-1, -1}
754};
755
756static struct edma_rsv_info dm646x_edma_rsv[] = {
757 {
758 .rsv_chans = dm646x_dma_rsv_chans,
759 .rsv_slots = dm646x_dma_rsv_slots,
760 },
761};
762
763static __init void evm_init(void)
764{
765 struct davinci_soc_info *soc_info = &davinci_soc_info;
766
767 evm_init_i2c();
768 davinci_serial_init(&uart_config);
769 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
770 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
771
772 if (machine_is_davinci_dm6467tevm())
773 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
774
775 platform_device_register(&davinci_nand_device);
776
777 dm646x_init_edma(dm646x_edma_rsv);
778
779 if (HAS_ATA)
780 davinci_init_ide();
781
782 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
783}
784
785MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
786 .atag_offset = 0x100,
787 .map_io = davinci_map_io,
788 .init_irq = davinci_irq_init,
789 .timer = &davinci_timer,
790 .init_machine = evm_init,
791 .init_late = davinci_init_late,
792 .dma_zone_size = SZ_128M,
793 .restart = davinci_restart,
794MACHINE_END
795
796MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
797 .atag_offset = 0x100,
798 .map_io = davinci_map_io,
799 .init_irq = davinci_irq_init,
800 .timer = &davinci_timer,
801 .init_machine = evm_init,
802 .init_late = davinci_init_late,
803 .dma_zone_size = SZ_128M,
804 .restart = davinci_restart,
805MACHINE_END
806