Loading...
1#ifndef __ARM_MMU_H
2#define __ARM_MMU_H
3
4#ifdef CONFIG_MMU
5
6typedef struct {
7#ifdef CONFIG_CPU_HAS_ASID
8 unsigned int id;
9 raw_spinlock_t id_lock;
10#endif
11 unsigned int kvm_seq;
12} mm_context_t;
13
14#ifdef CONFIG_CPU_HAS_ASID
15#define ASID(mm) ((mm)->context.id & 255)
16
17/* init_mm.context.id_lock should be initialized. */
18#define INIT_MM_CONTEXT(name) \
19 .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
20#else
21#define ASID(mm) (0)
22#endif
23
24#else
25
26/*
27 * From nommu.h:
28 * Copyright (C) 2002, David McCullough <davidm@snapgear.com>
29 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
30 */
31typedef struct {
32 unsigned long end_brk;
33} mm_context_t;
34
35#endif
36
37#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __ARM_MMU_H
3#define __ARM_MMU_H
4
5#ifdef CONFIG_MMU
6
7typedef struct {
8#ifdef CONFIG_CPU_HAS_ASID
9 atomic64_t id;
10#else
11 int switch_pending;
12#endif
13 atomic_t vmalloc_seq;
14 unsigned long sigpage;
15#ifdef CONFIG_VDSO
16 unsigned long vdso;
17#endif
18#ifdef CONFIG_BINFMT_ELF_FDPIC
19 unsigned long exec_fdpic_loadmap;
20 unsigned long interp_fdpic_loadmap;
21#endif
22} mm_context_t;
23
24#ifdef CONFIG_CPU_HAS_ASID
25#define ASID_BITS 8
26#define ASID_MASK ((~0ULL) << ASID_BITS)
27#define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK))
28#else
29#define ASID(mm) (0)
30#endif
31
32#else
33
34/*
35 * From nommu.h:
36 * Copyright (C) 2002, David McCullough <davidm@snapgear.com>
37 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
38 */
39typedef struct {
40 unsigned long end_brk;
41#ifdef CONFIG_BINFMT_ELF_FDPIC
42 unsigned long exec_fdpic_loadmap;
43 unsigned long interp_fdpic_loadmap;
44#endif
45} mm_context_t;
46
47#endif
48
49#endif